IC - TC4001BP
Abstract: No abstract text available
Text: TC4001BP/BF/BFT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4001BP,TC4001BF,TC4001BFT TC4001B Quad 2 Input NOR Gate The TC4001B is 2-input positive NOR gate, respectively. Since the outputs of these gates are equipped with the buffers, the input/output transmission characteristics have been
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TC4001BP/BF/BFT
TC4001BP
TC4001BF
TC4001BFT
TC4001B
TC4001BP
TC4001BF
IC - TC4001BP
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Untitled
Abstract: No abstract text available
Text: SN75ALS1177, SN75ALS1178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS154A – MARCH 1993 – REVISED MAY 1995 D D D D D D D D D D D D D Meet or Exceed Standards EIA/TIA-422-B, RS-485, CCITT Recommendation V.11 Designed for Multipoint Bus Transmission on Long Bus Lines in Noisy Environments
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SN75ALS1177,
SN75ALS1178
SLLS154A
EIA/TIA-422-B,
RS-485,
SN75ALS1177
SLLA075
\\Roarer\root\data13\imaging\BITTING\cpl
mismatch\20000817\08162000
3\TXII\08032000\s
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TLP785GB
Abstract: 11-5L107 TLP785F TLP785 EN60747-5-2 TL-P785 TLP785 TLP78 BR 13005 A
Text: TLP785,TLP785F TOSHIBA Photocoupler GaAs IRED & Photo−Transistor TLP785,TLP785F Office Equipment Household Appliances Solid State Relays Switching Power Supplies Various Controllers Signal Transmission Between Different Voltage Circuits The TOSHIBA TLP785 consists of a silicone phototransistor optically
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TLP785
TLP785F
TLP785F
TLP785.
11-5L1
TLP785:
TLP785GB
11-5L107
TLP785 EN60747-5-2
TL-P785
TLP78
BR 13005 A
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Untitled
Abstract: No abstract text available
Text: SN54ALS138A, SN54AS138, SN74ALS138A, SN74AS138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SDAS055E – APRIL 1982 – REVISED JULY 1996 D D D Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporate Three Enable Inputs to Simplify
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SN54ALS138A,
SN54AS138,
SN74ALS138A,
SN74AS138
SDAS055E
300-mil
SN54AS138
SN74AS138
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HDB3 matlab
Abstract: block diagram prbs generator in matlab matlab pn sequence generator HP54502A
Text: DART Device Advanced E3/DS3 Receiver/Transmitter TXC-02030 FEATURES DESCRIPTION • Single LIU for E3 and DS3 The Dual-market Advanced E3/DS3 Receiver/Transmitter DART device performs the receive and transmit line interface functions required for transmission of E3
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TXC-02030
TXC-02030-MB
HDB3 matlab
block diagram prbs generator in matlab
matlab pn sequence generator
HP54502A
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Untitled
Abstract: No abstract text available
Text: SN75LVDS84A FLATLINK TRANSMITTER SLLS354C – MAY 1999 – REVISED NOVEMBER 1999 D D D D D D D D D D D D 21:3 Data Channel Compression at up to 196 Million Bytes per Second Throughput Suited for SVGA, XGA, or SXGA Data Transmission From Controller to Display
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SN75LVDS84A
SLLS354C
SN75LVDS84.
LVDS84
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TLP290-4
Abstract: 11-11F1
Text: TLP290-4 Photocouplers GaAs Infrared LED & Photo Transistor TLP290-4 1. Applications • Programmable Logic Controllers PLCs • Switching Power Supplies • Simplex/Multiplex Data Transmission 2. General The Toshiba TLP290-4 consists of phototransistors optically coupled to gallium arsenide infrared emitting diodes.
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TLP290-4
TLP290-4
11-11F1
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TODX2102
Abstract: No abstract text available
Text: TOSHIBA TOSLINK TODX2102 Unit mm Preliminary Fiber Optic Transceiving Module for 10 MAX. 39.3 MAX. 3.3 Duplex SC Connector F-type Features • Data rate: 10 to 155 M b/s (NRZ code) • Transmission distance: up to 2000m • Single +5V voltage • Shifted ECL interface
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ODX2102
2000m
01ti3S
TODX2102
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74F138
Abstract: No abstract text available
Text: S N 5 4 F13 8 , S N 74 F13 8 3-LINE TO 8-LINE D EC O D ERS/D EM U LTIPLEXERS D2932, MARCH 1987 Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems S N 54F138 . . . J PACKAGE SN 74F138 . . . D OR N PACKAGE TOP VIEW AC 1 U ,6 3 vcc
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D2932,
300-mil
SN54F138
74F138
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Untitled
Abstract: No abstract text available
Text: TOSHIBA TC74AC164 8-bit Shift Register S-IN, P-OUT Features: • High Speed: fmax = 170MHz (typ.) at Vco = 5V • Low Power Dissipation: • High Noise Immunity: VN,H=VNIL=28% Voc (min.) • Symmetrical Output Impedance: llOHl = I o l = 24mA (min.). Capability of driving 50ft transmission lines.
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TC74AC164
170MHz
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051b
Abstract: No abstract text available
Text: SN54F138, SN74F138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SDFS051B - MARCH 1987 - REVISED JULY 1996 Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems SN54F13 8 . . . J PACKAGE SN74F138. . . D OR N PACKAGE TOP VIEW u Incorporates Three Enable Inputs to
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SN54F138,
SN74F138
SDFS051B
300-mil
SN54F13
SN74F138.
SN54F138
01Qfc
051b
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D3318
Abstract: No abstract text available
Text: 74AC11139 DUAL 2-LINE TO 4-LINE DECODER/DEMULTIPLEXER D3318, JULY 1989 - R EV ISED APRIL 1993 * Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems * Incorporates Two Enable Inputs to Simplify Cascading and/or Data Reception
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74AC11139
D3318,
500-mA
300-mil
4AC11139
D3318.
D3318
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LS138
Abstract: SN54ALS138
Text: TYPES SN54ALS138, SN54AS138, SN74ALS138, SN74AS138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS D 2 6 6 1 , APRIL 1 9 8 2 — REVISED DECEMBER 1 9 8 3 Designed Specifically for High-Speed Mem ory Decoders and Data Transmission Systems SN 54A LS138, SN 54A S 138 .
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SN54ALS138,
SN54AS138,
SN74ALS138,
SN74AS138
LS138,
225Q12
LS138
SN54ALS138
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TA 55122
Abstract: No abstract text available
Text: SN55122, SN75122 TRIPLE LINE-RECEIVERS D 1 3 3 4 , SEPTEMBER 1 9 7 3 Designed for Digital Data Transmission Over Coaxial Cable, Strip Line, or Twisted Pair REVISED SEPTEMBER 1 9 8 6 S N S 5 1 2 2 . . . J PACKAGE S N 7 5 1 2 2 . . . D , J. OR N PACKAGE ITO P V IE W
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SN55122,
SN75122
500-SI
SN55121
SN75121
N8T14
SN551
SN751
TA 55122
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Untitled
Abstract: No abstract text available
Text: SN75ALS193 QUADRUPLE DIFFERENTIAL LINE RECEIVER WITH 3-STATE OUTPUTS D2931. JUNE 1 9 8 6 - REVISED AUGUST 1989 Meets EIA Standards RS-422-A and RS-423-A J PACKAGE ITOP VIEW Meets CCITT Recommendations V.10, V.11, X.26, and X.27 Designed for Multipoint Bus Transmission on
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SN75ALS193
D2931.
RS-422-A
RS-423-A
AM26LS32A
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Untitled
Abstract: No abstract text available
Text: BATA TRANSMISSION R e d u c e Y o u r C a b le C o s t s w it h L V D S S e r ia liz e r / D e - s e r ia liz e r SNG5LVD S9 3 , SNE5LVDS94 > • S U S in ► SNB5 LVD S9 5 , SN65LVDS96 > S8.35 i» quantitits of 18BB ► E V IV I T he new est Low Voltage bus structures with no loss in data
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SNE5LVDS94
SN65LVDS96
SN65LVDS93
SN65LVDS94
SN65LVDS95
SN65LVDS96
56-pin
48-pin
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042b
Abstract: No abstract text available
Text: 74AC11138 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER SCAS042B - MAY 1988 - REVISED A P R IL I 996 D, N, OR PW PACKAGE TOP VIEW Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Y1 [ 1 Y2 [ 2 Incorporates Three Enable Inputs to
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74AC11138
SCAS042B
500-mA
300-mil
32-Bit
042b
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Untitled
Abstract: No abstract text available
Text: 74ACT11139 DUAL 2-LINE TO 4-LINE DECODER/DEMULTIPLEXER SCASI 75A - SEPTEMBER 1991 - REVISED APRIL 1996 • Inputs Are TTL-Voltage Compatible • Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems D, N, OR PW PACKAGE TOP VIEW
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74ACT11139
500-mA
300-mil
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Untitled
Abstract: No abstract text available
Text: 74ACT11139 DUAL M IN E TO 4-LINE DECODER/DEMULTIPLEXER SCASI 75 - D3907, SEPTEMBER 1991 - REVISED APRIL 1993 D, N, OR PW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems
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74ACT11139
D3907,
500-mA
300-mll
SCAS175-D39Q7,
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SN7516
Abstract: SN75162 SN75LBC786
Text: DATA TRANSMISSION RS - 4 23 S t a nd a r d S e l e c t i o n Gui de Footprint Device Name M ax M ax Drvr/Rcvr Supply tpd Current ns (mA) Driver Pricing for Sle w Rate !K units Control ($> Package Options Temperature Range M u lt ip le S u p p ly , 5 V an d + 1 2 V
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SN75LBC784
SN75LBC784
SN75LBC786
28/DW
SN75LBC786
UA9636A
UA9636
SN74ACT1284
15-bit
SN7516
SN75162
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LVDS050
Abstract: LVDS051 LVDS180 SN65LV0S050
Text: DATA TRANSMISSION Increase Signaling Rates and Low er Pow er w ith LVDS Dual and Single Drivers/Receivers SN65LV0S050, SN65LVDS051 > $ 3 .74 in q u an tities o f 1000 SN65LVDS17S > - S 2 .1 3 in q u an titie s o f l i O L ow Voltage Differential Signaling
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SN65LV0S050,
SN65LVDS051
SN65LVDS17S
RS-422
RS-485.
SN65LVDSx
LVDS050
LVDS051
LVDS180
SN65LV0S050
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TSB12LV41
Abstract: No abstract text available
Text: DATA TRANSMISSION C o n s u m e r Electronics G o Digital w ith N e w Link-Layer Controllers he TSB12LV41 for MPEG2/DSS receiving IEEE 1394 packets simulta and the TSB12LV42 for digital neously. A separate, implemented video data streams are TTs latest 8-Kbyte FIFO, accessible via the BDIF,
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TSB12LV41
TSB12LV42
TSB12LV41;
460-M
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truth table inverter gate 74
Abstract: 74HC74
Text: 6. HOW TO R E A D MI L T Y PE LOGIC S Y M B O LS A ND TRUTH TA B L ES 6 -1 H o w to read M I L typo L o g ic S y m b o l* Tkble 6-1 shows the MIL type logic symbols used in high-speed CMOS IC This logical chart is based on M1L-STD-806B. Clocked inverters and transmission gates employ specific symbols.
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M1L-STD-806B.
HC-73
HC-74
truth table inverter gate 74
74HC74
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Untitled
Abstract: No abstract text available
Text: DATA TRANSMISSION Backplane Bridging is Easy w ith SN65LVDS22 and SN 65LVD M 22 M U X Repeaters SN65LVDS22 M U X table ► $311 SN 65LV D M 22 ► $3.84 in quantifias « 1 1 * ilabile in IG-pin SOIC D AT A GLANCE * • High signaling rates 400 Mbps High impedance drivers
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SN65LVDS22
65LVD
SN65LVDS22
12-kV
SN65LVDM22
LVDS22
LVDM22
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