TRANSITIONS Search Results

Contextual Info: SN54HC132, SN74HC132 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS034B - DECEMBER 1982 - REVISED JANUARY 1996 • • • • • Operation From Very Slow Input Transitions Temperature-Compensated Threshold Levels High Noise Immunity Same Pinouts as ’HCOO

Contextual Info: SN54HC7002, SN74HC7002 QUADRUPLE POSITIVE-NOR GATES WITH SCHMITT-TRIGGER INPUTS _ SCLS033B - MARCH 1984 - REVISED JULY 1996 • Operation From Very Slow Input Transitions SN54HC7002 . . . J OR W PACKAGE SN74HC7002. . . D OR N PACKAGE TOP VIEW

Contextual Info: SN65HVD50-SN65HVD59 www.ti.com SLLS666B – SEPTEMBER 2005 – REVISED MAY 2006 HIGH OUTPUT FULL-DUPLEX RS-485 DRIVERS AND RECEIVERS • • • • • • • The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units

Contextual Info: SN54HC7032, SN74HC7032 QUADRUPLE POSITIVE-OR GATES WITH SCHMITT-TRIGGER INPUTS SCLS036A - MARCH 1984 - REVISED JANUARY 1996 Operation From Very Slow Input Transitions Temperature-Compensated Threshold Levels High Noise Immunity Same Pinouts as ’HC32 Package Options Include Plastic

Contextual Info: LMH1981 Application Note 1599 LMH1981 Evaluation Board Instruction Manual Literature Number: SNLA094B National Semiconductor Application Note 1599 February 11, 2009 General Description el e.g. random white-to-black field transitions . It is recommended to drive the LMH1981 input by a professional-grade

Contextual Info: 5V/3.3V 2.5Gbps VARIABLE OUTPUT SWING DIFFERENTIAL RECEIVER SY100EP16VS FINAL FEATURES • 3.3V and 5V power supply options ■ Fast output transitions <160ps tr / tf ECL Pro ■ Guaranteed operation over –40°C to +85°C temperature range ■ Functionally equivalent to SY88927V and

NT5DS8M16FS-5T

Abstract: NT5DS8M16FS-6K NT5DS8
Contextual Info: NT5DS8M16FT NT5DS8M16FS 128Mb DDR SDRAM Features • DLL aligns DQ and DQS transitions with CK transitions • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS • Burst lengths: 2, 4, or 8 • CAS Latency: 2 & 2.5 for 6K, 2, 2.5, & 3 for 5T

Nanya nt5ds8m16fs

Abstract: NT5DS8M16FS NT5DS8M16FT-5TI NT5DS8M16FS-5T DDR333 DDR400 NT5DS8M16 NT5DS8M16FT-6KI NT5DS8M16FT
Contextual Info: NT5DS8M16FT-5TI NT5DS8M16FS-5TI NT5DS8M16FT-6KI NT5DS8M16FS-6KI 128Mb DDR SDRAM Features • DLL aligns DQ and DQS transitions with CK transitions • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS • Burst lengths: 2, 4, or 8

NT5DS8M16FS-5T

Abstract: NT5DS8M16FS-6K NT5DS8M16 NT5DS8M16FS
Contextual Info: NT5DS8M16FT NT5DS8M16FS 128Mb DDR SDRAM Features • DLL aligns DQ and DQS transitions with CK transitions • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS • Burst lengths: 2, 4, or 8 • CAS Latency: 2 & 2.5 for 6K, 2, 2.5, & 3 for 5T

NT5DS16M16BF-6K

Abstract: NT5DS32M8BT NT5DS16M16BT-6K NT5DS16M16BT NT5DS64M4BT NT5DS32M
Contextual Info: NT5DS64M4BT NT5DS32M8BT NT5DS16M16BT NT5DS64M4BF NT5DS32M8BF NT5DS16M16BF NT5DS64M4BS NT5DS32M8BS NT5DS16M16BS NT5DS64M4BG NT5DS32M8BG NT5DS16M16BG 256Mb DDR SDRAM Features • Data mask DM for write data • DLL aligns DQ and DQS transitions with CK transitions

74121

Abstract: Monostable multivibrator 74121 74121 ttl function table TTL 74121 pin configuration of 74121 74121 equivalent 74121 SIGNETICS 853051 N74121
Contextual Info: 74121 Signetics Multivibrator Monostable Multivibrator Product Specification Logic Products FEATURES • Very good pulse width stability • Virtually immune to temperature and voltage variations • Schmitt trigger input for slow input transitions • internal timing resistor provided

AZ100EL32

Abstract: AZ100EL32D AZ100LVEL32T AZ10EL32 AZ10EL32D AZ10EL32T AZM10 MC100EL32 MC10EL32 a3810
Contextual Info: ARIZONA MICROTEK, INC. AZ10EL32 AZ100EL32 PACKAGE AVAILABILITY FEATURES • • • • • ECL/PECL ÷ 2 Divider PACKAGE 510ps Propagation Delay 3.0GHz Toggle Frequency High Bandwidth Output Transitions 75kΩ Internal Input Pulldown Resistors Direct Replacement for ON

LVEL11

Abstract: AZ100LVEL11 AZ10LVEL11 AZ10LVEL11D AZM10 MC100EL11 MC100LVEL11 MC10EL11 marking AZT
Contextual Info: ARIZONA MICROTEK, INC. AZ10LVEL11 AZ100LVEL11 ECL/PECL 1:2 Differential Fanout Buffer PACKAGE AVAILABILITY FEATURES • • • • • • • PACKAGE 265ps Propagation Delay 5ps Skew Between Outputs High Bandwidth Output Transitions Internal Input Pulldown Resistors

SN54HC7002

Abstract: SN74HC7002
Contextual Info: SN54HC7002, SN74HC7002 QUADRUPLE POSITIVE-NOR GATES WITH SCHMITT-TRIGGER INPUTS SCLS033B - M ARCH 1984 - R EVIS ED JULY 1996 • Operation From Very Slow Input Transitions SN54HC7002 . . . J OR W PACKAGE SN74HC7002 . . . D OR N PACKAGE TOP VIEW ) • 1A [ 1

pwm sinewave timing

Abstract: A114 A115 C3216X5R0J106M JESD22 JESD78 NCP1500 NCP1500DMR2 RLF5018T MSOP-8 PFM light load
Contextual Info: NCP1500 Dual Mode PWM/Linear BUCK Converter The NCP1500 is a dual mode converter that operates as either a pulse width modulated PWM buck converter or as a linear regulator. The converter automatically transitions between the two modes. The converter operates as a PWM when a synchronization signal is present

AZ100EL16

Abstract: AZ100EL16D AZ100EL16T AZ10EL16 AZ10EL16D AZ10EL16T AZM10 MC100EL16 MC10EL16
Contextual Info: ARIZONA MICROTEK, INC. AZ10EL16 AZ100EL16 ECL/PECL Differential Receiver FEATURES • • • • • PACKAGE AVAILABILITY RoHS Compliant / Lead Pb Free Package Available 250ps Propagation Delay High Bandwidth Output Transitions 75kΩ Internal Input Pulldown Resistors

MC100E150

Abstract: MC10E150 MC10E150FN
Contextual Info: MC10E150, MC100E150 5V ECL 6-Bit D Latch Description The MC10E/100E150 contains six D-type latches with differential outputs. When both Latch Enables LEN1, LEN2 are LOW, the latch is transparent and input data transitions propagate through to the output. A logic HIGH on either LEN1 or LEN2 (or both) latches the

100EL01

Abstract: SY100EL01 SY100EL01ZC SY10EL01 SY10EL01ZC SY10EL01ZCTR
Contextual Info: 4-INPUT OR/NOR FEATURES • ■ ■ ■ SY10EL01 SY100EL01 DESCRIPTION 230ps propagation delay High bandwidth output transitions Internal 75KΩ input pull-down resistors Available in 8-pin SOIC package The SY10/100EL01 are 4-input OR/NOR gates. These devices are functionally equivalent to the E101 devices,

100MHZ

Abstract: 24MHZ 48MHZ W83194R-67A
Contextual Info: W83194R-67A 100MHZ 3-DIMM CLOCK FOR VIA MVP4 1.0 GENERAL DESCRIPTION The W83194R-67A is a Clock Synthesizer which provides all clocks required for high-speed RISC or CISC microprocessor such as Intel Pentium , AMD and Cyrix. W83194R-67A provides sixteen CPU/PCI frequencies which are externally selectable with smooth transitions. W83194R-67AA also

motorola D-latch

Abstract: MC100E150 DL140 MC10E150
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 6ĆBit D Latch MC10E150 MC100E150 The MC10E/100E150 contains six D-type latches with differential outputs. When both Latch Enables LEN1, LEN2 are LOW, the latch is transparent and input data transitions propagate through to the output. A

100EL04

Abstract: e104 SY100EL04 SY100EL04ZC SY10EL04 SY10EL04ZC SY10EL04ZCTR
Contextual Info: 2-INPUT AND/NAND FEATURES • ■ ■ ■ SY10EL04 SY100EL04 DESCRIPTION 240ps propagation delay High bandwidth output transitions Internal 75KΩ input pull-down resistors Available in 8-pin SOIC package The SY10/100EL04 are 2-input AND/NAND gates. These devices are functionally equivalent to the E104

CMPWR101

Abstract: 101R CMPWR101R "network interface cards"
Contextual Info: 250mA SmartORTM Regulator with VAUX Switch CMPWR101 Features • • • • • • • • • • Automatic detection of VCC input supply Glitch-free output during supply transitions Built-in hysteresis during supply selection 250mA output maximum load current

Contextual Info: C A L IF O R N IA MICRO DEVICES CMPWR1 20 250mA/ 3.3V SmartOR POWER REGULATOR Pin Diagram Features Automatic detection of Vcc input supply Drive output logic to control external switch Glitch-free output during supply transitions 250mA output maximum load current

LC313

Contextual Info: MOTOROLA SEM ICONDUCTO R TECHNICAL DATA 6-Bit D Latch M C10E150 M C100E150 The MC10E/100E150 contains six D-type latches with differential outputs. When both Latch Enables LEN1, LEN2 are LOW, the latch is transparent and input data transitions propagate through to the output. A