TRANSISTORS A102 Search Results

A1022

Abstract: D601A c2480 C4561 S-Mini D1938 transistor A1022 D602A XN06506
Contextual Info: Transistors Selection Guide by Applications and Functions •5-Pin S-Mini Type (D8)*5-Pin Mini Type (D15)*6-Pin S-Mini Type (D9)*6-Pin Mini Type (D16) Package Transistor, FET # Transistors (XN: 5- and 6-Pin Mini Type Package, XP: 5- and 6-Pin S-Mini Type Package)

D1915

Abstract: D1915 Transistors TRANSISTOR D1915 c3904 D1915 transistor B709A A1022 xp5555 XN4501 XP1201
Contextual Info: Transistors Selection Guide by Applications and Functions •5 Pin S Mini Type (D6) *5 Pin Mini Type (D11) *6 Pin S Mini Type (D7) *6 Pin Mini Type (D12) Package Transistor, FET A Preliminary # Resistor Built-in Transistors (XN: 5 and 6 Pin Mini Type Package, XP: 5 and 6 Pin S Mini Type Package)

D1915

Abstract: D1915 Transistors d1915f TRANSISTOR D1915 D1915 transistor XN1111 mini type (D7)
Contextual Info: Transistors Selection Guide by Applications and Functions • 5 Pin S Mini Type (D6) *5 Pin Mini Type (D11) *6 Pin S Mini Type (D7) *6 Pin Mini Type (D12) Package Transistor, FET A Preliminary # Resistor Built-in Transistors (XN: 5 and 6 Pin Mini Type Package, XP: 5 and 6 Pin S Mini Type Package)

TRANSISTOR D1915

Abstract: D1915 transistor D1915 Transistors D1915 n227
Contextual Info: Transistors Selection Guide by Applications and Functions • 5 Pin S Mini Type (D6) • 5 Pin Mini Type (D11) * 6 Pin S Mini Type (D7) • 6 Pin Mini Type (D12) Package Transistor, FET A Prelim inary •R e s is to r Built-in Transistors (XN: 5 and 6 Pin Mini Type Package, XP: 5 and 6 Pin S Mini Type Package)

2n7588

Abstract: P3139 BC233A sprague 40d GEX36/7 C4274 s1766 C12712 TC236 GP149
Contextual Info: SPRAGUE THE M A R K O F R E L I A B I L I T Y SEMICONDUCTOR REPLACEMENT MANUAL K -5 0 0 TABLE OF CONTENTS Guidelines for Replacing Semiconductors. 1 Specifications, Small-Signal and Power Transistors.

Contextual Info: APL5331 3A Bus Termination Regulator Features General Description • The APL5331 linear regulator is designed to provide a regulated voltage with bi-directional output current for DDR-SDRAM termination. The APL5331 integrates two power transistors to source or sink current up to 3A.

transistor buz 36

Abstract: A1301 transistor Z346 z309 A3206A A1306A z326 A1320A A1610-A2 Z22A
Contextual Info: IEMENS AKTIENGESELLSCHAF 03E D • 7 ^ 3*7-0/ ô23StQS QOlSbBS ö « S I E G Leistungstransistoren Power Transistors N-Kanal Anreicherungstypen im Kunststoffgehäuse T0-220 AB N channel enhancem ent types in plastic package TO-220 AB Typ Type ^DS max V A

actel 1240a

Abstract: TI1139 UI02 1280xl actel 1240xl 132 pga UJ-01 U1H-18 110E06 SI 1020A Actel A1225
Contextual Info: Actel Device Reliability Report Actel’s field programmable gate arrays FPGAs are currently available in five product families—ACT 1, ACT 2, 1200XL, 3200DX, and ACT 3. The ACT 1 family consists of the A1010 and A1020, which are 1200- and 2000-gate FPGAs,

transistor A1010

Abstract: A1020 transistor ACTEL A1010 32140DX A1010 A1020 A1225A A1225XL A1240A A1240XL
Contextual Info: Testing and Programming Actel Field Programmable Gate Arrays FPGAs Testing has long been a struggle for users of masked gate arrays. To avoid board-level, system-level, or even possible field failures, the system designer must expend great effort in developing test vectors for gate array designs. Even after the

ACTEL burn-in

Abstract: antifuse programming technology antifuse
Contextual Info: Application Note Testing and Burn-In of Actel FPGAs I n tro du ct i on Burn-in tests, for operating devices dynamically at a high temperature and extrapolating the failure rate to typical operating conditions, are a requirement for HiRel applications on logic devices. System designers must spend

Contextual Info: VN2410 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination

VN2406L-G

Contextual Info: VN2406 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination

MARKING VN

Abstract: vn0606
Contextual Info: VN0606 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination

Contextual Info: VN0808 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination

Contextual Info: APL5331 3A Bus Termination Regulator Features • • • • General Description Provide Bi-direction Current The APL5331 linear regulator is designed to provide a regulated voltage with bi-directional output current for - Sourcing or Sinking Current up to 3A

apl5331

Abstract: JEDEC Jc-11 free A102 APM2300
Contextual Info: APL5331 3A Bus Termination Regulator Features General Description • The APL5331 linear regulator is designed to provide a regulated voltage with bi-directional output current for Provide Bi-direction Current - Sourcing or Sinking Current up to 3A • •

Contextual Info: VN1206 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination

Contextual Info: VN0300 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination

Contextual Info: VN3515 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination

Contextual Info: VN4012 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination

DSFP-VN0104

Contextual Info: VN0104 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination

VN0106

Contextual Info: VN0106 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination

ic 0808 pin diagram

Abstract: HIPAC Semiconductor HPL5331 HPL5331G5C-TR HPL5331KAC-TR HPL5331KC-TR HPL5331U5C-TR marking a8 SOP-8
Contextual Info: HPL5331 3A Bus Termination Regulator Features General Description Cont. • On-chip thermal shutdown provides protection against any combination of overload that would create excessive junction temperature. The output voltage of HPL5331 track the voltage at VREF pin. A resistor

APL5332

Abstract: PCT resistor 1.5k A102 APM2300A marking 303w
Contextual Info: APL5332 0.8V Reference LDO with Source-Sink & Output Selection Functions Features General Description • LDO with Source and Sink Capabilities • Single Input Voltage The APL5332 is a precise CMOS LDO with source sink and output selection functions. The APL5332 offers 2%