NEN 3157
Abstract: MPC8360ERM Cisco 3725 MPC832x ucc ethernet delta dps 298 cp-1 P1021 MPC8569 MPC8358 Cisco 2621 router marking code SUs 15
Text: QUICC Engine Block Reference Manual with Protocol Interworking Supports MPC8360E/MPC8358E MPC8568E/MPC8568/MPC8567E/MPC8567 MPC8569E MSC8144/MSC8144E MSC815x Family P1021 QEIWRM Rev. 3 2/2010 How to Reach Us: Home Page: www.freescale.com Web Support: http://www.freescale.com/support
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MPC8360E/MPC8358E
MPC8568E/MPC8568/MPC8567E/MPC8567
MPC8569E
MSC8144/MSC8144E
MSC815x
P1021
EL516
NEN 3157
MPC8360ERM
Cisco 3725
MPC832x ucc ethernet
delta dps 298 cp-1
P1021
MPC8569
MPC8358
Cisco 2621 router
marking code SUs 15
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Cisco 2621 router
Abstract: B1T 3713 delta dps 298 cp delta dps 298 cp-1 CHN 533 mpc 494c P1021RM upc 2581 ATML bcm 7325
Text: QUICC Engine Block Reference Manual with Protocol Interworking Supports MPC8360E/MPC8358E MPC8568E/MPC8568/MPC8567E/MPC8567 MPC8569E MSC8144/MSC8144E MSC815x Family P1021 QEIWRM Rev. 4 31 Oct 2010 How to Reach Us: Home Page: www.freescale.com Web Support:
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MPC8360E/MPC8358E
MPC8568E/MPC8568/MPC8567E/MPC8567
MPC8569E
MSC8144/MSC8144E
MSC815x
P1021
EL516
Cisco 2621 router
B1T 3713
delta dps 298 cp
delta dps 298 cp-1
CHN 533
mpc 494c
P1021RM
upc 2581
ATML
bcm 7325
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2A97
Abstract: SPRU965 c6455 pin diagram for IC 4580 VLYNQ C6000 DDR2-533 TMS320C6000 TMS320TCI6482 pci 6014
Text: www.ti.com TMS320TCI6482 Communications Infrastructure Digital Signal Processor SPRS246F – APRIL 2005 – REVISED MAY 2007 1 Features • • • • • • • • • High-Performance Fixed-Point DSP TCI6482 – 1.17- and 1-ns Instruction Cycle Time
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TMS320TCI6482
SPRS246F
TCI6482)
850-MHz
32-Bit
16-Bits)
TMS320C64x
16-Bit)
TMS320C64x+
256K-Bit
2A97
SPRU965
c6455
pin diagram for IC 4580
VLYNQ
C6000
DDR2-533
TMS320C6000
TMS320TCI6482
pci 6014
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Gigabit Ethernet MAC SPI
Abstract: R065 51L2 cdma design implementation
Text: www.ti.com TMS320TCI6482 Communications Infrastructure Digital Signal Processor SPRS246C – APRIL 2005 – REVISED MARCH 2006 TMS320TCI6482 Communications Infrastructure Digital Signal Processor 1.1 • • • • • • • • Features High-Performance Fixed-Point DSP TCI6482
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TMS320TCI6482
SPRS246C
125-Gbps
32-Bit
DDR2-533
32-/16-Bit
33-/66-MHz,
Gigabit Ethernet MAC SPI
R065
51L2
cdma design implementation
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CDMA system implementation
Abstract: No abstract text available
Text: www.ti.com TMS320TCI6482 Communications Infrastructure Digital Signal Processor SPRS246E – APRIL 2005 – REVISED DECEMBER 2006 1 TMS320TCI6482 Communications Infrastructure Digital Signal Processor 1.1 Features • • • • • • • • High-Performance Fixed-Point DSP TCI6482
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TMS320TCI6482
SPRS246E
TCI6482)
850-MHz
32-Bit
16-Bits)
TMS320C64x
16-Bit)
TMS320C64x+
CDMA system implementation
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RS 8223
Abstract: CDMA system implementation
Text: www.ti.com TMS320TCI6482 Communications Infrastructure Digital Signal Processor SPRS246E – APRIL 2005 – REVISED DECEMBER 2006 1 TMS320TCI6482 Communications Infrastructure Digital Signal Processor 1.1 Features • • • • • • • • High-Performance Fixed-Point DSP TCI6482
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TMS320TCI6482
SPRS246E
TCI6482)
850-MHz
32-Bit
16-Bits)
TMS320C64x
16-Bit)
TMS320C64x+
RS 8223
CDMA system implementation
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Untitled
Abstract: No abstract text available
Text: www.ti.com TMS320TCI6482 Communications Infrastructure Digital Signal Processor SPRS246D – APRIL 2005 – REVISED AUGUST 2006 1 TMS320TCI6482 Communications Infrastructure Digital Signal Processor 1.1 Features • • • • • • • • High-Performance Fixed-Point DSP TCI6482
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TMS320TCI6482
SPRS246D
TCI6482)
850-MHz
32-Bit
16-Bits)
TMS320C64x
16-Bit)
TMS320C64x+
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mcbsp tms 6000
Abstract: transistor D400 pin diagram VLYNQ pin diagram for IC 4580 C6000 DDR2-533 TMS320C6000 TMS320TCI6482 SPRS246G
Text: TMS320TCI6482 Communications Infrastructure Digital Signal Processor www.ti.com SPRS246G – APRIL 2005 – REVISED APRIL 2009 1 Features • • • • • • • • High-Performance Communications Infrastructure DSP TCI6482 – 1.17-, 1-, and 0.83-ns Instruction Cycle Time
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TMS320TCI6482
SPRS246G
TCI6482)
83-ns
850-MHz,
32-Bit
16-Bits)
TMS320C64x
16-Bit)
TMS320C64x+
mcbsp tms 6000
transistor D400 pin diagram
VLYNQ
pin diagram for IC 4580
C6000
DDR2-533
TMS320C6000
TMS320TCI6482
SPRS246G
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viterbi algorithm
Abstract: No abstract text available
Text: TMS320TCI6482 Communications Infrastructure Digital Signal Processor www.ti.com SPRS246G – APRIL 2005 – REVISED APRIL 2009 1 Features • • • • • • • • High-Performance Communications Infrastructure DSP TCI6482 – 1.17-, 1-, and 0.83-ns Instruction Cycle Time
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TMS320TCI6482
SPRS246G
TCI6482)
83-ns
850-MHz,
32-Bit
16-Bits)
TMS320C64x
16-Bit)
TMS320C64x+
viterbi algorithm
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Untitled
Abstract: No abstract text available
Text: TMS320TCI6482 www.ti.com SPRS246K – APRIL 2005 – REVISED MARCH 2012 TMS320TCI6482 Communications Infrastructure Digital Signal Processor Check for Samples: TMS320TCI6482 1 Features 12 • High-Performance Communications Infrastructure DSP TCI6482 – 1.17-, 1-, and 0.83-ns Instruction Cycle Time
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TMS320TCI6482
SPRS246K
TCI6482)
83-ns
850-MHz,
32-Bit
16-Bits)
TMS320C64x+
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Untitled
Abstract: No abstract text available
Text: TMS320TCI6482 SPRS246J – APRIL 2005 – REVISED JULY 2011 www.ti.com TMS320TCI6482 Communications Infrastructure Digital Signal Processor Check for Samples: TMS320TCI6482 1 Features 12 • High-Performance Communications Infrastructure DSP TCI6482 – 1.17-, 1-, and 0.83-ns Instruction Cycle Time
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TMS320TCI6482
SPRS246J
TMS320TCI6482
TCI6482)
83-ns
850-MHz,
32-Bit
16-Bits)
TMS320C64x
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MAR226
Abstract: CDMA system implementation
Text: TMS320TCI6482 www.ti.com SPRS246H – APRIL 2005 – REVISED SEPTEMBER 2010 TMS320TCI6482 Communications Infrastructure Digital Signal Processor Check for Samples: TMS320TCI6482 1 Features 12 • High-Performance Communications Infrastructure DSP TCI6482
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TMS320TCI6482
SPRS246H
TMS320TCI6482
TCI6482)
83-ns
850-MHz,
32-Bit
16-Bits)
TMS320C64x
MAR226
CDMA system implementation
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TMS320TCI6482 EVM board
Abstract: ethernet mdio circuit diagram DED22
Text: TMS320TCI6482 SPRS246J – APRIL 2005 – REVISED JULY 2011 www.ti.com TMS320TCI6482 Communications Infrastructure Digital Signal Processor Check for Samples: TMS320TCI6482 1 Features 12 • High-Performance Communications Infrastructure DSP TCI6482 – 1.17-, 1-, and 0.83-ns Instruction Cycle Time
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TMS320TCI6482
SPRS246J
TMS320TCI6482
TCI6482)
83-ns
850-MHz,
32-Bit
16-Bits)
TMS320C64x
TMS320TCI6482 EVM board
ethernet mdio circuit diagram
DED22
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TMS320C6455 MDIO EMAC
Abstract: RTM 880
Text: TMS320TCI6482 www.ti.com SPRS246I – APRIL 2005 – REVISED FEBRUARY 2011 TMS320TCI6482 Communications Infrastructure Digital Signal Processor Check for Samples: TMS320TCI6482 1 Features 12 • High-Performance Communications Infrastructure DSP TCI6482
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TMS320TCI6482
SPRS246I
TMS320TCI6482
TCI6482)
83-ns
850-MHz,
32-Bit
16-Bits)
TMS320C64x
TMS320C6455 MDIO EMAC
RTM 880
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TCP 8118
Abstract: TCP 8108 tr/TCP 8118
Text: FUJITSU November 1993 Edition 1.0 DATA SHEET MB98A8084X- / 8094x- /8 1 04x- / 8114x20 FLASH MEMORY CARD FLASH ERASABLE AND PROGRAMMABLE MEMORY CARD 256K /5 1 2 K /1 M /2M-BYTE The Fujitsu MB98A8084x, MB98A8094x, MB98A8104x and MB98A8114x are Flash electrically erasable and programmable Flash memory cards capable of
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MB98A8084X-
8094x-
8114x20
MB98A8084x,
MB98A8094x,
MB98A8104x
MB98A8114x
68-pln
16-bit
MB98A8084X-20
TCP 8118
TCP 8108
tr/TCP 8118
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8118165A
Abstract: 8118165
Text: MEMORY CMOS 1Mx 16 BIT HYPER PAGE MODE DYNAMIC RAM M B 8118165A-60/-70 CMOS 1,048,576 x 16 BIT Hyper Page Mode Dynamic RAM • DESCRIPTION The Fujitsu M B8118165A is a fully decoded CMOS Dynamic RAM DRAM that contains 16,777,216 memory cells accessible in 16-bit increments. The MB8118165A features a “hyper page” mode of operation whereby
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118165A-60/-70
B8118165A
16-bit
MB8118165A
024-bits
B8118165A
F50006S
8118165A
8118165
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Untitled
Abstract: No abstract text available
Text: SIEM ENS 2M X 8 - Bit Dynamic RAM 2k Refresh Hyper Page Mode - EDO HYB 5117805BSJ -50/-60/-70 Prelim inary Inform ation • • • 2 097 152 w ords by 8-bit organization 0 to 70 "C operating temperature Fast access and cycle time RAS access time: 50 ns (-50 version)
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5117805BSJ
5117805BSJ-50/-60/-70
23SbDS
DG71532
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MCM4517
Abstract: Intel 2118 MB8118 j200 transistor mb8118-10 MB8118-12 235n ice power 200 asc
Text: MB8118-10 MB8118-12 FUJITSU M IC R O E L E C T R O N IC S NMOS 16,384-BIT DYNAMIC RANDOM ACCESS MEMORY DESCRIPTIO N The Fujitsu MB8118 is a fully de coded dynam ic NMOS random ac cess m em ory organized as 16,384 one-bit words. The design is op tim ized for high-speed, high per
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384-BIT
MB8118-10
MB8118-12
MB8118
16-pin
MB811B-10)
MB8118-12
MB8118-10/MB8118-12
16-LEAD
MCM4517
Intel 2118
j200 transistor
235n
ice power 200 asc
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fujitsu ten ECU
Abstract: No abstract text available
Text: PRELIMINARY - - October 1995 Edition 1.0 FUJITSU PRODUCT PROFILE SHEET M B 8 1 1 8 1 6 5 A - 6 0 /- 7 0 CMOS 1M X 16BIT HYPER PAGE MODE DYNAMIC RAM C M O S 1,048, 576 x 1 6B IT H yper Page M o d e D y n a m i c RAM T h e F u jitsu M B 8 1 1 8 1 6 5 A is a fu lly d e c o d e d C M O S D y n a m ic R A M D R A M th a t co n ta in s
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16BIT
5A-70
fujitsu ten ECU
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TCP 8118
Abstract: TPC 8118
Text: SMJ4464 65,536-WORD BY 4-BIT DYNAMIC RANDOM ACCESS MEMORY SEPTEM 0ER 6 5,5 36 x 4 Organization JD PACKAG E TO P V IEW Single 5-V Supply (10% Tolerance) 1 u DQ1 c 2 DQ2 £ 3 JE D E C Standardized Pinout 4 wC 4 ras£ Performance Ranges: ACCESS A CCESS R EA D
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SMJ4464
536-WORD
J4416
TCP 8118
TPC 8118
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Untitled
Abstract: No abstract text available
Text: SIEMENS HYB 5116405BJ/BT -50/-60/-70 HYB 5117405BJ/BT -50/-60/-70 4M x 4-Bit Dynamic RAM 2k & 4k Refresh Hyper Page Mode - EDO P re lim in a ry In fo rm a tio n m ax. 6 6 0 m W a ctive • 4 194 3 0 4 w o rd s by 4 -b it o rg a n iz a tio n • 0 to 70 C o p e ra tin g te m p e ra tu re
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CHIPX
Abstract: MB98A81183-15 mb98a800 H-38-H
Text: FUJITSU SEMICONDUCTOR DATA SHEET DS05-30333-3E MEMORY 5V-ONLY FLASH MEMORY CARD M B 9 8 A 8 1 0 6 3 -1 5 /M B 9 8 A 8 1 1 8 3 -1 5 /M B 9 8 A 8 1 2 7 3 -1 5 / M B 9 8 A 8 1 3 7 3 -1 5 /M B 9 8 A 8 1 4 7 3 -1 5 /M B 9 8 A 8 1 5 7 3 -1 5 1M/2M/4M/8M/16M/32M-BYTE 5V-ONLY
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B98A81063-15/MB98A81183-15/MB98A81273-15/
MB98A81373-15/MB98A81473-15/MB98A81573-15
1M/2M/4M/8M/16M/32M-BYTE
68-pin
16-bit
CRD-68P-M17)
K68017SC-3-3
CHIPX
MB98A81183-15
mb98a800
H-38-H
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Untitled
Abstract: No abstract text available
Text: MEMORY 5V-0NLY FLASH MEMORY CARD M B 9 8 A 8 1 0 6 3 -1 5 /M B 9 8 A 8 1 1 8 3 -1 5 /M B 9 8 A 8 1 2 7 3 -1 5 / M B 9 8 A 8 1 3 7 3 -1 5 /M B 9 8 A 8 1 4 7 3 -1 5 /M B 9 8 A 8 1 5 7 3 -1 5 1M /2M /4M /8M /16M /32M -BYTE 5V-ONLY FLASH ERASABLE AND PROGRAM M ABLE MEMORY CARD
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68-pin
F9811
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DDA09
Abstract: No abstract text available
Text: CYM7232 CYM7264 DRAM Accelerator Module PRELIMINARY CYPRESS SEMICONDUCTOR Features • 4-megabyte to 1-gigabyte control ca pability • 32- or 64-bit bus interface M7232 only • 32* or 64-bit EDC versions — 1-bit correct; 2-bit detect • Multiplexed or non-multiplexed bus
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CYM7232
CYM7264
64-bit
M7232
40-MHz
25-ns
read/80-ns
InhibitYM7232Sâ
DDA09
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