LINEAR MARKING
Abstract: AB245 ti marking military part identification marking TI BINARY DATE CODE SN74ABT245DW AB245A TI date code TI Actual Topside Mark SN7400N
Text: Application Report SZZA020B - January 2001 Standard Linear & Logic Semiconductor Marking Guidelines James Huckabee and Cles Troxtell Standard Linear & Logic ABSTRACT The Texas Instruments TI Standard Linear & Logic (SLL) business group uses complex methods to assign device topside marking. These methods ensure that correct component
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SZZA020B
SSYZ010L
LINEAR MARKING
AB245
ti marking
military part identification marking
TI BINARY DATE CODE
SN74ABT245DW
AB245A
TI date code
TI Actual Topside Mark
SN7400N
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TI Actual Topside Mark
Abstract: ti marking AB245 AB245A SN74ABT245DW ABT245A ti MARKING CODE SZZA020C SN74ABT245N sn74abt245pw
Text: Application Report SZZA020C - March 2002 Standard Linear & Logic Semiconductor Marking Guidelines James Huckabee and Cles Troxtell Standard Linear & Logic ABSTRACT The Texas Instruments Standard Linear & Logic SLL business group uses complex methods to assign device topside marking. These methods ensure that correct component
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SZZA020C
TI Actual Topside Mark
ti marking
AB245
AB245A
SN74ABT245DW
ABT245A
ti MARKING CODE
SN74ABT245N
sn74abt245pw
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LP63
Abstract: LP2981A-29 LP2981-29
Text: LP2981 100ĆmA ULTRAĆLOW DROPOUT REGULATOR WITH SHUTDOWN SLVS521 − JULY 2004 D Available in the Texas Instruments D D D D D D D D D NanoStar Chip Scale Package Output Tolerance of: − 0.75% A Grade − 1.25% (Standard Grade) Ultra-Low Dropout, Typically
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LP2981
100mA
SLVS521
OT-23)
LP63
LP2981A-29
LP2981-29
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LP63
Abstract: TI Assembly Factory Code lpc3 marking code
Text: LP2981 100ĆmA ULTRAĆLOW DROPOUT REGULATOR WITH SHUTDOWN SLVS521A − JULY 2004 − REVISED SEPTEMBER 2004 D Available in the Texas Instruments D D D D D D D D D D NanoStar Chip Scale Package Fixed/ADJ Versions Output Tolerance of: − 0.75% A Grade
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LP2981
100mA
SLVS521A
OT-23)
LP63
TI Assembly Factory Code
lpc3 marking code
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LP2981A-18DBVR
Abstract: TOP-SIDE MARKING R1 LP2981-32YEUR LP2981 LP2981A-125DBVR LP2981A-125DBVT LP2981A-18DBVT LP2981A-25DBVR LP2981A-25DBVT LP2981DBVR
Text: LP2981 100ĆmA ULTRAĆLOW DROPOUT REGULATOR WITH SHUTDOWN SLVS521B − JULY 2004 − REVISED OCTOBER 2004 D Available in the Texas Instruments D D D D D D D D D D NanoStar Chip Scale Package Fixed/ADJ Versions Output Tolerance of: − 0.75% A Grade − 1.25% (Standard Grade)
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LP2981
100mA
SLVS521B
LP2981A-18DBVR
TOP-SIDE MARKING R1
LP2981-32YEUR
LP2981
LP2981A-125DBVR
LP2981A-125DBVT
LP2981A-18DBVT
LP2981A-25DBVR
LP2981A-25DBVT
LP2981DBVR
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LP2981
Abstract: LP2981-29 PACKAGE MARKING RADJ SOT23-5 LP2981A-125DBVR LP2981A-125DBVT LP2981A-18DBVR LP2981A-18DBVT LP2981A-25DBVR LP2981A-25DBVT LP2981DBVR
Text: LP2981 100ĆmA ULTRAĆLOW DROPOUT REGULATOR WITH SHUTDOWN SLVS521B − JULY 2004 − REVISED OCTOBER 2004 D Available in the Texas Instruments D D D D D D D D D D NanoStar Chip Scale Package Fixed/ADJ Versions Output Tolerance of: − 0.75% A Grade − 1.25% (Standard Grade)
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LP2981
100mA
SLVS521B
LP2981
LP2981-29
PACKAGE MARKING RADJ SOT23-5
LP2981A-125DBVR
LP2981A-125DBVT
LP2981A-18DBVR
LP2981A-18DBVT
LP2981A-25DBVR
LP2981A-25DBVT
LP2981DBVR
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Untitled
Abstract: No abstract text available
Text: SN74AUC2G00 DUAL 2-INPUT POSITIVE-NAND GATE www.ti.com SCES440C – MAY 2003 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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SN74AUC2G00
SCES440C
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74AUC2G32 DUAL 2-INPUT POSITIVE-OR GATE www.ti.com SCES478C – AUGUST 2003 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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SN74AUC2G32
SCES478C
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74LVC3G04 TRIPLE INVERTER GATE www.ti.com SCES363K – AUGUST 2001 – REVISED MAY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V Max tpd of 4.1 ns at 3.3 V
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SN74LVC3G04
SCES363K
24-mA
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74AUC2G08 DUAL 2-INPUT POSITIVE-AND GATE www.ti.com SCES477C – AUGUST 2003 – REVISED JANUARY 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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SN74AUC2G08
SCES477C
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74AUC2G02 DUAL 2-INPUT POSITIVE-NOR GATE www.ti.com SCES441C – MAY 2003 – REVISED JANUARY 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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SN74AUC2G02
SCES441C
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74LVC3G06 TRIPLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS www.ti.com SCES364I – AUGUST 2001 – REVISED FEBRUARY 2007 FEATURES • • • • • • • Available in the Texas Instruments NanoFree Package Supports 5-V VCC Operation Input and Open-Drain Output Accepts
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SN74LVC3G06
SCES364I
24-mA
000-V
A114-A)
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Untitled
Abstract: No abstract text available
Text: SN74LVC1GU04 SCES215U – APRIL 1999 – REVISED JUNE 2011 www.ti.com SINGLE INVERTER GATE Check for Samples: SN74LVC1GU04 FEATURES 1 • 2 • • • • • • • Available in the Texas Instruments NanoFree Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V
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SN74LVC1GU04
SCES215U
24-mA
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74AUC2G241 DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES535C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O
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SN74AUC2G241
SCES535C
000-V
A114-A)
A115-A)
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marking C25R
Abstract: c25r
Text: SN74LVC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES204M – APRIL 1999 – REVISED JANUARY 2007 FEATURES • • • • • • • • • Available in the Texas Instruments NanoFree Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V
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SN74LVC2G125
SCES204M
24-mA
000-V
A114-A)
A115-A)
marking C25R
c25r
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CU4R
Abstract: No abstract text available
Text: SN74LVC1GU04 SCES215U – APRIL 1999 – REVISED JUNE 2011 www.ti.com SINGLE INVERTER GATE Check for Samples: SN74LVC1GU04 FEATURES 1 • 2 • • • • • • • Available in the Texas Instruments NanoFree Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V
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SN74LVC1GU04
SCES215U
24-mA
000-V
A114-A)
A115-A)
CU4R
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CU4R
Abstract: No abstract text available
Text: SN74LVC1GU04 SCES215U – APRIL 1999 – REVISED JUNE 2011 www.ti.com SINGLE INVERTER GATE Check for Samples: SN74LVC1GU04 FEATURES 1 • 2 • • • • • • • Available in the Texas Instruments NanoFree Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V
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SN74LVC1GU04
SCES215U
24-mA
000-V
A114-A)
A115-A)
CU4R
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Untitled
Abstract: No abstract text available
Text: SN74LVC3G14 TRIPLE SCHMITT-TRIGGER INVERTER www.ti.com SCES367I – AUGUST 2001 – REVISED FEBRUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V
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SN74LVC3G14
SCES367I
24-mA
000-V
A114-A)
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Untitled
Abstract: No abstract text available
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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SN74AUC2G125
SCES532D
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74LVC2G32 DUAL 2-INPUT POSITIVE-OR GATE www.ti.com SCES201L – APRIL 1999 – REVISED FEBRUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V
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SN74LVC2G32
SCES201L
24-mA
000-V
A114-A)
A115-A)
1000-Vti
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Untitled
Abstract: No abstract text available
Text: SN74AUC2G86 DUAL 2-INPUT EXCLUSIVE-OR GATE www.ti.com SCES479B – AUGUST 2003 – REVISED JANUARY 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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SN74AUC2G86
SCES479B
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74LVC2G02 DUAL 2-INPUT POSITIVE-NOR GATE www.ti.com SCES194L – APRIL 1999 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V
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SN74LVC2G02
SCES194L
24-mA
000-V
A114-A)
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Untitled
Abstract: No abstract text available
Text: SN74AUC2G240 DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES534C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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SN74AUC2G240
SCES534C
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74AUC2G80 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES540C – JANUARY 2004 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V
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SN74AUC2G80
SCES540C
000-V
A114-A)
A115-A)
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