sumitomo epoxy
Abstract: EME 7320 7320 8361H CY7C375-AC JESD22
Text: Cypress Semiconductor Package Qualification Report QTP# 000303 VERSION 1.1 March, 2000 Up to160 Lead Thin Quad Flat Pack Sumitomo EME 7320 Mold Compound ASE Taiwan CYPRESS TECHNICAL CONTACT FOR QUALIFICATION DATA: Ed Russell Reliability Director 408 432-7069
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to160
CY7C375-AC
sumitomo epoxy
EME 7320
7320
8361H
CY7C375-AC
JESD22
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dual port SRAM PLCC
Abstract: CY7C133 CY7C138 CY7C139 CY7C143 CY7C144 CY7C145 CY7C016 CY7C024 CY7C0241
Text: Qualification Report May 1996, QTP# 95226, Version 1.0 Dual Port SRAM - R28 Technology Thin Quad Flat Pack Package CY7C0251 8K x 18 Dual Port SRAM CY7C025 8K x 16 Dual Port SRAM CY7C0241 4K x 18 Dual Port SRAM CY7C024 4K x 16 Dual Port SRAM CY7C145 8K x 9 Dual Port SRAM
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CY7C0251
CY7C025
CY7C0241
CY7C024
CY7C145
CY7C144
CY7C139
CY7C138
CY7C133
CY7C143
dual port SRAM PLCC
CY7C133
CY7C138
CY7C139
CY7C143
CY7C144
CY7C145
CY7C016
CY7C024
CY7C0241
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EME 7320
Abstract: Ablestik Ablestik 8361 7320 a144g SUMITOMO EME G A100A CY7C09579V-AC JESD22 ASE Cypress
Text: Cypress Semiconductor Mold Compound Qualification Report QTP# 002403 VERSION 1.0 January, 2001 Sumitomo EME 7320 Mold Compound, MSL3 for DCD-Thin Quad Flat Pack, TQFP ASE Taiwan CYPRESS TECHNICAL CONTACT FOR QUALIFICATION DATA: Ed Russell Reliability Director
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Original
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PDF
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160-lead
CY7C375I-AC
EME 7320
Ablestik
Ablestik 8361
7320
a144g
SUMITOMO EME G
A100A
CY7C09579V-AC
JESD22
ASE Cypress
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Untitled
Abstract: No abstract text available
Text: CYPRESS CY7C09269/79/89 CY7C09369/79/89 PRELIMINARY 16K/32K/64K x16/18 Synchronous Dual Port Static RAM • Low operating power Features • True dual-ported m em ory cells which allow sim ulta neous access of the same m em ory location • Six Flow-Through/Pipelined devices
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OCR Scan
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CY7C09269/79/89
CY7C09369/79/89
16K/32K/64K
x16/18
CY7C09269/369)
CY7C09279/379)
CY7C09289/389)
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QX 78
Abstract: No abstract text available
Text: CYPRESS C Y 7C 09079/89/99 C Y 7C 09179/89/99 PRELIMINARY 32K/64K/128 K x 8/9 Synchronous Dual-Port Static RAM • High-speed clock to data access 6.5^1V7.5/9/12 ns max. • Low operating power Features True dual-ported m em ory cells which allow sim ulta
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OCR Scan
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PDF
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32K/64K/128
CY7C09079/179)
CY7C09089/189)
CY7C09099/199)
QX 78
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Untitled
Abstract: No abstract text available
Text: fax id: 5217 W CYPRESS CY7C09269/79/89 PRELIMINARY _ CY7C09369/79/89 16K/32K/64K x16/18 Synchronous Dual Port Static RAM Low operating power Features • True Dual-Ported mem ory cells which allow sim ulta neous access of the same mem ory location
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OCR Scan
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PDF
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CY7C09269/79/89
CY7C09369/79/89
16K/32K/64K
x16/18
CY7C09269/369)
CY7C09279/379)
CY7C09289/389)
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hcn 73
Abstract: IDT709079 IDT709089
Text: : mMMMMWWJ!. CYPRESS CY7C09079/89/99 CY7C09179/89/99 PRELIMINARY 32K/64K/128K x 8/9 Synchronous Dual-Port Static RAM Features • High-speed clock to data access 6.5/7.5/9/12 ns max. • Low operating power • True Dual-Ported mem ory cells which allow sim ulta
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OCR Scan
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PDF
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CY7C09079/89/99
CY7C09179/89/99
CY7C09079/179)
CY7C09089/189)
CY7C09099/199)
100-MHz
35-micron
32K/64K/128K
hcn 73
IDT709079
IDT709089
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PFR 15T
Abstract: c3ke hcn 73 IDT709269 IDT709279 014L
Text: : mMMMMWMJ!. CY7C09269/79/89 CY7C09369/79/89 PRELIMINARY CYPRESS 16K/32K/64K x16/18 Synchronous Dual Port Static RAM • Low operating power Features — Active= 195 mA typical • True Dual-Ported mem ory cells which allow sim ulta neous access of the same memory location
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OCR Scan
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PDF
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CY7C09269/79/89
CY7C09369/79/89
16K/32K/64K
x16/18
CY7C09269/369)
CY7C09279/379)
CY7C09289/389)
100-MHz
35-micron
PFR 15T
c3ke
hcn 73
IDT709269
IDT709279
014L
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Untitled
Abstract: No abstract text available
Text: fax id: 5217 .- s s g g B ^ I CYPRESS CY7C09269/79/89 CY7C09369/79/89 PRELIMINARY 16K/32K/64K x16/18 Synchronous Dual Port Static RAM Features • True Dual-Ported memory cells which allow simulta neous access of the same memory location • 6 Flow-Through/Pipelined devices
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OCR Scan
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PDF
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CY7C09269/79/89
CY7C09369/79/89
16K/32K/64K
x16/18
100-pin
IDT709269,
IDT70927,
IDT709279
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Untitled
Abstract: No abstract text available
Text: CYPRESS CY7C09269V/79V/89V CY7C09369V/79V/89V PRELIMINARY 3.3V 16K/32K/64Kx 16/18 Synchronous Dual-Port Static RAM • High-speed clock to data access 7.5^1V9/12 ns max. • 3.3V Low operating power Features • True Dual-Ported mem ory cells which allow sim ulta
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PDF
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CY7C09269V/79V/89V
CY7C09369V/79V/89V
16K/32K/64Kx
1V9/12
CY7C09269V/369V)
CY7C09279V/379V)
CY7C09289V/389V)
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47 16L xn
Abstract: A16R161 IDT709079 IDT709089
Text: CYPRESS CY7C09079A/89/99 CY7C09179A/89/99 PRELIMINARY 32K/64K/128 K x 8/9 Synchronous Dual-Port Static RAM • High-speed clock to data access 6.5^1V7.5/9/12 ns max. • Low operating power Features True dual-ported m em ory cells which allow sim ulta
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OCR Scan
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PDF
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CY7C09079A/89/99
CY7C09179A/89/99
CY7C09079A/179A)
CY7C09089/189)
CY7C09099/199)
100-MHz
35-micron
32K/64K/128
47 16L xn
A16R161
IDT709079
IDT709089
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l0249
Abstract: CY37032VP44-100AI
Text: CYPRESS PRELIMINARY Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs General Description Features • In-System Reprogram mable ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes
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Ultra37000TM
Ultra37000
22V10
84-Pin
l0249
CY37032VP44-100AI
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MAC HCN
Abstract: 016l IDT709269 IDT709279 SL414 xeee
Text: CYPRESS CY7C09269A/79/89 CY7C09369A/79/89 PRELIMINARY 16K/32K/64K x16/18 Synchronous Dual Port Static RAM • Low operating power Features • True dual-ported m em ory cells which allow sim ulta neous access of the same m em ory location • Six Flow-Through/Pipelined devices
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OCR Scan
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PDF
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CY7C09269A/79/89
CY7C09369A/79/89
16K/32K/64K
x16/18
CY7C09269A/369A)
CY7C09279/379)
CY7C09289/389)
100-MHz
35-micron
MAC HCN
016l
IDT709269
IDT709279
SL414
xeee
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CY7C09099V
Abstract: No abstract text available
Text: CYPRESS PRELIMINARY 3.3V 32K/64K/128K x 8/9 Synchronous Dual-Port Static RAM High-speed clock to data access 6 .5 ^ ’ 2V 7.5^ /9/12 ns max. 3.3V low operating power Features • True Dual-Ported mem ory cells which allow sim ulta neous access of the same m em ory location
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OCR Scan
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PDF
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32K/64K/128K
CY7C09079V/179V)
CY7C09089V/189V)
CY7C09079V/89V/99V
CY7C09179V/89V/99V
CY7C09099V/199V)
CY7C09099V
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clcc land pattern
Abstract: CY37512VP208-66UMB CY37032VP44-100AI CY37064P44-154YMB CY37256P160-125UMB TO-220AB/clcc land pattern
Text: CYPRESS PRELIMINARY Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs General Description Features • In-System Reprogram mable ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes
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OCR Scan
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Ultra37000TM
Ultra37000
22V10
clcc land pattern
CY37512VP208-66UMB
CY37032VP44-100AI
CY37064P44-154YMB
CY37256P160-125UMB
TO-220AB/clcc land pattern
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CY7C09389V
Abstract: No abstract text available
Text: CY7C09269V/79V/89V CY7C09369V/79V/89V PRELIMINARY * / CYPRESS 3.3V 16K/32K/64Kx 16/18 Synchronous Dual-Port Static RAM High-speed clock to data access 6.5l1’ 2]/7 .5^ /9/1 2 ns max. 3.3V low operating power Features • True Dual-Ported mem ory cells which allow sim ulta
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OCR Scan
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PDF
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CY7C09269V/79V/89V
CY7C09369V/79V/89V
16K/32K/64Kx
CY7C09269V/369V)
CY7C09279V/379V)
CY7C09289V/389V)
CY7C09389V
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Untitled
Abstract: No abstract text available
Text: fax id: 5217 ^CYPRESS CY7C09269/79/89 CY7C09369/79/89 PRELIMINARY 16K/32K/64K x16/18 Synchronous Dual Port Static RAM • Low operating power Features • True Dual-Ported mem ory cells which allow sim ulta neous access of the same mem ory location • 6 Flow-Through/Pipelined devices
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OCR Scan
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PDF
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CY7C09269/79/89
CY7C09369/79/89
16K/32K/64K
x16/18
CY7C09269/369)
CY7C09279/379)
CY7C09289/389)
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CY7C09099V
Abstract: No abstract text available
Text: CYPRESS PRELIMINARY CY7C09079V/89V/99V CY7C09179V/89V/99V 3.3V 32K/64K/128K x 8/9 Synchronous Dual-Port Static RAM Features • True Dual-Ported mem ory cells which allow sim ulta neous access of the same mem ory location • 6 Flow-Through/Pipelined devices
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OCR Scan
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PDF
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CY7C09079V/89V/99V
CY7C09179V/89V/99V
32K/64K/128K
35-micron
CY7C09079V/179V)
CY7C09089V/189V)
CY7C09099V/199V)
CY7C09099V
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Untitled
Abstract: No abstract text available
Text: fax id: 5206 CY7C024/0241 CY7C025/Q251 CYPRESS 4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with Sem, Int, Busy Functional Description Features True Dual-Ported memory cells which allow simultaneous reads of the same memory location 4K x 16 organization CY7C024
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PDF
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CY7C024)
CY7C0241)
CY7C025)
CY7C0251)
65-micron
84-pin
CY7C024/0241
CY7C025/0251
CY7C0251
CY7C0251-25AC
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CY7C09099V
Abstract: A10FL
Text: fax id: 5210 CYPRESS PRELIMINARY CY7C09079V/89V/99V CY7C09179V/89V/99V 3.3V 32K/64K/128K x 8/9 Synchronous Dual Port Static RAM Features 0.35-mlcron CMOS for optimum speed/power High-speed clock to data access 10/12 ns max. 3.3V Low operating power • True Dual-Ported memory cells which allow simulta
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CY7C09079V/89V/99V
CY7C09179V/89V/99V
32K/64K/128K
35-mlcron
100-pin
CY7C09189V-1
CY7C09189V-12AC
CY7C09189V-12AI
CY7C09099V
A10FL
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A144 Package
Abstract: quad CMOS 16 lead flat pack U208
Text: CY7C387P CY7C388P UltraLogic Very High Speed 8K Gate CMOS FPGA y CYPRESS Features • Very high speed — Loadable counter frequencies greater than 150 MHz — Chip-to-ehip operating frequencies up to 110 MHz — Input + logic cell + output delays under 6 ns
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144-pin
208-pin
223-pin
16-bit
CY7C388P--2NC
CY7C388P--2NI
388P-1N
CY7C388P--INI
388P-1G
388P-0N
A144 Package
quad CMOS 16 lead flat pack
U208
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CY7C09099V
Abstract: No abstract text available
Text: fax id: 5210 CYPRESS CY7C09079V/89V/99V CY7C09179V/89V/99V PRELIMINARY 3.3V 32K/64K/128K x 8/9 Synchronous Dual Port Static RAM Features • True Dual-Ported mem ory cells which allow sim ulta neous access of the same mem ory location • 6 Flow-Through/Pipelined devices
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OCR Scan
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PDF
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CY7C09079V/89V/99V
CY7C09179V/89V/99V
32K/64K/128K
35-micron
CY7C09079V/179V)
CY7C09089V/189V)
CY7C09099V/199V)
CY7C09099V
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CY7C09099V
Abstract: hcn 73
Text: fax id: 5210 CYPRESS PRELIMINARY CY7C09079V/89V/99V CY7C09179V/89V/99V 3.3V 32K/64K/128K x 8/9 Synchronous Dual-Port Static RAM Features • True Dual-Ported mem ory cells which allow sim ulta neous access of the same mem ory location • 6 Flow-Through/Pipelined devices
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OCR Scan
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PDF
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CY7C09079V/89V/99V
CY7C09179V/89V/99V
32K/64K/128K
35-micron
CY7C09079V/179V)
CY7C09089V/189V)
CY7C09099V/199V)
CY7C09099V
hcn 73
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FPGA 144 CPGA 172 PLCC ASIC
Abstract: A144 CY7C386A CY7C387A CY7C387A-2GC CY7C388A CY7C387A2AI
Text: CY7C387A CY7C388A PRELIMINARY CYPRESS Very High Speed 8K 24K Gate CMOS FPGA Features — 16-bit counter operating at 100 MHz consumes 50 mA — Minimum I o l of 12 mA and Ioh °f • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating frequencies
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CY7C387A
CY7C388A
145-pin
245-pin
144-pin
208-pin
160-pin
225-pin
16-bit
FPGA 144 CPGA 172 PLCC ASIC
A144
CY7C386A
CY7C387A-2GC
CY7C388A
CY7C387A2AI
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