DLR1040
Abstract: PM5345 PM7321 STS-48 signal path designer the 155.52 mbit/s physical layer interface schematics
Text: PMC-Sierra, Inc. APPLICATION NOTE PREVIEW INFORMATION THE ATM PHYSICAL LAYER THE ATM PHYSICAL LAYER
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930410V1
DLR1040
PM5345
PM7321
STS-48
signal path designer
the 155.52 mbit/s physical layer interface schematics
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GR-253-CORE
Abstract: PM5358 PM5382 TSX 017
Text: PM5358 S/UNI -4x622 Advance Quad Channel OC-12c ATM and POS Physical Layer Device FEATURES • Single chip quad ATM and POS UserNetwork Interface operating at 622 Mbit/s. • Implements the ATM Forum User Network Interface Specification and the ATM physical layer for Broadband
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PM5358
-4x622
OC-12c
STS-12c
GR-253-CORE
PMC-2000331
GR-253-CORE
PM5358
PM5382
TSX 017
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RCA H 432
Abstract: PM5384 radr GR-253-CORE 3G ATM "network interface cards"
Text: PM5384 S/UNI 1x155 Released Single Channel OC-3c ATM and POS Physical Layer Device FEATURES • Single chip ATM and Packet over SONET/SDH Physical Layer Device operating at 155.52 Mbit/s. • Implements the ATM Forum User Network Interface UNI and the ATM
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PM5384
1x155
GR-253-CORE
PMC-2011690
RCA H 432
PM5384
radr
GR-253-CORE
3G ATM
"network interface cards"
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3G ATM
Abstract: GR-253-CORE PM5384 physical layer interface processor
Text: PM5384 S/UNI -1x155 Advance Single Channel OC-3c ATM and POS Physical Layer Device FEATURES • Single chip ATM and Packet over SONET/SDH Physical Layer Device operating at 155.52 Mbit/s. • Implements the ATM Forum User Network Interface UNI and the ATM
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PM5384
-1x155
GR-253-CORE
GR-253-
PMC-2011690
3G ATM
GR-253-CORE
PM5384
physical layer interface processor
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GR-253-CORE
Abstract: PM5358 PM5382
Text: PM5358 S/UNI -4x622 Advance Quad Channel OC-12c ATM and POS Physical Layer Device FEATURES • Single chip quad ATM and POS UserNetwork Interface operating at 622 Mbit/s. • Implements the ATM Forum User Network Interface Specification and the ATM physical layer for Broadband
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PM5358
-4x622
OC-12c
STS-12c
GR-253-CORE
PMC-2000331
GR-253-CORE
PM5358
PM5382
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Untitled
Abstract: No abstract text available
Text: DATA SHEET Communications ATM XRT7245 DS3 UNI User Network Interface IC for ATM The XR-T7245 DS3 ATM User Network Interface (UNI) device is designed to provide the ATM Physical Layer (Physical Medium Dependent and Transmission Convergence sub-layers) interface for the public and private networks at DS3 rates. This device
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XRT7245
XR-T7245
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vlsi technology
Abstract: vlsi design physical verification ATM circuit diagram Alarm indication signal
Text: Networking Communications VNS67200 ATM Quad UNI Four channel single-chip ATM physical layer I/O device OVERVIEW The VNS67200 ATM Quad User Network Interface Quad UNI from VLSI is a four channel single-chip ATM physical layer I/O device designed for use in ATM Local Area Network (LAN)
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VNS67200
PB-VNS67200QUAD/UNI
vlsi technology
vlsi design physical verification
ATM circuit diagram
Alarm indication signal
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Untitled
Abstract: No abstract text available
Text: DATA SHEET Communications ATM XRT7234 E3 UNI User Network Interface IC for ATM The XR-T7234 E3 ATM User Network Interface (UNI) device is designed to provide the ATM Physical Layer (Physical Medium Dependent and Transmission Convergence sub-layers) interface for the public and private networks at E3 rates. This device provides
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XRT7234
XR-T7234
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Untitled
Abstract: No abstract text available
Text: XRT72L71 PRELIMINARY DS3 ATM UNI/CLEAR CHANNEL FRAMER IC APRIL 2000 REV. P1.0.2 GENERAL DESCRIPTION The XRT72L71 DS3 ATM User Network Interface UNI /Clear-Channel Framer device is designed to function as either a DS3 ATM UNI or Clear channel framer IC. For ATM UNI applications, this device provides the ATM Physical Layer (Physical Medium Dependent and Transmission Convergence sub-layers)
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XRT72L71
XRT72L71
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satellite phone system
Abstract: No abstract text available
Text: network access products OCTAL ATM PHY Solution RS8228 Octal ATM Transmission Convergence Physical Layer PHY Device Conexant’s RS8228 dramatically improves performance for switch and access system low-speed ports, by integrating all of the ATM physical layer processing functions found in the ATM Forum CellBased Transmission Convergence Sublayer specification for eight
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RS8228
RS8228
satellite phone system
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STM-1 Physical interface PHY
Abstract: ATM circuit diagram STM-16 physical Architecture tsct 1000 THE ATM PHYSICAL LAYER OC-24 STM-16 STS-48 192-Kbit mtu 1622
Text: SONET/SDH and ATM The Local Area Network Agenda 6ssxqÀ3REÀ AxyÀEesxiewÀ Fiyusxq • • • • • Section 1: Physical layers for ATM* Section 2: SONET*/SDH*as a physical layer for ATM Section 3: ATM Section 4: ATM and related protocols
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SDNA005
STM-1 Physical interface PHY
ATM circuit diagram
STM-16 physical Architecture
tsct 1000
THE ATM PHYSICAL LAYER
OC-24
STM-16
STS-48
192-Kbit
mtu 1622
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1x10G
Abstract: P802 PM5390 STM-64 STS-192 UNI-9953 64-bin 6464C
Text: PM5390 S/UNI -9953 Advance 10 Gbit/s Physical Layer Device for POS, ATM and Ethernet FEATURES • Implements the ATM Forum User Network Interface Specification and the ATM physical layer for Broadband ISDN according to CCITT Rec. I.432. • Implements the Point-to-Point Protocol
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PM5390
STS-48c
STM-16-16c)
STS-192
STM-64)
STM-16c)
STS-192c
PMC-2000181
1x10G
P802
PM5390
STM-64
STS-192
UNI-9953
64-bin
6464C
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Cx2829
Abstract: ,national semiconductor Linear brief lb-3
Text: CX28250 ATM Physical Interface PHY Devices The CX28250 is an ATM-SONET Physical Layer (PHY) device with an integrated, PLL clock and data recovery (CDR) circuit. This device has optimized SONET framer functions for mapping ATM cells to SONET payloads for edge switch applications, and
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CX28250
53-byte
28250-DSH-002-A
CX28250
Cx2829
,national semiconductor Linear brief lb-3
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8032 Intel Microprocessor data Sheet
Abstract: atm header error checking ATM machine using microcontroller dmo 265 NAIS 210 T7296 3-bit comparator circuit receives two 3-bit 8052 microcontroller Intel LOG RX 2 1018 IC ordinary calculator programming
Text: áç XRT7245 PRELIMINARY DS3 UNI FOR ATM DECEMBER 1999 REV. 1.03 GENERAL DESCRIPTION • Contains on-chip 16 cell FIFO configurable in The XRT7245 DS3 ATM User Network Interface (UNI device is designed to provide the ATM Physical Layer (Physical Medium Dependent and Transmission Convergence sub-layers) interface for the public
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XRT7245
XRT7245
CellOf52Bytes)
8032 Intel Microprocessor data Sheet
atm header error checking
ATM machine using microcontroller
dmo 265
NAIS 210
T7296
3-bit comparator circuit receives two 3-bit
8052 microcontroller Intel
LOG RX 2 1018 IC
ordinary calculator programming
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Cx2829
Abstract: A1020 transistor Cx28297 A1020 0x19-RXG1 a1633 J119 J512 j512 data sheet "network interface cards"
Text: CX28250 ATM Physical Interface PHY Devices The CX28250 is an ATM-SONET Physical Layer (PHY) device with an integrated, PLL clock and data recovery (CDR) circuit. This device has optimized SONET framer functions for mapping ATM cells to SONET payloads for edge switch applications, and
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CX28250
CX28250
53-byte
TXZ02
28250-DSH-002-C
Cx2829
A1020 transistor
Cx28297
A1020
0x19-RXG1
a1633
J119
J512
j512 data sheet
"network interface cards"
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Cx2829
Abstract: TXC24 0x46-RXLIN "network interface cards" Trec Part Numbering System GR
Text: CX28250 ATM Physical Interface PHY Devices The CX28250 is an ATM-SONET Physical Layer (PHY) device with an integrated, PLL clock and data recovery (CDR) circuit. This device has optimized SONET framer functions for mapping ATM cells to SONET payloads for edge switch applications, and
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CX28250
53-byte
CX28250
500035D
Cx2829
TXC24
0x46-RXLIN
"network interface cards"
Trec Part Numbering System GR
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B56A
Abstract: Cx2829 J311 B21AD
Text: CX28250 ATM Physical Interface PHY Devices The CX28250 is an ATM-SONET Physical Layer (PHY) device with an integrated, PLL clock and data recovery (CDR) circuit. This device has optimized SONET framer functions for mapping ATM cells to SONET payloads for edge switch applications, and
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CX28250
53-byte
28250-DSH-002-B
CX28250
B56A
Cx2829
J311
B21AD
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CX2829
Abstract: J119 J512 A1020 transistor a1633 d705 led CX28250-23 CX28250-26 GR-253-CORE 24V to 15V REGULATOR IC
Text: CX28250 ATM Physical Interface PHY Devices The CX28250 is an ATM-SONET Physical Layer (PHY) device with an integrated, PLL clock and data recovery (CDR) circuit. This device has optimized SONET framer functions for mapping ATM cells to SONET payloads for edge switch applications, and
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CX28250
CX28250
53-byte
TXZ02
28250-DSH-002-A
CX2829
J119
J512
A1020 transistor
a1633
d705 led
CX28250-23
CX28250-26
GR-253-CORE
24V to 15V REGULATOR IC
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8052 microcontroller Intel
Abstract: GR-499-CORE XRT7295 XRT7296 XR-T7296 XRT7300 flowchart of LCD interface with 8051 fc22825
Text: áç XRT7245 PRELIMINARY DS3 UNI FOR ATM DECEMBER 1999 REV. 1.03 GENERAL DESCRIPTION • Contains on-chip 16 cell FIFO configurable in The XRT7245 DS3 ATM User Network Interface (UNI device is designed to provide the ATM Physical Layer (Physical Medium Dependent and Transmission Convergence sub-layers) interface for the public
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XRT7245
XRT7245
CellOf52Bytes)
8052 microcontroller Intel
GR-499-CORE
XRT7295
XRT7296
XR-T7296
XRT7300
flowchart of LCD interface with 8051
fc22825
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77V1254
Abstract: ATM25 IDT77V1254L25 nrzi clock recovery
Text: IDT77V1254L25 Quad Port PHY Physical Layer for 25.6 and 51.2 ATM Networks Features List ! ! ! ! ! ! ! ! ! ! ! ! Description Performs the PHY-Transmission Convergence (TC) and Physical Media Dependent (PMD) Sublayer functions for four 25.6 Mbps ATM channels
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IDT77V1254L25
af-phy-040
144-pin
77V1254
ATM25
IDT77V1254L25
nrzi clock recovery
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74222 fifo
Abstract: NAIS 210 GR-499-CORE XRT7295 XRT7296 XRT7300 S/74222 fifo
Text: áç XRT7245 PRELIMINARY DS3 UNI FOR ATM DECEMBER 1999 REV. 1.03 GENERAL DESCRIPTION • Contains on-chip 16 cell FIFO configurable in The XRT7245 DS3 ATM User Network Interface (UNI device is designed to provide the ATM Physical Layer (Physical Medium Dependent and Transmission Convergence sub-layers) interface for the public
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XRT7245
XRT7245
74222 fifo
NAIS 210
GR-499-CORE
XRT7295
XRT7296
XRT7300
S/74222 fifo
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prng
Abstract: 77V106 IDT77V106 IDT77V106L25 PE-67583 TLA-6M103
Text: IDT77V106L25 3.3V ATM PHY for 25.6 and 51.2 Mbps Features ! ! ! ! ! ! ! ! ! ! ! ! ! Description Performs the PHY-Transmission Convergence TC and Physical Media Dependent (PMD) Sublayer functions of the Physical Layer Compliant to ATM Forum (af-phy-040.000) and ITU-T I.432.5
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IDT77V106L25
af-phy-040
64-lead
prng
77V106
IDT77V106
IDT77V106L25
PE-67583
TLA-6M103
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PE-67583
Abstract: SF1153 77V106 77V1254 IDT77V106 TLA-6M103
Text: 3.3V ATM PHY for 25.6 and 51.2 Mbps Features * Performs the PHY-Transmission Convergence TC and Physical Media Dependent (PMD) Sublayer functions of the Physical Layer * Compliant to ATM Forum (af-phy-040.000) and ITU-T I.432.5 specifications for 25.6 Mbps physical interface
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IDT77V106
af-phy-040
11nterface
64-lead
10x10
IDT77V106
PP64-1)
77V106
25Mbps
PE-67583
SF1153
77V1254
TLA-6M103
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CHN 802
Abstract: No abstract text available
Text: ADVANCE INFORMATION IDT77V1254 Quad PHY Physical Layer for 25.6 and 51.2 Mbps ATM Networks FEATURES DESCRIPTION • Performs the PHY-Transmission Convergence (TC) and Physical Media Dependent (PMD) Sublayer functions for four 25.6 Mpbs ATM channels • Compliant to ATM Forum specification for 25.6 Mbps
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IDT77V1254
af-phy-040
144-pin
IDT77V1254
77V1254
25Mb/s
CHN 802
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