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    SMC Corporation of America MIW32TF-32D

    ESCAPEMENT, DBL FINGER, PNEU, MIW SERIES | SMC Corporation MIW32TF-32D
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    RS MIW32TF-32D Bulk 5 Weeks 1
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    Pizzato Elettrica Srl VE TF32D5105

    Label with shaped hole | Pizzato USA VE TF32D5105
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    Pizzato Elettrica Srl VE TF32D5700

    Label w/ shaped hole, 90 mm, yellow disc, no writing | Pizzato USA VE TF32D5700
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    SMC Corporation of America MIW32TF-32D2

    ESCAPEMENT, DBL FINGER, PNEU, MIW SERIES | SMC Corporation MIW32TF-32D2
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    RS MIW32TF-32D2 Bulk 5 Weeks 1
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    SMC Corporation of America MIW32TF-32D1

    ESCAPEMENT, DBL FINGER, PNEU, MIW SERIES | SMC Corporation MIW32TF-32D1
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    RS MIW32TF-32D1 Bulk 5 Weeks 1
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    TF32D Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: T1/E1/OC3 WAN PLL WITH SINGLE REFERENCE INPUT FEATURES • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces • Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interface • Selectable input reference: 8 kHz, 1.544 MHz, 2.048 MHz or 19.44


    Original
    PDF IDT82V3011 TR62411 GR-1244-CORE IDT82V3011 82V3011

    Untitled

    Abstract: No abstract text available
    Text: WAN PLL WITH DUAL REFERENCE INPUTS FEATURES • • • • • • • • • • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 3, Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces Supports ITU-T G.813 Option 1 clocks for 2048 kbit/s interfaces


    Original
    PDF IDT82V3002 TR62411 GR-1244-CORE com/docs/PSC4029

    Untitled

    Abstract: No abstract text available
    Text: T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS FEATURES IDT82V3012 • Provides a C2/C1.5 output clock signal with the frequency controlled by the selected reference input Fref0 or Fref1 • Holdover frequency accuracy of 0.025 ppm • Phase slope of 5 ns per 125 µs


    Original
    PDF TR62411 GR-1244-CORE IDT82V3012 DT82V3012 PVG56) 82V3012

    Untitled

    Abstract: No abstract text available
    Text: WAN PLL WITH DUAL REFERENCE INPUTS IDT82V3002A FEATURES • • • • • • • • • • • • • • • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 3, Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces • Supports ITU-T G.813 Option 1 clocks for 2048 kbit/s interfaces


    Original
    PDF TR62411 GR-1244-CORE IDT82V3002A freqDT82V3002A PVG56) 82V3002A

    32.768mhz ic

    Abstract: No abstract text available
    Text: WAN PLL WITH SINGLE REFERENCE CLOCK FEATURES • • • • • • • • • Supports AT&T TR62411 and Bellcore GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interface


    Original
    PDF IDT82V3001 TR62411 GR-1244-CORE 544MHz 048MHz 025ppm 5ns/125 600ns Fr001 32.768mhz ic

    C155

    Abstract: GR-1244-CORE IDT82V3155 TR62411
    Text: ENHANCED T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS IDT82V3155 FEATURES • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 3, Stratum 4 Enhanced and Stratum 4 clock, OC-3 port and 155.52 Mbit/s application • Supports ITU-T G.813 Option 1 clocks


    Original
    PDF IDT82V3155 TR62411 GR-1244-CORE PVG56) 82V3155 C155 IDT82V3155

    Untitled

    Abstract: No abstract text available
    Text: WAN PLL WITH SINGLE REFERENCE INPUT IDT82V3001A FEATURES • • • • • • • • • • • • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces • Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interface


    Original
    PDF IDT82V3001A TR62411 GR-1244-CORE ns/125 PVG56) 82V3001A

    GR-1244-CORE

    Abstract: TR62411 PLL 2400 MHZ
    Text: WAN PLL WITH SINGLE REFERENCE INPUT FEATURES • • • • • • • • • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interface


    Original
    PDF TR62411 GR-1244-CORE ns/125 IDT82V3001 com/docs/PSC4029 PLL 2400 MHZ

    GR-1244-CORE

    Abstract: GR1244-CORE IDT82V3011 SSOP56 TR62411
    Text: T1/E1/OC3 WAN PLL WITH SINGLE REFERENCE INPUT FEATURES • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces • Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interface • Selectable input reference: 8 kHz, 1.544 MHz, 2.048 MHz or 19.44


    Original
    PDF IDT82V3011 TR62411 GR-1244-CORE IDT82V3011 82V3011 GR1244-CORE SSOP56

    Untitled

    Abstract: No abstract text available
    Text: WAN PLL WITH SINGLE REFERENCE INPUT IDT82V3001A FEATURES • • • • • • • • • • • • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces • Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interface


    Original
    PDF IDT82V3001A TR62411 GR-1244-CORE ns/125 IDT82V3001A 82V3001A

    C155

    Abstract: GR-1244-CORE IDT82V3155 SSOP56 TR62411
    Text: ENHANCED T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS FEATURES IDT82V3155 • Provides a C2/C1.5 output clock signal with the frequency controlled by the selected reference input Fref0 or Fref1 • Holdover frequency accuracy of 0.025 ppm • Phase slope of 5 ns per 125 µs


    Original
    PDF IDT82V3155 56-pin TR62411 GR-1244-CORE IDT82V3155 82V3155 C155 SSOP56

    GR-1244-CORE

    Abstract: GR1244-CORE IDT82V3001A SSOP56 TR62411
    Text: WAN PLL WITH SINGLE REFERENCE INPUT IDT82V3001A FEATURES • • • • • • • • • • • • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces • Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interface


    Original
    PDF IDT82V3001A TR62411 GR-1244-CORE ns/125 IDT82V3001A 82V3001A GR1244-CORE SSOP56

    GR-1244-CORE

    Abstract: IDT82V3012 SSOP56 TR62411
    Text: T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS FEATURES IDT82V3012 • Provides a C2/C1.5 output clock signal with the frequency controlled by the selected reference input Fref0 or Fref1 • Holdover frequency accuracy of 0.025 ppm • Phase slope of 5 ns per 125 µs


    Original
    PDF IDT82V3012 56-pin TR62411 GR-1244-CORE IDT82V3012 82V3012 SSOP56

    GR-1244-CORE

    Abstract: GR1244-CORE IDT82V3001A SSOP56 TR62411
    Text: WAN PLL WITH SINGLE REFERENCE INPUT IDT82V3001A FEATURES • • • • • • • • • • • • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces • Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interface


    Original
    PDF IDT82V3001A TR62411 GR-1244-CORE ns/125 PVG56) 82V3001A GR1244-CORE IDT82V3001A SSOP56

    Untitled

    Abstract: No abstract text available
    Text: T1/E1/OC3 WAN PLL WITH SINGLE REFERENCE INPUT FEATURES • • • • • • • • • • • • • • • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces • Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing


    Original
    PDF TR62411 GR-1244-CORE IDT82V3011 IDT82V3011 PVG56) 82V3011

    Untitled

    Abstract: No abstract text available
    Text: T1/E1/OC3 WAN PLL WITH SINGLE REFERENCE INPUT FEATURES • • • • • • • • • • • • • • • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces • Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing


    Original
    PDF TR62411 GR-1244-CORE IDT82V3011 IDT82V3011 82V3011

    tC32D

    Abstract: IDT82V3001A
    Text: IDT82V3001A Data Sheet Change Notice Supplemental Information This notice describes the differences between the updated version and its previous version of the IDT82V3001A Data Sheet. It helps readers to identify the changes when the data sheet is upgraded.


    Original
    PDF IDT82V3001A Table-18 tC32D

    Untitled

    Abstract: No abstract text available
    Text: ENHANCED T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS IDT82V3155 FEATURES • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 3, Stratum 4 Enhanced and Stratum 4 clock, OC-3 port and 155.52 Mbit/s application • Supports ITU-T G.813 Option 1 clocks


    Original
    PDF IDT82V3155 TR62411 GR-1244-CORE PVG56) 82V3155

    SSOP56 package

    Abstract: GR-1244-CORE GR1244-CORE IDT82V3001A SSOP56 TR62411 ic 474
    Text: WAN PLL WITH SINGLE REFERENCE INPUT ADVANCE INFORMATION IDT82V3001A FEATURES • • • • • • • • • • • • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces • Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interface


    Original
    PDF IDT82V3001A TR62411 GR-1244-CORE ns/125 IDT82V3001A 82V3001A SSOP56 package GR1244-CORE SSOP56 ic 474

    TR62411

    Abstract: GR-1244-CORE GR1244-CORE IDT82V3011
    Text: T1/E1/OC3 WAN PLL WITH SINGLE REFERENCE INPUT FEATURES • • • • • • • • • • • • • • • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces • Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing


    Original
    PDF TR62411 GR-1244-CORE IDT82V3011 IDT82V3011 82V3011 GR1244-CORE

    IDT82V3002

    Abstract: GR-1244-CORE TR62411
    Text: WAN PLL WITH DUAL REFERENCE INPUTS FEATURES • • • • • • • • • • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 3, Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces Supports ITU-T G.813 Option 1 clocks for 2048 kbit/s interfaces


    Original
    PDF TR62411 GR-1244-CORE com/docs/PSC4029 IDT82V3002

    IDT82V3011

    Abstract: No abstract text available
    Text: IDT82V3011 Data Sheet Change Notice Supplemental Information This notice describes the differences between the updated version and its previous version of the IDT82V3011 Data Sheet. It helps readers to identify the changes when the data sheet is upgraded.


    Original
    PDF IDT82V3011

    IC-2354

    Abstract: C155 GR-1244-CORE IDT82V3155 TR62411 82V3155
    Text: ENHANCED T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS IDT82V3155 FEATURES • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 3, Stratum 4 Enhanced and Stratum 4 clock, OC-3 port and 155.52 Mbit/s application • Supports ITU-T G.813 Option 1 clocks


    Original
    PDF IDT82V3155 TR62411 GR-1244-CORE PVG56) 82V3155 IC-2354 C155 IDT82V3155 82V3155

    GR-1244-CORE

    Abstract: IDT82V3012 SSOP56 TR62411
    Text: T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS FEATURES IDT82V3012 • Provides a C2/C1.5 output clock signal with the frequency controlled by the selected reference input Fref0 or Fref1 • Holdover frequency accuracy of 0.025 ppm • Phase slope of 5 ns per 125 µs


    Original
    PDF IDT82V3012 56-pin TR62411 GR-1244-CORE PVG56) 82V3012 IDT82V3012 SSOP56