TAP ME Search Results

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Part	ECAD Model	Manufacturer	Description	Download	Buy
10091796-001LF		Amphenol Communications Solutions	XCede® High Speed Backplane Connectors, Cross-Recessed Pan Head Screw, SS, Self-Tapping, #2-32 x 3/8" Long.

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KAGA FEI America Inc MB85RC64TAPN-G-AMEWE1 F-RAM 64kbit FeRAM with I2C serial interface, 1.8V, 3V - SON8 T&R
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Mouser Electronics	MB85RC64TAPN-G-AMEWE1					1 $1.79 10 $1.63 100 $1.42 1000 $1.33 10000 $1.19	Get Quote
Xeltek Inc Lens and Tape Attachment Frame Controller Accessories Automated Programmer Accessories
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Mouser Electronics	Lens and Tape Attachment Frame					1 $1350.98 10 $1350.98 100 $1350.98 1000 $1350.98 10000 $1350.98	Get Quote

TAP ME Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
Untitled Abstract: No abstract text available Text: 10K ECL Logic Buffered Delay 16-Pin Modules 5-Tap: DECL • Single: FECL • Triple: MECL Electrical Specifications at 25OC Tap Delay Tolerances +/- 5% or 1.5ns +/- 0.8ns <10ns 10K ECL 5 Tap P/N Tap 1 Tap 2 Tap 3 Tap 4 Total - Tap 5 DECL-6 2.0 3.0 4.0 5.0	Original	16-Pin DECL-10 DECL-12 DECL-15 DECL-20 DECL-25 DECL-30 DECL-35 DECL-40 DECL-45	PDF
Untitled Abstract: No abstract text available Text: 10K ECL Logic Buffered Delay 16-Pin Modules 5-Tap: DECL • Single: FECL • Electrical Specifications at 25°C Electrical Specifications at 25°C Tap Delay Tolerances +/- 5% or 1,5ns +/- 0.8ns <10ns 10K ECL 5 Tap P/N Tap 1 Triple: MECL Tap 2 Tap 3 Tap 4	OCR Scan	16-Pin DECL-10 DECL-12 DECL-15 DECL-20 DECL-25 DECL-30 DECL-35 DECL-40 DECL-45	PDF
DS1010 Abstract: 74LS DS1010-100 DS1010-50 DS1010-60 DS1010-75 DS1010-80 DS1010S dip switch data Text: DS 1010 DALLAS DS1010 10-Tap Silicon Delay Line s e m ic o n d u c t o r FEATURES PIN ASSIGNMENT • All-silicon tim e delay ini r 1 14 V cc NO 2 13 TAP 1 TAP 2 [_ 3 12 TAP 3 4 11 TAP 5 TAP 6 \_ 5 10 TAP 7 TAP 4 6 9 TAP 9 TAP 6 • 10 taps equally spaced • Delays are stable and precise	OCR Scan	DS1010 10-Tap 14-pin 16-pin 11central 74F04 DS1010 74LS DS1010-100 DS1010-50 DS1010-60 DS1010-75 DS1010-80 DS1010S dip switch data	PDF
74F04 Abstract: DS1004 DS1004M DS1004Z Text: DS1004 DS1004 5-Tap High–Speed Silicon Delay Line FEATURES PIN ASSIGNMENT • All–silicon timing circuit • Five equally delayed clock phases per input IN 1 8 Vcc TAP 2 2 7 TAP 1 • Precise tap–to–tap delay tolerances of TAP 4 3 6 TAP 3 GND 4 5 TAP 5	Original	DS1004 DS1004M DS1004Z 74F04 DS1004	PDF
XAITD Abstract: XAITD-12 XAITD-15 XAITD-20 XAITD-25 XAITD-30 XAITD-35 XAITD-40 XAITD-50 XAITD-60 Text: XAITD Series FAST / TTL Buffered 10-Tap Delay Modules Low Profile 14-Pin Package Two Surface Mount Versions FAST/TTL Logic Buffered Electrical Specifications at 25OC FAST 10 Tap 14-Pin P/N Tap Delay Tolerances +/- 5% or 2ns +/- 1ns <15ns Tap 1 Tap 2 Tap 3	Original	10-Tap 14-Pin XAITD-12 XAITD-15 XAITD-20 XAITD-25 XAITD-30 XAITD XAITD-12 XAITD-15 XAITD-20 XAITD-25 XAITD-30 XAITD-35 XAITD-40 XAITD-50 XAITD-60	PDF
74ls gate symbols Abstract: 74FO4 pin diagram of 74LS "Delay Lines" 74ls series 74LS SERIES cmos logic data DS1010-60 74LS series datasheet 74ls series logic DS1010-200 Text: DS1010 DS1010 10-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay IN1 1 14 VCC NC 2 13 TAP 1 IN 1 16 VCC TAP 2 3 12 TAP 3 NC 2 15 NC • Leading and trailing edge accuracy TAP 4 4 11 NC TAP 2 3 14 TAP 5 TAP 1 • Delay tolerance ±5% or ±2 ns, whichever is greater	Original	DS1010 10-Tap 14-pin 16-pin DS1010 74FO4 74ls gate symbols 74FO4 pin diagram of 74LS "Delay Lines" 74ls series 74LS SERIES cmos logic data DS1010-60 74LS series datasheet 74ls series logic DS1010-200	PDF
50A10250 Abstract: 50A10750 50A-10151 50A-10250 218C 300C 50A-10101 50A-10201 50A-10251 50A-10500 Text: DUAL - IN - LINE PACKAGE TOP VIEW □ Schottky TTL compatible □ 10 equally spaced taps □ 14 pin package □ Low profile □ TTL compatible □ Auto insert or surface mount package styles Vcc 14 IN TAP 1 13 TAP 3 12 TAP 5 TAP 7 TAP 9 11 10 9 OUT 8 TAP 2	OCR Scan	0A-10250 0A-10500 0A-10750 0A-10101 0A-10151 0A-10201 0A-10251 0A-10301 0A-10351 0A-10401 50A10250 50A10750 50A-10151 50A-10250 218C 300C 50A-10101 50A-10201 50A-10251 50A-10500	PDF
50A-10500 Abstract: 50A-10201 50A-10250 50A-10101 218C 300C 50A-10151 50A-10251 50A-10750 50A10250 Text: DIGITAL DELAY MODULES 50A, 52A, 52S Series 10 Tap 14 Pin Moulded DIP DUAL - IN - LINE PACKAGE TOP VIEW □ Schottky TTL compatible □ 10 equally spaced taps □ 14 pin package Vcc 14 TAP 1 13 TAP 3 12 TAP 5 11 w TAP 7 10 TAP 9 9 OUT 8 rpns~iirq^nr" Tnq-rrj^rT1	OCR Scan	0A-10250 0A-10500 0A-10750 0A-10101 0A-10151 0A-10201 0A-10251 0A-10301 0A-10351 0A-10401 50A-10500 50A-10201 50A-10250 50A-10101 218C 300C 50A-10151 50A-10251 50A-10750 50A10250	PDF
Untitled Abstract: No abstract text available Text: T a p Bypass Jumper The Gilbert Tap Bypass Jumper is designed to maintain power and RF integrity through a tap housing when the normal circuit is interrupted by removing the tap face plate. The contact probe is spring loaded axially to accommodate a wide range of tap seizure mechanisms and	OCR Scan	GIC-KSMP-KSMP-36)	PDF
GIC-KSMP-KSMP-36 Abstract: No abstract text available Text: Tap Bypass Jumper The Corning Gilbert Tap Bypass Jumper is designed to maintain power and RF integrity through a tap housing when the normal circuit is interrupted by removing the tap face plate. The contact probe is spring loaded axially to accommodate a wide range of tap seizure	Original	GIC-KSMP-KSMP-36) GIC-KSMP-KSMP-36 GIC-KSMP-KSMP-36	PDF
74ls series Abstract: DS1000Z "Delay Lines" TTL 74LS 00 TTL pin 74LS 00 74F04 74LS DS1000 DS1000M Text: DS1000 DS1000 5-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay • 5 taps equally spaced IN 1 14 Vcc NC 2 13 NC • Delays are stable and precise NC 3 12 TAP 1 TAP 2 4 11 NC NC 5 10 TAP 3 TAP 4 6 9 NC GND 7 8 TAP 5 • Both leading and trailing edge accuracy	Original	DS1000 DS1000 14-PIN 74F04 74ls series DS1000Z "Delay Lines" TTL 74LS 00 TTL pin 74LS 00 74F04 74LS DS1000M	PDF
RCD Components Abstract: A0805 A1405 A1410 MIL-D-83532 SA0805 Text: ACTIVE DIGITAL DELAY LINES RESISTORS "CAPS & COILS "DELAY LINES A0805 SERIES 5-TAP 8-PIN DIP SA0805 SERIES 5-TAP 8-PIN SIP A1405 SERIES 5-TAP 8-PIN DIP A1410 SERIES 10-TAP 14-PIN DIP Wide selection of sizes! RCD’s digital delay lines have been designed to provide precise tap	Original	A0805 SA0805 A1405 A1410 10-TAP 14-PIN MIL-D-23859. A1405 100nS RCD Components MIL-D-83532	PDF
TEC3020 Abstract: No abstract text available Text: ^High-Speed RISC Delay Modules RISC Delay Module TEC3016 TEC3020 TEC3025 TEC3033 TEC3040 Tap Delay ns Tap Delay (ns) Tap Delay (ns) Tap Delay (ns) Tap Delay (ns) T„0=REF. T„0=REF. To0=R EF t do = ref . t do = ref . To1 = 6 .0 ± .4 5 Td1 = 6 . 0 ± .45	OCR Scan	TEC3016 TEC3020 TEC3025 TEC3033 TEC3040 R3000 16-pin	PDF
Untitled Abstract: No abstract text available Text: SURFACE MOUNT ACTIVE DIGITAL DELAY LINES RESISTORS wCAPS & COILS wDELAY LINES SMA1405 SERIES - SMALL OUTLINE 5-TAP SMA2805 SERIES - PLCC PACKAGE 5-TAP SMA2810 SERIES - PLCC PACKAGE 10-TAP FEATURES r Non-standard delay times or tolerances r Non-symmetrical tap delays	Original	SMA1405 SMA2805 SMA2810 10-TAP 50-MIL 100ppm/	PDF

PIN photodiode 510 nm Abstract: fast photodiode amplifier Power Monitoring td 1410 SMF-28 optical fiber sensitivity dB photodiode pin optical fiber pm photodiode 1490 nm in line amplifier fiber Text: Components Tap/Detector Optical insertion loss DiCon’s Tap/Detector is a hybrid component that combines the ultra flat spectral response of a thin film tap with a high sensitivity PIN photodiode for power monitoring applications. Hybrid Tap/Detectors minimize integration costs and module	Original	SMF-28 PIN photodiode 510 nm fast photodiode amplifier Power Monitoring td 1410 SMF-28 optical fiber sensitivity dB photodiode pin optical fiber pm photodiode 1490 nm in line amplifier fiber	PDF
PA19355 Abstract: ADVANCED COMMUNICATION DEVICES Silicon Power Corporation substation design Text: SSLTC Solid State Load Tap Changer Product Applications Reliable Environmentally Sensible Low Maintenance Silicon Power SSLTC™ successfully addresses the reliability and maintenance issues of legacy load-tap changers of substation transformers. Legacy load-tap changers utilize electro-mechanical technology that includes numerous	Original		PDF
Untitled Abstract: No abstract text available Text: USB TAP Probe Users Guide Document Number: UTAPUG Rev 10.x, 9/2013 USB TAP Probe Users Guide, Rev. 10.x, 9/2013 2 Freescale Semiconductor, Inc. Contents Section number Title Page Chapter 1 Introducing the CodeWarrior USB TAP Probe 1.1 What is the USB TAP	Original		PDF
001H Abstract: HSP43168 LF43168 Text: LF43168 LF43168 DEVICES INCORPORATED Dual 8-Tap FIR Filter Dual 8-Tap FIR Filter DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 66 MHz Data and Computation Rate ❑ Two Independent 8-Tap or Single 16-Tap FIR Filters ❑ 10-bit Data and Coefficient Inputs ❑ 32 Programmable Coefficient Sets	Original	LF43168 16-Tap 10-bit 20-bit HSP43168 MIL-STD-883, 84-pin 100-pin 001H HSP43168 LF43168	PDF
Untitled Abstract: No abstract text available Text: DS1004 5-Tap High Speed Silicon Delay Line www.dalsemi.com PIN ASSIGNMENT FEATURES All-silicon timing circuit Five delayed clock phases per input Precise tap-to-tap nominal delay tolerances of ±0.75 and ±1 ns Input-to-tap 1 delay of 5 ns Nominal Delay tolerances of ±1.5 ns	Original	DS1004 DS1004M 300-mil)	PDF
Untitled Abstract: No abstract text available Text: D S 1005 DALLAS SEMICONDUCTOR FEATURES DS1005 5-Tap Silicon Delay Line PIN ASSIGNMENT • All-silicon time delay • 5 taps equally spaced Vcc IN □ 1 16 □ Vcc NC NC □ 2 15 □ NC 3 14 4 13 □ TAP 1 5 12 6 7 11 □ TAP 3 10 □ NC 8 9 □ TAP 5 E TAP 2 E	OCR Scan	DS1005 14-pin 16-pin 74F04 S1005.	PDF
Untitled Abstract: No abstract text available Text: DS1004 5-Tap High Speed Silicon Delay Line www.dalsemi.com FEATURES PIN ASSIGNMENT All-silicon timing circuit Five delayed clock phases per input Precise tap-to-tap nominal delay tolerances of ±0.75 and ±1 ns Input-to-tap 1 delay of 5 ns Nominal Delay tolerances of ±1.5 ns	Original	DS1004 DS1004M 300-mil) DS1004Z 150-mil) 56-G2008-001C DS1004Z-3 DS1004Z-4 DS1004Z-5 DS1004Z-5+	PDF
MC68EC030 opcode Abstract: 27F020 ci str 9656 MC68EC030 27C010 MC68340 MC68360 SCR BRX 49 PIN MCM36100S 156 35K 301 Text: SECTION 8 SCAN CHAIN TEST ACCESS PORT The QUICC provides a dedicated user-accessible test access port TAP that is JTAG compatible. The QUICC TAP contains one additional signal not available with the MC68340 TAP—the test reset (TRST) signal. This signal provides an asynchronous reset to the TAP.	Original	MC68340 16-state MC68356 MC68EC030 opcode 27F020 ci str 9656 MC68EC030 27C010 MC68360 SCR BRX 49 PIN MCM36100S 156 35K 301	PDF
Untitled Abstract: No abstract text available Text: THE DOWNTIME ELIMINATOR: WET TAP VALVE ASSEMBLIES Sensor Restraining System Model FP-319 Wet Tap Assembly $ 453 MADE IN USA Shown Smaller Than Actual Size Wet Tap Valve You can completely eliminate downtime resulting from flow sensor maintenance with the simple addition of OMEGA’s FP-319 Wet Tap Valve	Original	FP-319 FP-319 FP-3193 FP-3194 FP-3195 FP-319,	PDF
Untitled Abstract: No abstract text available Text: 16 Pin DIL 5 Tap 10K ECL Compatible Active Delay Lines TAP 1 nS ±5% TAP 2 nS ±5% 3.0 TY P f 3.0 TYP-f 3.0 TYP 4 ± 1.0 5 ± 1.0 6 ± 1.0 8 ± 1.0 10±1.0 15± 1.5 20 ±2.0 30 ± 2.0 40 50 60 70 80 90 100 120 140 160 180 200 TAP 3 nS ±5% TAP 4 nS±5% OUTPUT	OCR Scan	900Input	PDF

TAP ME Search Results

TAP ME Result Highlights (1)

TAP ME Price and Stock

KAGA FEI America Inc MB85RC64TAPN-G-AMEWE1

Xeltek Inc Lens and Tape Attachment Frame

TAP ME Datasheets Context Search

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DS1010

74F04

XAITD

74ls gate symbols

50A10250

50A-10500

Untitled

GIC-KSMP-KSMP-36

74ls series

RCD Components

TEC3020

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PIN photodiode 510 nm

PA19355

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001H

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MC68EC030 opcode

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