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    SXT MULTIPLEXER Search Results

    SXT MULTIPLEXER Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74HC4051FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SP8T(1:8)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    74HC4051D Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SP8T(1:8)/Analog Multiplexer, SOIC16, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    74HC4053FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SPDT(1:2)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    TDS4A212MX Toshiba Electronic Devices & Storage Corporation PCI Express switch, 2 Differential Channel, 2:1 multiplexer/1:2 demultiplexer, SPDT, XQFN16 Visit Toshiba Electronic Devices & Storage Corporation
    TDS4B212MX Toshiba Electronic Devices & Storage Corporation PCI Express switch, 2 Differential Channel, 2:1 multiplexer/1:2 demultiplexer, SPDT, XQFN16 Visit Toshiba Electronic Devices & Storage Corporation

    SXT MULTIPLEXER Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    XC6VLX130T

    Abstract: XC6VLX195T XC5VL110T XC5VL155T PCI33 XC6VLX240T XC5vfx70t XC5VL330T XC4VSX35 ff1156
    Text: XI LI NX VI RTEX -6 FAM I LY FPGAS Virtex-6 LXT FPGAs Virtex-6 SXT FPGAs Optimized for High-Performance Logic and DSP with Low-Power Serial Connectivity 1.0 Volt, 0.9 Volt Part Number EasyPath FPGA Cost Reduction Solutions(1) Logic Resources XC6VLX760T


    Original     		XC6VLX75T XC6VLX130T XC6VLX195T XC6VLX240T XC6VLX365T XC6VLX550T XC6VLX760T XC6VSX315T XC6VSX475T XC6VHX250T XC6VLX130T XC6VLX195T XC5VL110T XC5VL155T PCI33 XC6VLX240T XC5vfx70t XC5VL330T XC4VSX35 ff1156 PDF

    VHDL code for ADC and DAC SPI with FPGA spartan 3

    Abstract: VHDL code for ADC and DAC SPI with FPGA 12-bit ADC interface vhdl code for FPGA direct sequence spread spectrum virtex JESD204 XAPP876 Xilinx ml507 prbs jesd VHDL code for high speed ADCs using SPI with FPGA virtex 4 date code for ADC
    Text: Application Note: Virtex-5 Family Virtex-5 FPGA Interface to a JESD204A Compliant ADC XAPP876 v1.0.1 February 22, 2010 Author: Marc Defossez Summary This application note describes how to interface the Virtex -5 LXT, SXT, TXT, and FXT devices featuring GTP/GTX transceivers to an analog-to-digital (ADC) converter compliant to JEDEC


    Original     		JESD204A XAPP876 JESD204A) JESD204 JESD204A VHDL code for ADC and DAC SPI with FPGA spartan 3 VHDL code for ADC and DAC SPI with FPGA 12-bit ADC interface vhdl code for FPGA direct sequence spread spectrum virtex XAPP876 Xilinx ml507 prbs jesd VHDL code for high speed ADCs using SPI with FPGA virtex 4 date code for ADC PDF

    XC5VLX50 FFG676

    Abstract: XC5VLX50T-FFG665 VIRTEX-5 GTP ethernet
    Text: Virtex-5 Family Overview LX, LXT, and SXT Platforms R DS100 v3.1 May 23, 2007 Advance Product Specification General Description The Virtex -5 family provides the newest most powerful features in the FPGA market. Using the second generation ASMBL™ (Advanced Silicon Modular Block) column-based architecture, the Virtex-5 family contains four distinct platforms


    Original     		DS100 DSP48E XC5VLX50 FFG676 XC5VLX50T-FFG665 VIRTEX-5 GTP ethernet PDF

    VIRTEX-5

    Abstract: XC5VLX50 FFG676
    Text: Virtex-5 Family Overview LX, LXT, and SXT Platforms R DS100 v3.0 February 2, 2007 Advance Product Specification General Description The Virtex -5 family provides the newest most powerful features in the FPGA market. Using the second generation ASMBL™ (Advanced Silicon Modular Block) column-based architecture, the Virtex-5 family contains four distinct platforms


    Original     		DS100 DSP48E VIRTEX-5 XC5VLX50 FFG676 PDF

    VHDL code for ADC and DAC SPI with FPGA

    Abstract: VHDL code for ADC and DAC SPI with FPGA spartan 3 XAPP876 vhdl code for parallel to serial converter 12-bit ADC interface vhdl code for FPGA picoblaze UG347 DS202 JESD204 JESD204A
    Text: Application Note: Virtex-5 Family Virtex-5 FPGA Interface to a JESD204A Compliant ADC XAPP876 v1.0 September 18, 2009 Author: Marc Defossez Summary This application note describes how to interface the Virtex -5 LXT, SXT, TXT, and FXT devices featuring GTP/GTX transceivers to an analog-to-digital (ADC) converter compliant to JEDEC


    Original     		JESD204A XAPP876 JESD204A) JESD204 JESD204A VHDL code for ADC and DAC SPI with FPGA VHDL code for ADC and DAC SPI with FPGA spartan 3 XAPP876 vhdl code for parallel to serial converter 12-bit ADC interface vhdl code for FPGA picoblaze UG347 DS202 PDF

    XC5VLX50T-FFG665

    Abstract: 3686N XC5VLX50T-1FFG665C FFG676 Reed-Solomon virtex-5 VIRTEX-5 DDR PHY Virtex-5 LXT Ethernet DSP48E SRL16 XC5VLX220
    Text: Virtex-5 Family Overview LX, LXT, and SXT Platforms R DS100 v3.4 December 18, 2007 Advance Product Specification General Description The Virtex -5 family provides the newest most powerful features in the FPGA market. Using the second generation ASMBL™ (Advanced Silicon Modular Block) column-based architecture, the Virtex-5 family contains four distinct platforms


    Original     		DS100 XC5VLX50T-FFG665 3686N XC5VLX50T-1FFG665C FFG676 Reed-Solomon virtex-5 VIRTEX-5 DDR PHY Virtex-5 LXT Ethernet DSP48E SRL16 XC5VLX220 PDF

    E1 to fiber optic converter circuit

    Abstract: LEVEL ONE COMMUNICATIONS SSI 7200 sxt multiplexer LP-UNEQ microwave movement detection 2E11-1 2E111 Signal path designer
    Text: Application Note 9801 SXT6051/SXT6251 SDH Chipset FEBRUARY 1998 Revision 1.0 SDH Specifications and ITU Standards SDH and ITU Specifications The original goal of the Standards Committee was to establish an international specification for a common hierarchy


    Original     		SXT6051/SXT6251 E1 to fiber optic converter circuit LEVEL ONE COMMUNICATIONS SSI 7200 sxt multiplexer LP-UNEQ microwave movement detection 2E11-1 2E111 Signal path designer PDF

    1.5V RGMII

    Abstract: DSP48E microblaze ethernet Virtex-5 LXT Ethernet XQ5VLX110 FF323 SRL16 UG192 embedded powerpc 440 7846n
    Text: Virtex-5Q Family Overview DS174 v1.0 May 5, 2009 Preliminary Product Specification General Description The Defense-grade Virtex -5Q family provides the newest, most capable features in the aerospace and defense industry from the reprogrammable FPGA market leader. The Virtex-5Q family delivers on Size, Weight and Power - Cost (SWAP-C) reduction requirements


    Original     		DS174 UG203) UG192) UG196) 1.5V RGMII DSP48E microblaze ethernet Virtex-5 LXT Ethernet XQ5VLX110 FF323 SRL16 UG192 embedded powerpc 440 7846n PDF

    XC5VLX50T-1FFG665C

    Abstract: ff1156 VIRTEX-5 DDR2 controller FFG1156 VIRTEX-5 DDR PHY Virtex-5 Ethernet development Virtex-5 LXT Ethernet DSP48E SRL16 XC5VLX220
    Text: R DS100 v5.0 February 6, 2009 Virtex-5 Family Overview Product Specification General Description The Virtex -5 family provides the newest most powerful features in the FPGA market. Using the second generation ASMBL (Advanced Silicon Modular Block) column-based architecture, the Virtex-5 family contains five distinct platforms (sub-families), the most choice


    Original     		DS100 36-Kbit UG197) UG200) UG194) XC5VLX50T-1FFG665C ff1156 VIRTEX-5 DDR2 controller FFG1156 VIRTEX-5 DDR PHY Virtex-5 Ethernet development Virtex-5 LXT Ethernet DSP48E SRL16 XC5VLX220 PDF

    VIRTEX-5 DDR2 pcb design

    Abstract: 16 channel synchronous lvds ADC interface xilinx virtex5 XC5VLX50 FFG676 VIRTEX-5 DDR2 controller GTP ethernet XC5VFX70 ug195 XC5VFX130T
    Text: R DS100 v4.2 May 7, 2008 Virtex-5 Family Overview Advance Product Specification General Description The Virtex -5 family provides the newest most powerful features in the FPGA market. Using the second generation ASMBL (Advanced Silicon Modular Block) column-based architecture, the Virtex-5 family contains four distinct platforms (sub-families), the most choice


    Original     		DS100 36-Kbit UG193) DSP48E UG191) UG195) VIRTEX-5 DDR2 pcb design 16 channel synchronous lvds ADC interface xilinx virtex5 XC5VLX50 FFG676 VIRTEX-5 DDR2 controller GTP ethernet XC5VFX70 ug195 XC5VFX130T PDF

    XC5VLX50T-1FFG665C

    Abstract: virtex 5 fpga ethernet to pc DSP48E VIRTEX-5 VIRTEX-5 DDR2 controller SRL16 XC5VLX220 XC5VLX330 Virtex Analog to Digital Converter UG195
    Text: R DS100 v4.4 September 23, 2008 Virtex-5 Family Overview Advance Product Specification General Description The Virtex -5 family provides the newest most powerful features in the FPGA market. Using the second generation ASMBL (Advanced Silicon Modular Block) column-based architecture, the Virtex-5 family contains five distinct platforms (sub-families), the most choice


    Original     		DS100 36-Kbit UG194) UG197) UG200) XC5VLX50T-1FFG665C virtex 5 fpga ethernet to pc DSP48E VIRTEX-5 VIRTEX-5 DDR2 controller SRL16 XC5VLX220 XC5VLX330 Virtex Analog to Digital Converter UG195 PDF

    RGMII Layout Guide

    Abstract: XQ5VLX110T XQ5VSX50T ROCKETIO XQ5VFX70T DSP48E GTP ethernet FF323 SRL16 XQ5VLX110
    Text: Virtex-5Q Family Overview DS174 v2.0 March 22, 2010 Product Specification General Description The Defense-grade Virtex -5Q family provides the newest, most capable features in the aerospace and defense industry from the reprogrammable FPGA market leader. The Virtex-5Q family delivers on Size, Weight, and Power - Cost (SWAP-C) reduction requirements


    Original     		DS174 UG195) UG203) UG192) RGMII Layout Guide XQ5VLX110T XQ5VSX50T ROCKETIO XQ5VFX70T DSP48E GTP ethernet FF323 SRL16 XQ5VLX110 PDF

    UG195

    Abstract: SRL32 VIRTEX-5 DDR2 controller VIRTEX-5 GTX ffg17
    Text: R DS100 v4.3 June 18, 2008 Virtex-5 Family Overview Advance Product Specification General Description The Virtex -5 family provides the newest most powerful features in the FPGA market. Using the second generation ASMBL (Advanced Silicon Modular Block) column-based architecture, the Virtex-5 family contains four distinct platforms (sub-families), the most choice


    Original     		DS100 36-Kbit UG193) DSP48E UG191) UG195) UG195 SRL32 VIRTEX-5 DDR2 controller VIRTEX-5 GTX ffg17 PDF

    telecom bus

    Abstract: 6251 060
    Text: FEBRUARY 1998 m B H iifm REVISION 1.0 SXT6051 STM-1/O SDH Overhead Terminator The SXT6051 Overhead Terminator implements the Regenerator Section Termination, Multiplexer Section Termination and Higher Order Path Termination in STM-0 51 Mb/s and STM-1 (155Mb/s) multiplexers. It provides


    OCR Scan     		SXT6051 SXT6051 155Mb/s) SXT6251 D4-D12 PQFP-208 telecom bus 6251 060 PDF

    9718h

    Abstract: 11973H VC12 LEVEL ONE COMMUNICATIONS SXT6051 SXT framer HT 648 Decoder Rx 9802h
    Text: DATA SHEET MAY 1998 Revision 1.1 SXT6051 STM-1/0 SDH Overhead Terminator General Description Features The SXT6051 Overhead Terminator implements the Regenerator Section Termination, Multiplexer Section Termination and Higher Order Path Termination in STM-0


    Original     		SXT6051 SXT6051 51Mb/s) 155mB/s) SXT6251 9718h 11973H VC12 LEVEL ONE COMMUNICATIONS SXT framer HT 648 Decoder Rx 9802h PDF

    DSP48E1

    Abstract: No abstract text available
    Text: → 9 Defense-Grade Virtex-6Q Family Overview DS155 v1.1 February 8, 2012 Product Specification General Description The Defense-Grade Virtex -6Q family provides the most advanced features in the Aerospace & Defense FPGA market and represents the 3rd generation of secure silicon architecture products from Xilinx. Virtex-6Q FPGAs are the programmable silicon foundation for


    Original     		DS155 DSP48E1 PDF

    Untitled

    Abstract: No abstract text available
    Text: → 9 Defense-Grade Virtex-6Q Family Overview DS155 v1.1 February 8, 2012 Product Specification General Description The Defense-Grade Virtex -6Q family provides the most advanced features in the Aerospace & Defense FPGA market and represents the 3rd generation of secure silicon architecture products from Xilinx. Virtex-6Q FPGAs are the programmable silicon foundation for


    Original     		DS155 PDF

    RRUS 01

    Abstract: free source code for cdma transceiver using vhdl vhdl code for demultiplexer 16 to 1 using 4 to 1 BBU RRU vhdl code for multiplexer 8 to 1 using 2 to 1 lte RF Transceiver DS612 obsai RRUS VIRTEX-5
    Text: OBSAI v2.1 DS612 June 27, 2008 Product Specification Introduction LogiCORE IP Facts The LogiCORE IP OBSAI core implements an OBSAI RP3 interface supporting RP3-01 at 768 Mbps, 1.5 Gbps, and 3 Gpbs using RocketIO™ GTP or GTX transceivers available for Virtex -5 FPGAs. The OBSAI core can be


    Original     		DS612 RP3-01 RRUS 01 free source code for cdma transceiver using vhdl vhdl code for demultiplexer 16 to 1 using 4 to 1 BBU RRU vhdl code for multiplexer 8 to 1 using 2 to 1 lte RF Transceiver obsai RRUS VIRTEX-5 PDF

    UG365

    Abstract: UG-361 XC6VLX240T UG365 XC6VLX240T-1FFG1156 DSP48E1 VIRTEX-6 UG362 write operation using ram in fpga xc6vlx240t VIRTEX-6 UG373 frequency detection using FPGA
    Text: → 11 Virtex-6 Family Overview DS150 v2.4 January 19, 2012 Product Specification General Description The Virtex -6 family provides the newest, most advanced features in the FPGA market. Virtex-6 FPGAs are the programmable silicon foundation for Targeted Design Platforms that deliver integrated software and hardware components to enable designers to focus on


    Original     		DS150 DSP48E1 UG369) UG368) XC6VLX760. UG370) UG373) UG365 UG-361 XC6VLX240T UG365 XC6VLX240T-1FFG1156 VIRTEX-6 UG362 write operation using ram in fpga xc6vlx240t VIRTEX-6 UG373 frequency detection using FPGA PDF

    verilog code for 2-d discrete wavelet transform

    Abstract: XAPP921c simulink universal MOTOR in matlab turbo encoder model simulink matched filter simulink simulink model for kalman filter using vhdl umts simulink fpga based wireless jamming networks dvb-rcs chip XAPP569
    Text: XtremeDSP Solutions Selection Guide March 2008 INTRODUCTION Contents DSP System Solutions.4 DSP Devices.17 Development Tools.25 Complementary Solutions.33 Resources.35


    Original     		PDF

    vhdl code for DES algorithm

    Abstract: XAPP921c FLOATING POINT PROCESSOR TMSC6000 pulse compression radar fir filter matlab code LMS adaptive filter simulink model verilog code for lms adaptive equalizer for audio LMS simulink 3SD1800A XILINX vhdl code REED SOLOMON encoder decoder fir filter with lms algorithm in vhdl code
    Text: XtremeDSP Solutions Selection Guide June 2008 Introduction Contents DSP System Solutions.4 DSP Devices.17 Development Tools.25 Complementary Solutions.33 Resources.35


    Original     		PDF

    DSP48E1

    Abstract: XC6VLX240T-1FFG1156C Virtex 6 VIRTEX-6 UG365 XC6VLX240T-1FFG1156 XC6VLX130T VIRTEX-6 UG362 XC6VLX240T FF1759 VIRTEX-6 UG360
    Text: 9 Virtex-6 Family Overview DS150 v1.2 June 24, 2009 Advance Product Specification General Description The Virtex -6 family provides the newest, most advanced features in the FPGA market. Using the third generation ASMBL (Advanced Silicon Modular Block) column-based architecture, the Virtex-6 family contains multiple distinct sub-families. This overview covers the


    Original     		DS150 DSP48E1 UG370) UG361) UG362) UG363) UG364) XC6VLX240T-1FFG1156C Virtex 6 VIRTEX-6 UG365 XC6VLX240T-1FFG1156 XC6VLX130T VIRTEX-6 UG362 XC6VLX240T FF1759 VIRTEX-6 UG360 PDF

    DSP48E1

    Abstract: FPGA Virtex 6 LXT virtex 6 XC6VSX475T XC6VLX240T-1FFG1156 "Binary Multipliers" UG-361 virtex+6 UG366 1000BASE-X DS150
    Text: 11 Virtex-6 Family Overview DS150 v2.1 November 6, 2009 Advance Product Specification General Description The Virtex -6 family provides the newest, most advanced features in the FPGA market. Virtex-6 FPGAs are the programmable silicon foundation for Targeted Design Platforms that deliver integrated software and hardware components to enable designers to focus on


    Original     		DS150 UG364) UG366) XC6VLX760. UG371) XC6VHX250T XC6VHX380T FF1154 DSP48E1 UG369) FPGA Virtex 6 LXT virtex 6 XC6VSX475T XC6VLX240T-1FFG1156 "Binary Multipliers" UG-361 virtex+6 UG366 1000BASE-X DS150 PDF

    XC6VLX240T-1FFG1156

    Abstract: XC6VLX240T-1FFG DSP48E1 TEMAC XC6VLX240T-1FFG1156C XC6VLX240T UG366 XC6VLX130T UG-361 Virtex 6
    Text: → 11 Virtex-6 Family Overview DS150 v2.2 January 28, 2010 Advance Product Specification General Description The Virtex -6 family provides the newest, most advanced features in the FPGA market. Virtex-6 FPGAs are the programmable silicon foundation for Targeted Design Platforms that deliver integrated software and hardware components to enable designers to focus on


    Original     		DS150 XC6VLX760. UG373) UG363) UG364) XC6VLX240T-1FFG1156 XC6VLX240T-1FFG DSP48E1 TEMAC XC6VLX240T-1FFG1156C XC6VLX240T UG366 XC6VLX130T UG-361 Virtex 6 PDF