SONET EQUALIZER Search Results

F628

Abstract: STS-192 STS-48
Contextual Info: 4. SONET Mode SGX52004-1.2 Introduction One of the most common serial backplanes in the communications or telecom area is the SONET/SDH interface. For SONET/SDH applications the synchronous transport signal STS-48 and Synchronous Transport Module -16 STM -16 are becoming popular SONET

Contextual Info: Cortina Systems LXT6155 155 Mbps SDH/SONET/ATM Transceiver Datasheet The Cortina Systems® LXT6155 155 Mbps SDH/SONET/ATM Transceiver LXT6155 Transceiver is a high speed fully integrated transceiver designed for 155 Mbps SDH/SONET/ATM transmission system

LXT6155

Abstract: frequency doubler LXT6155LE
Contextual Info: Cortina Systems LXT6155 155 Mbps SDH/SONET/ATM Transceiver Datasheet The Cortina Systems® LXT6155 155 Mbps SDH/SONET/ATM Transceiver LXT6155 Transceiver is a high speed fully integrated transceiver designed for 155 Mbps SDH/SONET/ATM transmission system

LXT6155LE

Abstract: LXT6155 GR-253 RG59U cortina cs Application Note document number 249280 G.703 standard - quad E1 interface
Contextual Info: Cortina Systems LXT6155 155 Mbps SDH/SONET/ATM Transceiver Datasheet The Cortina Systems® LXT6155 155 Mbps SDH/SONET/ATM Transceiver LXT6155 Transceiver is a high speed fully integrated transceiver designed for 155 Mbps SDH/SONET/ATM transmission system

IC E3 F6

Abstract: GR-253 XRT94L43
Contextual Info: XRT94L43 SONET/SDH OC-12 TO 12XDS3/E3 MAPPER NOVEMBER 2006 GENERAL DESCRIPTION The XRT94L43 is an SDH to PDH physical layer processor with integrated SONET OC-12 and 12 DS3/E3 framing controller. The XRT94L43 contains an integral SONET framer which provides framing

Contextual Info: DATA SHEET Communications T3/STS-1/E3 EVALUATION MANUAL XRT7295 DS3/Sonet STS-1 Integrated Line Receiver The XR-T7295 DS3/SONET STS-1 integrated line receiver is a fully integrated receive interface that terminates a bipolar DS3 44.736Mbps or Sonet STS-1 (51.84Mbps) signal

Contextual Info: SY69712 SONET/SDH/ATM S ip e r COM h'w in.’i O C - 1 2 C lo ck R e c o v e r in g T r a n s c e iv e r • A complete SONET/SDH Transmitter & Receiver ■ SONET 622.08Mbtt/sec data rates OC-12 SY69612 SONET/SDH/ATM OC-12 ■ Complies with Bellcore, CCITT and ANSI

MPC860 jtag

Abstract: IBM 236 telecom bus
Contextual Info: XRT94L43 SONET/SDH OC-12 TO 12XDS3/E3 MAPPER NOVEMBER 2006 GENERAL DESCRIPTION The XRT94L43 is an SDH to PDH physical layer processor with integrated SONET OC-12 and 12 DS3/E3 framing controller. The XRT94L43 contains an integral SONET framer which provides framing

Contextual Info: w Fw ip XR-T7295 —ihe analog plus company April 1994-3 DS3 / SONET STS-1 Integrated Line Receiver GENERAL DESCRIPTION PIN ASSIGNMENT The XR-T7295 DS3/SONET STS-1 integrated line receiver is a fully integrated receive interface that ter­ minates a bipolar DS3 44.736 MBPS or SONET

GR-253

Abstract: GR-253-CORE GR-499-CORE XRT75L00D XRT75L00DIV XRT75L03 ANSI T1.105.03B 1997 CI 9821 ST CHN 703 chn 347
Contextual Info: XRT75L00D E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER FEBRUARY 2004 REV. 1.0.2 • On-chip clock synthesizer provides the appropriate GENERAL DESCRIPTION The XRT75L00D is a single-channel fully integrated Line Interface Unit LIU with Sonet Desynchronizer

75l00d

Contextual Info: áç XRT75L00D E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER NOVEMBER 2003 REV. 1.0.1 • On-chip clock synthesizer provides the appropriate GENERAL DESCRIPTION The XRT75L00D is a single-channel fully integrated Line Interface Unit LIU with Sonet Desynchronizer

JA02

Abstract: ana 608 GR-253 GR-253-CORE GR-499-CORE XRT75L04D XRT75L04DIV chn 347
Contextual Info: áç XRT75L04D FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER NOVEMBER 2003 GENERAL DESCRIPTION The XRT75L04D is a four-channel fully integrated Line Interface Unit LIU with Sonet Desynchronizer for E3/DS3/STS-1 applications. It incorporates four

Contextual Info: DS3181/DS3182/DS3183/DS3184 Single/Dual/Triple/Quad ATM/Packet PHYs with Built-In LIU www.maxim-ic.com GENERAL DESCRIPTION DS3/E3/STS-1 PORTS APPLICATIONS Access Concentrators SONET/SDH ADM SONET/SDH Muxes PBXs Digital Cross Connect Test Equipment Routers and Switches

XR-T7295SOJ

Abstract: T1102A
Contextual Info: XR-T7295 DS31SONET STS-1 Integrated Line Receiver PIN ASSIGNMENT GENERAL DESCRIPTION The XR-T7295 DS3/SONET STS-1 Integrated Line Receiver is a fully integrated receive interface that terminates a bipolar DS3 44.736 MBPS or SONET (51.84 MBPS) signal transmitted over coaxial cable.

T85 Slide Switch

Abstract: HP SLM MCP860 vt6 transistor 49Mhz power amplifier AU-AIS i860 64-Bit Microprocessor Performance Brief LTE DL Channel Encoder transformer e19 working of 5 pin relay t73
Contextual Info: XRT86SH328 SONET TO 28-T1/21-E1 PDH MAPPER - VOYAGER PIN AND ARCHITECTURE DESC AUGUST 2008 REV. 1.0.1 GENERAL DESCRIPTION The XRT86SH328 Voyager is a physical layer SONET/SDH to PDH mapper/demapper which enables T1/E1 aggregation to STS-3/STM-1 or STS1/

T7295

Abstract: t7295-3
Contextual Info: Data Sheet February 1997 microelectronics group Lucent Technologies Bell Labs Innovations T7295-6 DS3/SONET STS-1 Integrated Line Receiver Features Description • Fully integrated receive interface supports both DS3 and STS-1 rate signals The T7295-6 DS3/SONET STS-1 Integrated Line

chn 752

Abstract: HDB3 CODING DECODING FPGA chn 501 chn 732
Contextual Info: XRT75L06D SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER OCTOBER 2003 REV. 1.0.2 GENERAL DESCRIPTION attenuators can be used for clock smoothing in SONET STS-1 to DS-3 de-mapping. The XRT75L06D is a six channel fully integrated Line

CHN 523

Abstract: HDB3 CODING DECODING FPGA chn 752 chn 751 chn 720 GR-253 GR-253-CORE GR-499-CORE XRT75L06D XRT75L06DIB
Contextual Info: xr XRT75L06D SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER APRIL 2005 REV. 1.0.4 GENERAL DESCRIPTION attenuators can be used for clock smoothing in SONET STS-1 to DS-3 de-mapping. The XRT75L06D is a six channel fully integrated Line

G703S

Abstract: DSX-3 LTA 703 S
Contextual Info: JTEXAR XR-T7295 DS3 1SONET STS-1 Integrated Line Receiver GENERAL DESCRIPTION PIN ASSIGNMENT The XR-T7295 DS3/SONET STS-1 Integrated Line Receiver is a fully integrated receive interface that terminates a bipolar DS3 44.736 MBPS or SONET (51.84 MBPS) signal transmitted over coaxial cable.

Contextual Info: PHAST-48V Device STM-16/OC-48 SDH/SONET Overhead Terminator and Virtual Tributary Pointer Processor Scalable with 45 Gbit/s VT/STS & VC/AU3 Switch TXC-06965 DATA SHEET PRODUCT PREVIEW TXC-06965-MB, Ed. 2 March 2006 FEATURES APPLICATIONS • SDH/SONET line interface

G706

Abstract: truth table varification
Contextual Info: XRT86SH328 PRELIMINARY SONET TO 28-T1/21-E1 PDH MAPPER - VOYAGER PIN AND ARCHITECTURE DESC SEPTEMBER 2007 REV. P1.0.1 GENERAL DESCRIPTION The XRT86SH328 Voyager is a physical layer SONET/SDH to PDH mapper/demapper which enables T1/E1 aggregation to STS-3/STM-1 or STS1/

NT1127

Abstract: E14112 E511 0x05D3 book national semiconductor GR-1230
Contextual Info: PHAST-48V Device STM-16/OC-48 SDH/SONET Overhead Terminator and Virtual Tributary Pointer Processor Scalable with 45 Gbit/s VT/STS & VC/AU3 Switch TXC-06965 DATA SHEET PRELIMINARY TXC-06965-MB, Ed. 3 March 2007 FEATURES APPLICATIONS • SDH/SONET line interface

XRT75VL00

Abstract: GR-253 GR-253-CORE GR-499-CORE XRT75L03 XRT75VL00D ANSI T1.105.03B 1997 chn 347 CHN 932
Contextual Info: XRT75VL00D E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET SEPTEMBER 2008 REV. 1.0.4 • On-chip clock synthesizer provides the appropriate GENERAL DESCRIPTION rate clock from a single 12.288 MHz Clock. The XRT75VL00D is a single-channel fully integrated Line Interface Unit LIU with Sonet Desynchronizer

traffic light using 68K

Abstract: MCP860 AU-AIS alarm
Contextual Info: XRT86SH328 PRELIMINARY SONET TO 28-T1/21-E1 PDH MAPPER - VOYAGER PIN AND ARCHITECTURE DESC SEPTEMBER 2007 REV. P1.0.0 GENERAL DESCRIPTION The XRT86SH328 Voyager is a physical layer SONET/SDH to PDH mapper/demapper which enables T1/E1 aggregation to STS-3/STM-1 or STS1/