SN10145 Search Results

SN10145 Datasheets (5)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
SN10145		Texas Instruments	64-Bit RAM		Original	PDF
SN10145J		Texas Instruments	64-Bit RAM		Original	PDF
SN10145J		Unknown	IC Datasheet (Short Description and Cross Reference Only)		Scan	PDF
SN10145JE		Texas Instruments	64-Bit RAM		Original	PDF
SN10145JE		Unknown	IC Datasheet (Short Description and Cross Reference Only)		Scan	PDF

SN10145 Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
SN10000 Abstract: SN10139 SN10139J SN10140 SN10142 SN10144 SN10145 SN10145JE SN10147 SN10148 Text: SERIES SN10000 MEMORIES Eel INTEGRATED CIRCU ITS BULLETIN NO. DL-S 7512255, MAY 1975 • Full On-Chip Address Decoding and Output-Sense Amplification • Constant Current Drain Over a Wide Supply Voltage Range • Logic Levels Compatible with Series SN10000 Logic Levels	Original	PDF	SN10000 SN10000 SN10139 SN10140 90-0hm SN10142 SN10144 SN10145 SN10147 SN10148 SN10139 SN10139J SN10140 SN10142 SN10144 SN10145 SN10145JE SN10147 SN10148
SN10139 Abstract: SN10139J SN10145JE SN10000 Text: TYPE SN10139 256-BIT PROGRAMMABLE READ-ONLY MEMORY APRIL 1975 • 32-Word-by-Eight-Bit Organization • Full On-Chip Address Decoding and Output-Sensing Amplification • Capability for Wired-OR Connections • Easy Programming J OR JE DUAL-IN-L1NE PACKAGE TOP VIEW	Original	PDF	SN10139 256-BIT 32-Word-by-Eight-Bit SN10139 SN10139J SN10145JE SN10000
SN10139J Abstract: SN10144 SN10145JE Text: TYPE SN10144 256-811 RANDOM-ACCESS MEMORY MAY 1975 • Fast Access Time . 18 ns Typical • 256-Word-by-One-Bit Organization • Drives 50-Ohm Loads • Full On-Chip Address Decoding and Output-Sense Amplification • • J OR JE DUAL-IN-LiNE PACKAGE TOP VIEW	Original	PDF	SN10144 256-Word-by-One-Bit 50-Ohm 256-bit SN10139J SN10144 SN10145JE
ay-5-1012 Abstract: ali m 3329 PROCESSOR ALI 3329 ali 3329 b ali 3329 SN74188 sn74s188 str 52100 SN7452 replacement of bel 187 transistor Text: GENERAL INFORMATION lie of Contents • Alphanumeric Index • Selection Guides • Glossary INTERCHANGEABiliTY GUIDE MOS MEMORIES TTL MEMORIES ECl MEMORIES MICROPROCESSOR SUMMARY 38510/MACH IV PROCUREMENT SPECIFICATION JAN Mll-M-38510 INTEGRATED CIRCUITS	Original	PDF	38510/MACH Mll-M-38510 Z501300 Z501200 Z501201 Z012510 ZOl1510 ay-5-1012 ali m 3329 PROCESSOR ALI 3329 ali 3329 b ali 3329 SN74188 sn74s188 str 52100 SN7452 replacement of bel 187 transistor
SN10139J Abstract: SN10145 SN10145JE Text: TYPE'SN10145 64-BIT RANDOM-ACCESS MEMORY MAY 1975 • Fast Access Time . 9 ns Typical • 16-Word-by-Four-Bit Organization • Drives 50-Ohm Loads • Full On-Chip Address Decoding and Output-Sense Amplification • Capability for Wired-OR Connections •	Original	PDF	SN10145 64-BIT 16-Word-by-Four-Bit 50-Ohm SN10139J SN10145 SN10145JE
SN10000 Abstract: SN10139J SN10140 SN10142 SN10145JE SN10148 Text: TYPES SN10140, SN10142, SN10148 64-BIT RANDOM-ACCESS MEMORIES MAY 1975 • SN10140 Drives gO-Ohm Loads • SN10142 and SN10148 Drive 50-Ohm Loads • Fast Access Times: 10 ns Max SN10142 15 ns Max (SN10140, SN10148) • 64-Word-by-One-Bit Organization •	Original	PDF	SN10140, SN10142, SN10148 64-BIT SN10142 SN10148 50-Ohm SN10142) SN10148) SN10000 SN10139J SN10140 SN10145JE
SN1000 Abstract: SN10139J SN10145JE SN10147 Text: TYPE SN10147 128-811 RANDOM-ACCESS MEMORY MAY 1975 • Fast Access Time _ 15 ns Maximum • 128-Word-by-One-Bit Organization • Full On-Chip Address Decoding and Output-Sense Amplification • Capability for Wired-OR Connections • J OR JE DUAL-IN-L1NE PACKAGE TOP VIEW	Original	PDF	SN10147 128-Word-by-One-Bit 128-bit SN1000 SN10139J SN10145JE SN10147
SN10145 Abstract: 6AL7 Text: TYPE SN10145 64-BIT RANDOM-ACCESS MEMORY Fast Access Time . . . 9 ns Typical J O R JE DU A L-FN -LIN E PACKAG E TOP V IE W 16-Word-by-Four-Bit Organization Drives 50-0hm Loads Full On-Chip Address Decoding and Output-Sense Amplification • 5 -V ^ — 1 16	OCR Scan	PDF	SN10145 64-BIT 16-Word-by-Four-Bit 50-0hm SN10145 6AL7
SN10000 Abstract: No abstract text available Text: TYPE SN10145 64-B IT RANDOM-ACCESS MEMORY M A Y 1975 Fast Access Time . . . 9 ns Typical JO R JE DUAL-IN-LINE PACKAGE TOP VIEW 16-Word-by-Four-Bit Organization Drives 50-0hm Loads Full On-Chip Address Decoding and Output-Sense Amplification Capability for Wired-OR Connections	OCR Scan	PDF	SN10145 16-Word-by-Four-Bit 50-0hm SN10000
74s188 programming Abstract: 74S471 N82S06 74S470 dip18 package str 52100 MARKING CODE N-CHANNEL MOS FIELD EFFECT TRANSISTOR 74S472 PROM PROGRAMMING 8080a 74S287 programming instructions Text: The E ngineering Staff of TEXAS INSTRUMENTS INCORPORATED Semiconductor Memory Data Book y for \ T exas In Design Engineers s t r u m e n t s >le of Contents • Alphanumeric Index • GENERAL INFORMATION Selection Guides • Glossary INTERCHANGEABILITY GUIDE	OCR Scan	PDF	38510/MACH MIL-M-38510 74s188 programming 74S471 N82S06 74S470 dip18 package str 52100 MARKING CODE N-CHANNEL MOS FIELD EFFECT TRANSISTOR 74S472 PROM PROGRAMMING 8080a 74S287 programming instructions