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    SINGLE-ENDED I/O BUFFER PADS DIFFERENTIAL Search Results

    SINGLE-ENDED I/O BUFFER PADS DIFFERENTIAL Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    7UL2T125FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T126FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL1G07FU Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Non-Inverter Buffer (Open Drain), USV, -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    MP-5FRJ11UNNS-002 Amphenol Cables on Demand Amphenol MP-5FRJ11UNNS-002 Flat Silver Satin Modular Cables Plug to Tinned End, RJ11 (4 conductors) 2ft Datasheet
    MP-5FRJ12UNNS-007 Amphenol Cables on Demand Amphenol MP-5FRJ12UNNS-007 Flat Silver Satin Modular Cables Plug to Tinned End, RJ12 (6 conductor) 7ft Datasheet

    SINGLE-ENDED I/O BUFFER PADS DIFFERENTIAL Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    mini-lvds receiver

    Abstract: JESD85 ttl to mini-lvds bga 896
    Text: Section IV. I/O Standards This section provides information on Cyclone II single-ended, voltage referenced, and differential I/O standards. This section includes the following chapters: Revision History • Chapter 10, Selectable I/O Standards in Cyclone II Devices


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    ttl to mini-lvds

    Abstract: EP2C5 mini lvds CII51010-2 EP2C20 EP2C35 EP2C50 SSTL-18 SSTL IO pad
    Text: Section IV. I/O Standards This section provides information on Cyclone II single-ended, voltage referenced, and differential I/O standards. This section includes the following chapters: Revision History Altera Corporation • Chapter 10, Selectable I/O Standards in Cyclone II Devices


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    mini-lvds source driver

    Abstract: ttl to mini-lvds EP2C5 HSTL standards linear handbook mini lvds national semiconductor handbook CII51010-2 EP2C20 EP2C35
    Text: Section IV. I/O Standards This section provides information on Cyclone II single-ended, voltage referenced, and differential I/O standards. This section includes the following chapters: Revision History Altera Corporation • Chapter 10, Selectable I/O Standards in Cyclone II Devices


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    Untitled

    Abstract: No abstract text available
    Text: ICS8521I-03 Integrated Circuit Systems, Inc. LOW SKEW, 1-TO-9 DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER GENERAL DESCRIPTION FEATURES The ICS8521I-03 is a low skew, 1-to-9 Differential-to-LVHSTL Fanout Buffer and a member of HiPerClockS the HiPerClockS™ family of High Performance


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    PDF ICS8521I-03 ICS8521I-03 8521AYI-03

    MS-026

    Abstract: S-PQFP-G48 UCC3912 UCC5628 UCC5628FQP UCC5628FQPTR 14-line
    Text: UCC5628 SLUS302C − DECEMBER 1994 − REVISED MARCH 2004 MULTIMODE SCSI 14ĆLINE TERMINATOR FEATURES D Auto Selection Single Ended SE or Low D D D D DESCRIPTION Voltage Differential (LVD) Termination Meets SCSI−1, SCSI−2, SCSI−3, SPI, Ultra (Fast−20), Ultra2 (SPI−2 LVD), Ultra3, Ultra160


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    PDF UCC5628 SLUS302C 14LINE Fast-20) Ultra160 Ultra320 UCC5628 MS-026 S-PQFP-G48 UCC3912 UCC5628FQP UCC5628FQPTR 14-line

    Untitled

    Abstract: No abstract text available
    Text: ICS8521I-03 LOW SKEW, 1-TO-9 DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER GENERAL DESCRIPTION FEATURES The ICS8521I-03 is a low skew, 1-to-9 Differential-toLVHSTL Fanout Buffer . The ICS8521I-03 has two selectable clock inputs. Redundant clock pairs, CLK0, nCLK0 and CLK1, nCLK1 can accept most standard


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    PDF ICS8521I-03 ICS8521I-03 8521AYI-03

    32-PIN

    Abstract: ICS8521AYI-03 ICS8521AYI-03T ICS8521I-03 MS-026
    Text: ICS8521I-03 Integrated Circuit Systems, Inc. LOW SKEW, 1-TO-9 DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER GENERAL DESCRIPTION FEATURES The ICS8521I-03 is a low skew, 1-to-9 Differential-to-LVHSTL Fanout Buffer and a member of HiPerClockS the HiPerClockS™ family of High Performance


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    PDF ICS8521I-03 ICS8521I-03 8521AYI-03 32-PIN ICS8521AYI-03 ICS8521AYI-03T MS-026

    land pattern for bcc

    Abstract: CX02048B16 CX02048B16TR diffential amplifier
    Text: CX02048 Low Power 3.3 Volt Limiting Amplifier for Applications to 3.3 Gbps F EATURES q Wide dynamic range with 5mV input sensitivity at 3.3 Gbps. q Programmable input signal level detect. q Fully differential. q CML data outputs with <80ps rise and fall time.


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    PDF CX02048 CX02048 fibe-8406 land pattern for bcc CX02048B16 CX02048B16TR diffential amplifier

    MS-026

    Abstract: S-PQFP-G48 UCC3912 UCC5628 UCC5628FQP UCC5628FQPTR
    Text: UCC5628 SLUS302B – DECEMBER 1994 – REVISED APRIL 2003 MULTIMODE SCSI 14ĆLINE TERMINATOR FEATURES D Auto Selection Single Ended SE or Low D D D D DESCRIPTION Voltage Differential (LVD) Termination Meets SCSI–1, SCSI–2, SCSI–3, SPI, Ultra (Fast–20), Ultra2 (SPI–2 LVD), Ultra3, Ultra160


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    PDF UCC5628 SLUS302B 14LINE Ultra160 Ultra320 UCC5628 MS-026 S-PQFP-G48 UCC3912 UCC5628FQP UCC5628FQPTR

    CMOS applications handbook

    Abstract: ttl to mini-lvds CII51010-2 EP2C20 EP2C35 EP2C50 SSTL-18
    Text: 10. Selectable I/O Standards in Cyclone II Devices CII51010-2.4 Introduction The proliferation of I/O standards and the need for improved I/O performance have made it critical that low-cost devices have flexible I/O capabilities. Selectable I/O capabilities such as SSTL-18, SSTL-2, and


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    PDF CII51010-2 SSTL-18, CMOS applications handbook ttl to mini-lvds EP2C20 EP2C35 EP2C50 SSTL-18

    SSTL-18

    Abstract: ttl to mini-lvds CII51010-2 EP2C20 EP2C35 EP2C50 JESD8-15
    Text: 10. Selectable I/O Standards in Cyclone II Devices CII51010-2.3 Introduction The proliferation of I/O standards and the need for improved I/O performance have made it critical that low-cost devices have flexible I/O capabilities. Selectable I/O capabilities such as SSTL-18, SSTL-2, and


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    PDF CII51010-2 SSTL-18, SSTL-18 ttl to mini-lvds EP2C20 EP2C35 EP2C50 JESD8-15

    Untitled

    Abstract: No abstract text available
    Text: Low Skew, 1-to-8 Differential/LVCMOS-toLVCMOS Fanout Buffer ICS8308I DATA SHEET GENERAL DESCRIPTION FEATURES The ICS8308I is a low-skew, 1-to-8 Fanout Buffer. The ICS8308I has two selectable clock inputs. The CLK, nCLK pair can accept most differential input levels. The LVCMOS_CLK can accept


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    PDF ICS8308I ICS8308I

    Untitled

    Abstract: No abstract text available
    Text: UCC5628 SLUS302C − DECEMBER 1994 − REVISED MARCH 2004 MULTIMODE SCSI 14ĆLINE TERMINATOR FEATURES D Auto Selection Single Ended SE or Low D D D D DESCRIPTION Voltage Differential (LVD) Termination Meets SCSI−1, SCSI−2, SCSI−3, SPI, Ultra (Fast−20), Ultra2 (SPI−2 LVD), Ultra3, Ultra160


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    PDF UCC5628 SLUS302C 14LINE Fast-20) Ultra160 Ultra320 UCC5628

    Untitled

    Abstract: No abstract text available
    Text: Low Skew, 1-to-8 Differential/LVCMOS-toLVCMOS Fanout Buffer ICS8308I DATA SHEET GENERAL DESCRIPTION FEATURES The ICS8308I is a low-skew, 1-to-8 Fanout Buffer. The ICS8308I has two selectable clock inputs. The CLK, nCLK pair can accept most differential input levels. The LVCMOS_CLK can accept


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    PDF ICS8308I ICS8308I

    Untitled

    Abstract: No abstract text available
    Text: UCC5629 SLUS444A – NOVEMBER 1999 – REVISED MARCH 2003 MULTIMODE SCSI 14 LINE TERMINATOR FEATURES D Auto Selection Single-Ended SE or D D D D D DESCRIPTION Low-Voltage Differential (LVD) Termination Meets SCSI–1, SCSI–2, SCSI–3, SPI, Ultra (Fast–20), Ultra2 (SPI–2 LVD), Ultra3, Ultra160


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    PDF UCC5629 SLUS444A Ultra160 Ultra320 UCC5629

    S-PQFP-G48

    Abstract: MS-026 UCC3912 UCC5629 UCC5629FQP UCC5629FQPTR
    Text: UCC5629 SLUS444A – NOVEMBER 1999 – REVISED MARCH 2003 MULTIMODE SCSI 14 LINE TERMINATOR FEATURES D Auto Selection Single-Ended SE or D D D D D DESCRIPTION Low-Voltage Differential (LVD) Termination Meets SCSI–1, SCSI–2, SCSI–3, SPI, Ultra (Fast–20), Ultra2 (SPI–2 LVD), Ultra3, Ultra160


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    PDF UCC5629 SLUS444A Ultra160 Ultra320 UCC5629 S-PQFP-G48 MS-026 UCC3912 UCC5629FQP UCC5629FQPTR

    transistor 666A

    Abstract: No abstract text available
    Text: Low Skew, 1-to-5, Differential-to-HSTL Fanout Buffer ICS85214I DATA SHEET GENERAL DESCRIPTION FEATURES The ICS85214I is a low skew, high performance 1-to-5 Differ- • Five differential HSTL compatible outputs ential-to-HSTL Fanout Buffer. The CLK0, nCLK0 pair can accept


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    PDF ICS85214I ICS85214I transistor 666A

    TR 1 FUSE

    Abstract: No abstract text available
    Text: UCC5629 SLUS444A – NOVEMBER 1999 – REVISED MARCH 2003 MULTIMODE SCSI 14 LINE TERMINATOR FEATURES D Auto Selection Single-Ended SE or D D D D D DESCRIPTION Low-Voltage Differential (LVD) Termination Meets SCSI–1, SCSI–2, SCSI–3, SPI, Ultra (Fast–20), Ultra2 (SPI–2 LVD), Ultra3, Ultra160


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    PDF UCC5629 SLUS444A Ultra160 Ultra320 UCC5629 TR 1 FUSE

    Untitled

    Abstract: No abstract text available
    Text: UCC5629 SLUS444A – NOVEMBER 1999 – REVISED MARCH 2003 MULTIMODE SCSI 14 LINE TERMINATOR FEATURES D Auto Selection Single-Ended SE or D D D D D DESCRIPTION Low-Voltage Differential (LVD) Termination Meets SCSI–1, SCSI–2, SCSI–3, SPI, Ultra (Fast–20), Ultra2 (SPI–2 LVD), Ultra3, Ultra160


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    PDF UCC5629 SLUS444A Ultra160 Ultra320 UCC5629

    Untitled

    Abstract: No abstract text available
    Text: Low Skew, 1-to-5, Differential-to-HSTL Fanout Buffer ICS85214I DATA SHEET GENERAL DESCRIPTION FEATURES The ICS85214I is a low skew, high performance 1-to-5 Differ- • Five differential HSTL compatible outputs ential-to-HSTL Fanout Buffer. The CLK0, nCLK0 pair can accept


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    PDF ICS85214I ICS85214I

    JESD8-15

    Abstract: mini-lvds connector panels Quad LVDS interface mini-lvds source driver BEL 100N TRANSISTOR BEL 100N TRANSISTOR TYPE METAL TRANSISTOR linear handbook JESD87 t20g th02
    Text: Section IV. I/O Standards This section p rovides inform ation on Cyclone II single-ended, voltage referenced, an d differential T/O standards. This section includes the follow ing chapters: R e v is io n H is to rv • C hap ter 10, Selectable T/O S tandards in Cyclone IT Devices


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    Untitled

    Abstract: No abstract text available
    Text: P^piG EC PLESSEY ADVANCE INFORMATION D .S .3 5 3 4 2.0 SL3522 500MHz 75dB LOGARITHMIC / LIMITING AMPLIFIER Supersedes Edition in Professional Products 1C Handbook May 1991 The SL3522 is a monolithic seven stage successive detection logarithmic amplifier integrated circuit for use in the


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    PDF SL3522 500MHz SL3522 100MHz 120pm 120pm 100pm 100pm

    Untitled

    Abstract: No abstract text available
    Text: S i GEC P L E S S E Y APRIL 1994 ADVANCE INFORMATION S E M I C O N D U C T O R S SL3522 500MHz 75dB LOGARITHMIC / LIMITING AMPLIFIER Supersedes Edition in Professional Products 1C Handbook May 1991 The SL3522 is a monolithic seven stage successive detection logarithmic amplifier integrated circuit for use in the


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    PDF SL3522 500MHz SL3522 100MHz SL3522pad 37bflS22

    Untitled

    Abstract: No abstract text available
    Text: GEC PLESSEY w , ADVANCE INFORMATION S E M I C O N D U C T O R S D.S. 3534 2.0 SL3522 500MHz 75dB LOGARITHMIC / LIMITING AMPLIFIER Supersedes Edition in Professional Products 1C Handbook M ay 1991 The SL3522 is a monolithic seven stage successive detection logarithm ic a m plifier integrated circuit fo r use in the


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    PDF SL3522 500MHz SL3522 120nm 100nm 37hflS22 0025bb7