SHARP LH53 1M Search Results
SHARP LH53 1M Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Contextual Info: LH531000B-S CMOS 1M 128K x 8 3 V-Drive Mask-Programmable ROM FEATURES DESCRIPTION • 131,072 words x 8 bit organization The LH531000B-S is a mask-programmable ROM organized as 131,072 x 8 bits. It is fabricated using silicon-gate CMOS process technology. |
OCR Scan |
LH531000B-S 28-pin, 450-mil LH531000B-S 28-PIN OP028-P-0450) | |
Contextual Info: LH531000B-S CMOS 1M 128K x 8 3 V-Drive MROM FEATURES DESCRIPTION • 131,072 words x 8 bit organization The LH531000B-S is a mask-programmable ROM organized as 131,072 x 8 bits. It is fabricated using silicon-gate CMOS process technology. • Access time: 500 ns (MAX.) |
OCR Scan |
LH531000B-S 28-pin, 450-mil LH531000B-S 28-PIN OP028-P-0450) | |
sharp mask rom
Abstract: LH530900 sharp lh53 1M
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32-pin, 600-mil 32-pin 28-pin LH530900A LH530900A I-------15 sharp mask rom LH530900 sharp lh53 1M | |
lh53Contextual Info: CM O S 1M 128K x 8 Mask-Programmable ROM FEATURES PIN CONNECTIONS • 131,072 • Access time: 150 ns (MAX.) • Power consumption: Operating: 193 mW (MAX.) Standby: 550 \i\N (MAX.) • Fully-static operation • TTL compatible I/O • Three-state outputs |
OCR Scan |
32-pin, 600-mil 525-mil 44-pin, 30800A LH530800A DIP32-P-600) lh53 | |
LH53820
Abstract: LH538200 lh538200d20 LH538 lh5382
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LH538200 32-pin, 600-mil 28-pin 32-PIN LH538200 DIP32-P-600) LH538200D-20 LH53820 lh538200d20 LH538 lh5382 | |
Contextual Info: L H 5 3 1 B - S CMOS 1M 128K x 8 3 V-Drive MROM FEATURES DESCRIPTION • 131,072 words x 8 bit organization The LH531000B-S is a mask-programmable ROM organized as 131,072 x 8 bits. It is fabricated using silicon-gate CMOS process technology. • Power consumption: |
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LH531000B-S 28-pin, 450-mil 28-PIN I000B OP028-P-0450) | |
LH53
Abstract: LH538100
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LH538100 32-PIN 32-pin, 600-m 525-m LH538100 32-pin. 600-mil LH53 | |
Contextual Info: L H 5 3 1 B - S CMOS 1M 128K x 8 3 V-Prive MROM FEATURES DESCRIPTION • 131,072 words x 8 bit organization The LH531000B-S is a mask-programmable ROM organized as 131,072 x 8 bits. It is fabricated using silicon-gate CMOS process technology. • Access time: 500 ns (MAX.) |
OCR Scan |
LH531000B-S 28-pin, 450-mil OP028-P-0450) LH531000BN-S | |
LH538100
Abstract: sharp mask rom sharp lh53 sharp lh53 1M
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LH538100 32-PIN 32-pin, 600-mil 525-mil LH538100 32-Din. sharp mask rom sharp lh53 sharp lh53 1M | |
sharp mask rom 44-pin
Abstract: sharp lh53 D72120
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32-pin, 600-mil 525-mil 44-pin, LH530800A 32-PIN DIP32-P-600) sharp mask rom 44-pin sharp lh53 D72120 | |
431 capacitor NCCContextual Info: LH531000B CMOS 1M 128K x 8 Mask-Programmable ROM FEATURES DESCRIPTION • 1 31,072 x 8 bit organization The LH531000B is a mask-programmable ROM organized as 131,072 x 8 bits. It is fabricated using silicon-gate CMOS process technology. • Access time: 150 ns (M AX.) |
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LH531000B LH531000B 28-pin, 600-m 450-m 44-pin, 28-PIN 600-mil 431 capacitor NCC | |
sharp mask rom 44-pin
Abstract: 1417D lh53
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28-pin, 600-mil 450-mil 44-pin, 14x14 44-PIN LH531000B 28-PIN sharp mask rom 44-pin 1417D lh53 | |
LH5316000
Abstract: lh53 64pin
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LH5316000 64-PIN LH5316000 64-pin, 750-mil SDIP64-P-750) QFP64-P-1420) LH5316000D-20 lh53 64pin | |
a5c capacitor
Abstract: sharp mask rom LH5316000 64 pin CMOS MASK ROM
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LH5316000/ 64-pin, 750-mil LH5316000 64-PIN LH5316000 SDIP64-P-750) a5c capacitor sharp mask rom 64 pin CMOS MASK ROM | |
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sharp lh53
Abstract: sharp lh53 1M
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OCR Scan |
LH531000B 28-pin, 600-m 450-m 44-pin I-------15 600-mil DIP28-P-600) sharp lh53 sharp lh53 1M | |
DIP-32PContextual Info: CMOS 1M 128K x 8 Mask-Programmable ROM FEATURES • 131,072 x 8 bit organization • Access time: 150 ns (MAX.) • Power consumption: Operating: 193 mW (MAX.) Standby: 550 (MAX.) PIN CONNECTIONS / • Fully static operation • TTL compatible I/O • • |
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32-pin, 600-mil 525-mil 44-pin, 44-PIN 53080M LH530800A DIP-32P | |
Contextual Info: CMOS 4M 512K x 8 Mask Programmable ROM FEATURES • 524,288 x 8 bit organization • Access time: 150 ns (MAX.) • Power consumption: DESCRIPTION The LH534400A is a mask programmable ROM organized as 524,288 x 8 bits. It is fabricated using silicon-gate CMOS process technology. |
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LH534400A 32-PIN 32-pin, 600-mil LH534400A I------15 DIP32-P-600) LH534400AD-15 | |
lhmn5
Abstract: 2600T LH5332600T LH53 DA-14-L
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2600T Q017174 LH5332600T -1-A20 A0-A20 D0-D15 DG1717S lhmn5 2600T LH53 DA-14-L | |
d1545Contextual Info: PRELIMINARY LH538600 FEATURES • 1,048,576 x 8 bit organization Byte mode 524 ,2 8 8 x 16 bit organization (Word mode) • BYTE input pin selects bit configuration • Access time: 100 ns (M AX.) • Power consumption: Operating: 3 8 5 mW (M AX.) Standby: 55 0 jiW (M AX.) |
OCR Scan |
LH538600 42-pin, 600-m 44-pin, 48-pin, 64-pin, 42-PIN d1545 |