SFE 55 MB Search Results

MSM518122-JS/ZS

Contextual Info: December 1992 O K I Semiconductor MSM518122-JS/ZS 131,072 x 8-Bit Multiport RAM DESCRIPTION The MSM 518122-JS/ZS is a 1 Mbit CMOS multiport DRAM composed of a 131,072 word by 8-bit dynamic random access memory and a 256 word by 8-bit static serial access memory,

MB87030

Contextual Info: FUJITSU August 1989 Edition 1.0 DATA SHEET MB87033B SCSI Protocol Controller SPC With On-Chip Drivers/Receivers The MB87033B SCSI Protocol Controller (SPC) is a CMOS LSI circuit specifically designed to control a Small Computer Systems Interface (SCSI). The MB87033B enhances the Fujitsu SPC family

Contextual Info: HM538121A Series Preliminary 262,144-W ord x 4-Bit M ultiport C M OS V ideo RAM • DESCR IPTIO N HM 538121AJ Series The HM538121A is a 1-Mbit multiport video RAM equipped with a 128k-word x B-bit dynamic RAM and a 256-word x 8-bit SAM serial access memory . Its RAM and

SFG455D

Abstract: cfw455i murata murata CFW455e CFW455H MURATA sfe 5.5 MHZ SFH455B SFG455E cfw455g SFG455G sfe 4.5 murata
Contextual Info: PIEZO ELECTRIC C E R A M IC FILTERS E M IT T E R B Y P A S S F IL T E R 1 81 0 l3 1 0 1 276 t 01 2 7 0 t 0 3] Model Center Frequency KHz BFU455K 455±2 t 354 t 012 i9 0 -r 0 31 059(1 5) max 3dB Bandwidth (KHz) 8 @ t ~ T | o o ♦ o w [ t i * o ij * . n -

fujitsu scsi protocol

Contextual Info: MB87033B SCSI Protocol Controller SPC with On-Chip Drivers/Receivers Edition 1.0 September 1989 GENERAL DESCRIPTION T he M B 87 03 3B S C SI Protocol C o ntroller (SPC) is a C M O S LSI circu it spe cifica lly d e sig ned to control a Sm all C o m p u te r S ystem s Interface (SCSI). The M B 87033B esta blishes the Fujitsu SPC

EXBF

Abstract: MB87033B MB87031 64 CERAMIC LEADLESS CHIP CARRIER LCC FPT-80P-M01
Contextual Info: MB87033B SCSI Protocol Controller SPC with On-Chip Drivers/Receivers Edition 1.0 Septem ber 1989 GENERAL DESCRIPTION The M B 87 03 3B S C S I P rotocol C o ntroller (SPC) is a C M O S LSI circu it spe cifica lly de sig ned to control a S m all C o m pu te r S ystem s Interface (SCSI). The M B 87033B esta blishes the Fujitsu SPC

scsi electric diagram

Abstract: CXD1185AQ CXD118SAQ CXDI185AQ OFP064-P-1420-A ttd2
Contextual Info: CXD1185AQ S O N Y , Preliminary SCSI Controller LSI Description The CXD 1185AQ is a high performance CMOS SCSI co ntroller LSI th a t conform s to ANSIX3. 13 1 ­ 1986 standards. The CXD1185AQ is capable of operating in both in itia to r and ta rg e t modes. It satis­

HM534251AZ-10

Contextual Info: HM534251A Series-262,144-W ord x 4-B it M ultiport C M OS V ideo RAM • D ESC R IPTIO N H M 534251A J Series The HM534251A is a 1-Mbit multiport video RAM equipped with a 256k-word x 4-bit dynamic RAM and a 512-word x 4-bit SAM serial access memory . Its RAM and

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Abstract: NCR SCSI
Contextual Info: NIC □ 5385 SCSI PROTOCOL CONTROLLER SCSI INTERFACE ♦ S u p p o rts ANSI X3T9.2 SCSI Standard MPU INTERFACE * V ersa tile MPU Bus Interface • - A synch ron ou s data tra n sfe rs to 1.5 MBPS S up po rts both In itia to r and Target roles Parity ge ne ration w /o p tio n a l ch e ckin g

Contextual Info: HAR 7 cP 1991 i i i i Editi°*10_ August 1989 w t | rU II D A TA S H E E T ' * MB87033B SC SI Protocol Controller SPC With On-Chip Drivers/Receivers The MB87033B SCSI Protocol Controller (SPC) is a CMOS LSI circuit specifically designed to control a Small Computer Systems

MT90820AL

Abstract: MT90820AP1 OF100 MT90820 MT90820AL1 MT90820AP MT90820APR MT90820APR1 STO10
Contextual Info: CMOS ST-BUSTM Family MT90820 Large Digital Switch Data Sheet Features August 2005 • 2,048 x 2,048 channel non-blocking switching at 8.192 Mb/s • Per-channel variable or constant throughput delay • Automatic identification of ST-BUS/GCI interfaces •

16 input 16 output

Abstract: FD11
Contextual Info: CMOS ST-BUSTM Family MT90820 Large Digital Switch Data Sheet Features May 2005 • 2,048 x 2,048 channel non-blocking switching at 8.192 Mb/s • Per-channel variable or constant throughput delay • Automatic identification of ST-BUS/GCI interfaces • Accept ST-BUS streams of 2.048 Mb/s,

HMVIP standard

Abstract: MT90820 MT90820AL MT90820AP
Contextual Info: CMOS ST-BUS FAMILY MT90820 Large Digital Switch  Preliminary Information Features • • • • • • • • • • • • ISSUE 1 2,048 x 2,048 channel non-blocking switching at 8.192 Mb/s Per-channel variable or constant throughput delay Automatic identification of ST-BUS/GCI interfaces

Contextual Info: MITEL" CMOS ST-BUS FAMILY Large Digital Switch Preliminary Information Features • • • • • • • • • • • • MT90820 ISSUE 1 2,048 x 2,048 channel non-blocking switching at 8.192 Mb/s Per-channel variable or constant throughput delay

Contextual Info: 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 8,192 X 8,192 ADVANCE INFORMATION IDT72V71650 CONFIDENTIAL FEATURES: DESCRIPTION: • • The IDT72V71650 has a non-blocking switch capacity of 1,024 x 1,024 channels at 2.048 Mb/s, 2,048 x 2,048 channels at 4.096 Mb/s, and 4,096 x

FD110

Contextual Info: 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 8,192 x 8,192 ADVANCE INFORMATION IDT72V73250 FEATURES: DESCRIPTION: • • The IDT72V73250 has a non-blocking switch capacity of 8,192 x 8,192 channels at 32.768 Mb/s. With 16 inputs and 16 outputs, programmable per

sfe 6,5 mb

Abstract: OF81 1A1-1A10 TX11-RX11 sfe 55 mb
Contextual Info: 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 8,192 x 8,192 ADVANCE INFORMATION IDT72V71650 FEATURES: DESCRIPTION: • • The IDT72V71650 has a non-blocking switch capacity of 1,024 x 1,024 channels at 2.048 Mb/s, 2,048 x 2,048 channels at 4.096 Mb/s, and 4,096 x

AG13

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MT90820

Abstract: MT90820AL MT90820AP
Contextual Info: CMOS ST-BUS FAMILY MT90820 Large Digital Switch Features DS5362 ISSUE 6 April 2000 Ordering Information • • • • • • • • • • • 2,048 x 2,048 channel non-blocking switching at 8.192 Mb/s Per-channel variable or constant throughput delay

sfe 6,5 mb

Contextual Info: 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 8,192 X 8,192 ADVANCE INFORMATION IDT72V71650 CONFIDENTIAL FEATURES: DESCRIPTION: • • The IDT72V71650 has a non-blocking switch capacity of 1,024 x 1,024 channels at 2.048 Mb/s, 2,048 x 2,048 channels at 4.096 Mb/s, and 4,096 x

Contextual Info: • b S 4 c] 3 7 D OOlEhbl ÔT2 ■ CMOS ST-BUS FAMILY M ITEL MT90820 Large Digital Switch Features • 2,048 x 2,048 channel non-blocking switching at 8,192 Mb/s Per-channel variable or constant throughput delay Automatic identification of ST-BUS/GCI interfaces

Contextual Info: CMOS ST-BUS FAMILY MT90820 Large Digital Switch Features DS5362 ISSUE 6 April 2000 Ordering Information • • • • • • • • • • • 2,048 x 2,048 channel non-blocking switching at 8.192 Mb/s Per-channel variable or constant throughput delay

Contextual Info: CMOS ST-BUS FAMILY MT90820 Large Digital Switch Features • • • • • • • • • • • ISSUE 5 2,048 x 2,048 channel non-blocking switching at 8.192 Mb/s Per-channel variable or constant throughput delay Automatic identification of ST-BUS/GCI interfaces

Contextual Info: CMOS ST-BUS FAMILY MT90820 Large Digital Switch M ITEL Features • ISSUE 2 2,048 x 2,048 channel non-blocking switching at 8.192 Mb/s Decem ber 1996 Ordering Information MT90820AP 84 Pin PLCC MT90820AL 100 Pin PQFP -40 to +85°C Per-channel variable or constant throughput delay