SDLA 001 Search Results

Contextual Info: Digital and Mixed Signal Oscilloscopes DPO/DSA/MSO70000 Series Datasheet 6.25 Gb/s Real-time Serial Trigger – Assures triggering on the first instance of a specified NRZ or 8b/10b pattern to allow isolation of pattern-dependent effects Application Support for High-speed Serial Industry Standards,

s-master digital amplifier

Abstract: 34L 8U microphone 8.192MHz crystal oscillator nec EMP7032 CXT8192 echo audio schematic ECHO schematic diagrams ECHO SCHEMATIC FOR CB L50Q CDB6403
Contextual Info: CS6403 A Cirrus Logic Company Echo-Cancelling Codec Features General D e scrip tio n • Applicable in: - Digital-Cellular Hands-Free Phones - Analog-Cellular Hands-Free Phones - Office Speaker Phones - Desktop & Video Teleconferencing The CS6403 is an application-specific digital signal

8 pin ic chip 4835

Contextual Info: Digital and Mixed Signal Oscilloscopes DPO/DSA/MSO70000C and D Series Datasheet Pinpoint Triggering – Minimize time spent trying to acquire problem signals for efficient troubleshooting and shortened debug time Visual Trigger – Precisely qualify triggers and find unique events in

7404 ic

Abstract: 7404 spice model digital CDI TIMING LS7400 AMD386 7400 spice model TRANSISTOR 025 B14 ZP 7404 inverter spice 7400 spice model TRANSISTOR BIPOLAR ABEL-HDL Reference Manual
Contextual Info: Schematic Entry User Manual August 1994 090-0602-001 Data I/O has made every attempt to ensure that the information in this document is accurate and complete. Data I/O assumes no liability for errors, or for any incidental, consequential, indirect or special damages, including, without limitation, loss of use,

LS7400

Abstract: internal structure 74LS00 nand gate 7404 ic draw pin configuration of ic 7404 D flip-flop 74175 pin data sheet 7404 inverter spice amd386 cdi schematics pcb 7400 spice model 74ls00
Contextual Info: Schematic Entry User Manual August 1994 090-0602-001 Data I/O has made every attempt to ensure that the information in this document is accurate and complete. Data I/O assumes no liability for errors, or for any incidental, consequential, indirect or special damages, including, without limitation, loss of use,

44-PIN

Abstract: 68HC11 DSP1609 HC11 T5490 IM91 XWXX
Contextual Info: Preliminary Data Sheet July 1999 DSP1609 Digital Signal Processor 1 Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ For 5 V operation: — 10.0 ns instruction cycle time 100 MIPS (See Table 92 on page 73.)

ic MIP 411

Contextual Info: Preliminary Data Sheet August 1998 microelectronics group Lucent Technologies Bell Labs Innovations FlashDSP 1609F Digital Signal Processor 1 Features 2 Description • 12.5 ns instruction cycle time 80 MIPS at 3.3 V operation ■ Power-saving features:

44-PIN

Abstract: 68HC11 DSP1609 DSP1609F HC11 DSP1600 lucent 451
Contextual Info: Preliminary Data Sheet July 1999 FlashDSP 1609F Digital Signal Processor 1 Features • ■ 12.5 ns instruction cycle time 80 MIPS at 3.3 V operation Power-saving features: — Low-power 0.35 µm CMOS technology; fully static design — Active power: 6.5 mW/MIPS at 3.3 V

Contextual Info: Preliminary Data Sheet August 1998 m i c r o e l e c t r o n i c s group Lucent Technologies Bell Labs Innovations FlashDSP 1609F Digital Signal Processor 1 Features 2 Description • 12.5 ns instruction cycle time 80 MIPS at 3.3 V operation ■ Power-saving features:

DSP-1600 lucent

Abstract: b13j SP1609
Contextual Info: Preliminary Data Sheet February 1998 m ic ro el ec tr on ics group Lucent Technologies Bell Labs Innovations DSP1609/FlashDSP 1609F Digital Signal Processor 1 Features 2 Description • For 5 V operation: — 10.0 ns instruction cycle time 100 MIPS (see page 104)

sol 4011 be

Abstract: 68HC11 DSP1609 DSP1609F HC11 ne10011
Contextual Info: Preliminary Data Sheet February 1998 microelectronics group Lucent Technologies Bell Labs Innovations DSP1609/Flash DSP “\ 609F Digital Signal Processor 1 Features 2 Description • For 5 V operation: — 10.0 ns instruction cycle time 100 MIPS (see page 104)