SCLS41 Search Results

Contextual Info: SN54AHCT174, SN74AHCT174 HEX D-TYPE FLIP-FLOPS WITH CLEAR SCLS419D – JUNE 1998 – REVISED NOVEMBER 1999 D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Inputs Are TTL-Voltage Compatible Contain Six Flip-Flops With Single-Rail Outputs

Contextual Info: SN54AHCT594, SN74AHCT594 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS417A – JUNE 1998 – REVISED OCTOBER 1999 D D 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QA SER RCLR RCLK SRCLK SRCLR QH′ SN54AHCT594 . . . FK PACKAGE TOP VIEW QD QE NC QF QG description

Contextual Info: SN54AHCT594, SN74AHCT594 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS417B – JUNE 1998 – REVISED NOVEMBER 1999 D D 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QA SER RCLR RCLK SRCLK SRCLR QH′ SN54AHCT594 . . . FK PACKAGE TOP VIEW QD QE NC QF QG description

Contextual Info: SN54LV595A, SN74LV595A 8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS SCLS414C – APRIL 1998 – REVISED MARCH 1999 D D D D D description 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QA SER OE RCLK SRCLK SRCLR QH′ SN54LV595A . . . FK PACKAGE TOP VIEW

Contextual Info: SN54LV541A, SN74LV541A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCLS410D – APRIL 1998 – REVISED MAY 2000 D D D D D D SN54LV541A . . . J OR W PACKAGE SN74LV541A . . . DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW OE1 A1 A2 A3 A4 A5 A6 A7 A8 GND 1 20 2 19

A115-A

Abstract: C101 SN54LV541A SN74LV541A
Contextual Info: SN54LV541A, SN74LV541A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCLS410I − APRIL 1998 − REVISED APRIL 2005 D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV Output VOH Undershoot >2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on

A115-A

Abstract: AHCT367 C101 SN54AHCT367 SN74AHCT367
Contextual Info: SN54AHCT367, SN74AHCT367 HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS418G – JUNE 1998 – REVISED JULY 2003 D D D D SN54AHCT367 . . . J OR W PACKAGE SN74AHCT367 . . . D, DB, DGV, N, NS, OR PW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible

Contextual Info: SN54LV574A, SN74LV574A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS412F – APRIL 1998 – REVISED SEPTEMBER 2002 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q CLK 1D 2D 3D 4D 5D 6D 7D 8D 20 19 1Q 18 2Q

A115-A

Abstract: C101 LV595A SN54LV595A SN74LV595A
Contextual Info: SN54LV595A, SN74LV595A 8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS SCLS414F – APRIL 1998 – REVISED JANUARY 2001 D description The ’LV595A devices are 8-bit shift registers designed for 2-V to 5.5-V VCC operation. These devices contain an 8-bit serial-in,

SN54AHCT594

Abstract: SN74AHCT594 A115-A AHCT594 C101
Contextual Info: SN54AHCT594, SN74AHCT594 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS417D – JUNE 1998 – REVISED JANUARY 2001 D D 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QA SER RCLR RCLK SRCLK SRCLR QH′ SN54AHCT594 . . . FK PACKAGE TOP VIEW QC QB description

A115-A

Abstract: C101 SN54LV573A SN74LV573A SN74LV573ARGYR
Contextual Info: SN54LV573A, SN74LV573A OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS411F – APRIL 1998 – REVISED SEPTEMBER 2002 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q LE 1D 2D 3D 4D 5D 6D 7D 8D 20 19 1Q 18 2Q 3 17 3Q

A115-A

Abstract: AHCT594 C101 SN54AHCT594 SN74AHCT594
Contextual Info: SN54AHCT594, SN74AHCT594 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS417F – JUNE 1998 – REVISED NOVEMBER 2002 D D 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QA SER RCLR RCLK SRCLK SRCLR QH′ SN54AHCT594 . . . FK PACKAGE TOP VIEW QC QB description/ordering information

Contextual Info: SN54LV573A, SN74LV573A OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS411I − APRIL 1998 − REVISED APRIL 2005 20 2 19 3 18 4 17 16 5 6 15 7 14 8 13 9 12 10 11 VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q LE 1D 2D 3D 4D 5D 6D 7D 8D 1 20 19 1Q 18 2Q 2 3 17 3Q 16 4Q

Contextual Info: SN54LV574A, SN74LV574A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS412I − APRIL 1998 − REVISED APRIL 2005 2 19 3 18 17 4 16 5 15 6 7 14 8 13 9 12 10 11 VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q CLK 1D 2D 3D 4D 5D 6D 7D 8D 1 20 19 1Q 18 2Q 2 3 17 3Q

HB367

Abstract: A115-A AHCT367 C101 SN54AHCT367 SN74AHCT367
Contextual Info: SN54AHCT367, SN74AHCT367 HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS418F – JUNE 1998 – REVISED MAY 2002 D D D D SN54AHCT367 . . . J OR W PACKAGE SN74AHCT367 . . . D, DB, DGV, N, NS, OR PW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible

A115-A

Abstract: C101 SN54LV541A SN74LV541A SN74LV541ARGYR lv541
Contextual Info: SN54LV541A, SN74LV541A OCTAL BUFFERS/DRIVERS WITH 3ĆSTATE OUTPUTS SCLS410H − APRIL 1998 − REVISED DECEMBER 2004 D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV Output VOH Undershoot >2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on

A115-A

Abstract: C101 SN54LV574A SN74LV574A SN74LV574ARGYR R-PBGA-N20
Contextual Info: SN54LV574A, SN74LV574A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS412G – APRIL 1998 – REVISED AUGUST 2003 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q CLK 1D 2D 3D 4D 5D 6D 7D 8D 20 19 1Q 18 2Q 3 17 3Q

Contextual Info: SN54LV594A, SN74LV594A 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS413F – APRIL 1998 – REVISED AUGUST 2003 D D D D 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QA SER RCLR RCLK SRCLK SRCLR QH′ SN54LV594A . . . FK PACKAGE TOP VIEW QD QE NC QF QG 3 2 1 20 19

A115-A

Abstract: AHCT594 C101 SN54AHCT594 SN74AHCT594 SN74AHCT594N
Contextual Info: SN54AHCT594, SN74AHCT594 8ĆBIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS417H − JUNE 1998 − REVISED SEPTEMBER 2003 D Inputs Are TTL-Voltage Compatible D 8-Bit Serial-In, Parallel-Out Shift SN54AHCT594 . . . J OR W PACKAGE SN74AHCT594 . . . D, DB, N, NS, OR PW PACKAGE

Contextual Info: SN54LV541A, SN74LV541A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCLS410I − APRIL 1998 − REVISED APRIL 2005 D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV Output VOH Undershoot >2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on

Contextual Info: SN54AHCT594, SN74AHCT594 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS417C – JUNE 1998 – REVISED JANUARY 2000 D D 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QA SER RCLR RCLK SRCLK SRCLR QH′ SN54AHCT594 . . . FK PACKAGE TOP VIEW QD QE NC QF QG description

Contextual Info: SN54AHCT594, SN74AHCT594 8ĆBIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS417H − JUNE 1998 − REVISED SEPTEMBER 2003 D Inputs Are TTL-Voltage Compatible D 8-Bit Serial-In, Parallel-Out Shift SN54AHCT594 . . . J OR W PACKAGE SN74AHCT594 . . . D, DB, N, NS, OR PW PACKAGE

Contextual Info: SN54AHCT594, SN74AHCT594 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS417F – JUNE 1998 – REVISED NOVEMBER 2002 D D 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QA SER RCLR RCLK SRCLK SRCLR QH′ SN54AHCT594 . . . FK PACKAGE TOP VIEW QC QB description/ordering information

Contextual Info: SN54LV595A, SN74LV595A 8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS SCLS414I – APRIL 1998 – REVISED OCTOBER 2002 SN74LV595A . . . RGY PACKAGE TOP VIEW 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QA SER OE RCLK SRCLK SRCLR QH′ QC QD QE QF QG QH