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    Abstract: No abstract text available
    Text: SN74LVC2G00 DUAL 2-INPUT POSITIVE-NAND GATE SCES193B – APRIL 1999 – REVISED FEBRUARY 2000 D D D D EPIC Enhanced-Performance Implanted CMOS Process Ioff Feature Supports Partial-Power-Down Mode Operation Supports 5-V VCC Operation Package Options Include Plastic Thin


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    PDF SN74LVC2G00 SCES193B SN74LVC2G00