SCES108D Search Results
SCES108D Datasheets Context Search
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Contextual Info: SN74ALVC32 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCES108D – JULY 1997 – REVISED AUGUST 1998 D EPIC Enhanced-Performance Implanted D D D D, DGV, OR PW PACKAGE (TOP VIEW CMOS) Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V |
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SN74ALVC32 SCES108D MIL-STD-883, | |
Contextual Info: SN74ALVC32 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCES108D - JULY 1997 - REVISED AUGUST 1998 • EPIC Enhanced-Performance Implanted CMOS Submicron Process • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) |
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SN74ALVC32 SCES108D MIL-STD-883, JESD17 | |
SN74ALVC32Contextual Info: SN74ALVC32 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCES108D – JULY 1997 – REVISED AUGUST 1998 D D D D EPIC Enhanced-Performance Implanted CMOS Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) |
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SN74ALVC32 SCES108D MIL-STD-883, SN74ALVC32 | |
FT 4013 d dual flip flop
Abstract: FT 4013 D flip flop 74HC octal bidirectional latch 74HCT 4013 DATASHEET 4511 pin configuration SN7432 fairchild CMOS TTL Logic Family Specifications 7805 acv Datasheet of decade counter CD 4017 sn74154
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T flip flop IC
Abstract: pin designation for CD40110B IC 74LS series logic gates 3 input or gate FT 4013 d dual flip flop ic cmos 4011 CD4001* using NAND gates IC CD 4033 pin configuration Quad 2 input nand gate cd 4093 FT 4013 D flip flop 74HCT 4013 DATASHEET
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CMOS Data Book Texas Instruments Incorporated
Abstract: SN74ALB16244 SN74ALB16245 SN74ALVC00 SN74ALVC04 SN74ALVC08 SN74ALVC10 SN74ALVC125 SN74ALVC14 SN74ALVC32
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10-pF CMOS Data Book Texas Instruments Incorporated SN74ALB16244 SN74ALB16245 SN74ALVC00 SN74ALVC04 SN74ALVC08 SN74ALVC10 SN74ALVC125 SN74ALVC14 SN74ALVC32 |