CDCUA877ZQLR
Abstract: No abstract text available
Text: CDCUA877 www.ti.com SCAS769A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible
|
Original
|
PDF
|
CDCUA877
SCAS769A
52-Ball
65-mm
CUA877/CAU878
PC2-3200/4300/5300/640pplication
CDCUA877ZQLR
|
2506036017Y0
Abstract: CDCUA877 CDCUA877ZQL CDCUA877ZQLR CDCUA877ZQLT
Text: CDCUA877 www.ti.com SCAS769A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible
|
Original
|
PDF
|
CDCUA877
SCAS769A
52-Ball
65-mm
CUA877/CAU878
2506036017Y0
CDCUA877
CDCUA877ZQL
CDCUA877ZQLR
CDCUA877ZQLT
|
Untitled
Abstract: No abstract text available
Text: CDCUA877 www.ti.com SCAS769A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible
|
Original
|
PDF
|
CDCUA877
SCAS769A
52-Ball
65-mm
CUA877/CAU878
PC2-3200/4300/5300/640face
|
Untitled
Abstract: No abstract text available
Text: CDCUA877 www.ti.com SCAS769A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible
|
Original
|
PDF
|
CDCUA877
SCAS769A
52-Ball
65-mm
|
2506036017Y0
Abstract: CDCUA877 CDCUA877ZQL CDCUA877ZQLR CDCUA877ZQLT
Text: CDCUA877 www.ti.com SCAS769A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible
|
Original
|
PDF
|
CDCUA877
SCAS769A
52-Ball
65-mm
CUA877/CAU878
2506036017Y0
CDCUA877
CDCUA877ZQL
CDCUA877ZQLR
CDCUA877ZQLT
|
Untitled
Abstract: No abstract text available
Text: CDCUA877 www.ti.com SCAS769A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible
|
Original
|
PDF
|
CDCUA877
SCAS769A
52-Ball
65-mm
CUA877/CAU878
PC2-3200/4300/5300/640face
|
CUA877
Abstract: No abstract text available
Text: CDCUA877 www.ti.com SCAS769 – AUGUST 2006 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible Operating Frequency: 125 MHz to 410 MHz
|
Original
|
PDF
|
CDCUA877
SCAS769
52-Ball
65-mm
CUA877/CAU878
PC2-3200/4300/5300/6400o
CUA877
|
Untitled
Abstract: No abstract text available
Text: CDCUA877 www.ti.com SCAS769A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible
|
Original
|
PDF
|
CDCUA877
SCAS769A
52-Ball
65-mm
CUA877/CAU878
PC2-3200/4300/5300/640Timers
|
Untitled
Abstract: No abstract text available
Text: CDCUA877 www.ti.com SCAS769A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible
|
Original
|
PDF
|
CDCUA877
SCAS769A
52-Ball
65-mm
CUA877/CAU878
PC2-3200/4300/5300/640d
|
Untitled
Abstract: No abstract text available
Text: CDCUA877 www.ti.com SCAS769A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible
|
Original
|
PDF
|
CDCUA877
SCAS769A
52-Ball
65-mm
CUA877/CAU878
PC2-3200/4300/5300/640pplication
|
Untitled
Abstract: No abstract text available
Text: CDCUA877 www.ti.com SCAS769A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible
|
Original
|
PDF
|
CDCUA877
SCAS769A
52-Ball
65-mm
|
Untitled
Abstract: No abstract text available
Text: CDCUA877 www.ti.com SCAS769A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible
|
Original
|
PDF
|
CDCUA877
SCAS769A
52-Ball
65-mm
CUA877/CAU878
PC2-3200/4300/5300/640Timers
|
SB865A
Abstract: SB866A ddr2 PLL JESD82 SSTUx32864 SSTU32868 JEDEC DDR2-400 2rx8 SB866 SN74SSTUB32866
Text: Application Report SCAA101 – March 2009 DDR2 Memory Interface Clocks and Registers – Overview Christian Schmoeller . CDC - Clock Distribution Circuits ABSTRACT This application report gives an overview of the existing JEDEC DDR2 Register and
|
Original
|
PDF
|
SCAA101
SB865A
SB866A
ddr2 PLL
JESD82
SSTUx32864
SSTU32868
JEDEC DDR2-400
2rx8
SB866
SN74SSTUB32866
|
JESD21
Abstract: CDCU2A877 CDCU877B CDCUA877 TS5A6542
Text: Application Report SCAA087 – May 2008 Application Examples for the CDCUx877x PLL Family Christian Schmoeller . CDC - Clock Distribution Circuits ABSTRACT This application report provides examples of how to use the PLLs of the CDCUx877x
|
Original
|
PDF
|
SCAA087
CDCUx877x
CDCUx877x
JESD21
CDCU2A877
CDCU877B
CDCUA877
TS5A6542
|