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    RX2 1017 Search Results

    RX2 1017 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    54112-809101700LF Amphenol Communications Solutions BergStik®, Board to Board connector, Unshrouded vertical stacked header, Through Hole, Double Row, 10 Positions, 2.54mm (0.100in) Pitch. Visit Amphenol Communications Solutions
    65781-017LF Amphenol Communications Solutions Dubox® 2.54mm, Board to Board Connector, Vertical card connector, Double Row, 2.54mm (0.100in) pitch ,34 Positions Visit Amphenol Communications Solutions
    93690-101-72LF Amphenol Communications Solutions BergStik®, Board to Board connector, Unshrouded vertical header, Press Fit, Double Row, 72 Positions, 2.54 mm (0.100in) Pitch. Visit Amphenol Communications Solutions
    10101788-002CLF Amphenol Communications Solutions SATA, Storage and Server Connector, Plug, Right Angle, Surface Mount, 22 Positions Visit Amphenol Communications Solutions
    75844-101-72 Amphenol Communications Solutions BergStik®, Board to Board connector, Unshrouded vertical header, Through Hole, Double Row, 72 Positions, 2.54mm (0.100in) Pitch. Visit Amphenol Communications Solutions

    RX2 1017 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    S3320

    Abstract: No abstract text available
    Text: DATA SHEET SKY13455-31: 0.4 to 2.7 GHz SP12T Switch with MIPI RFFE Interface Applications • 2G/3G/4G multimode cellular handsets LTE, UMTS, CDMA2000, EDGE, GSM  Embedded data cards TRX1 TRX2 TRX3 Features TRX4 ANT TRX7 TRX8 (RX1) TRX9 (RX2) TRX10 (RX3)


    Original     		SKY13455-31: SP12T CDMA2000, TRX10 SQ04-0074. 22-pin, J-STD-020) 202952B S3320 PDF

    Untitled

    Abstract: No abstract text available
    Text: DATA SHEET SKY18120-11: 0.4-2.7 GHz SP9T Antenna Switch Module With GSM Transmit Filters Applications • Dual-mode, multi-band handsets and data cards GSM/EDGE, Quad/UMTS or LTE dual mode • Low-cost, ultra-small footprint embedded modules Features • Supports quad-band GSM, tri-band UMTS, LTE, or TD-SCDMA


    Original     		SKY18120-11: 16-pin, 201329F PDF

    201329F

    Abstract: No abstract text available
    Text: DATA SHEET SKY18120-11: 0.4-2.7 GHz SP9T Antenna Switch Module With GSM Transmit Filters Applications • Dual-mode, multi-band handsets and data cards GSM/EDGE, Quad/UMTS or LTE dual mode • Low-cost, ultra-small footprint embedded modules Features • Supports quad-band GSM, tri-band UMTS, LTE, or TD-SCDMA


    Original     		SKY18120-11: 16-pin, J-STD-020) SKY1812yworks 201329F 201329F PDF

    201576B

    Abstract: S2874
    Text: DATA SHEET SKY65364-11: 900 MHz Transmit/Receive Front-End Module Applications Description • Automated meter reading Skyworks SKY65364-11 is a high performance, transmit/receive T/R Front-End Module (FEM). The device provides a complete T/R chain with T/R switches.


    Original     		SKY65364-11: SKY65364-11 201576B 201576B S2874 PDF

    SKY65366-11

    Abstract: TW21
    Text: DATA SHEET SKY65366-11: 400 MHz Transmit/Receive Front-End Module Applications Description • Automated meter reading Skyworks SKY65366-11 is a high performance, transmit/receive T/R Front-End Module (FEM). The device provides a complete T/R chain with T/R switches.


    Original     		SKY65366-11: SKY65366-11 201724B TW21 PDF

    SKY65313-21

    Abstract: No abstract text available
    Text: DATA SHEET SKY65313-21: 900 MHz Transmit/Receive Front-End Module Applications Description • Automated meter reading Skyworks SKY65313-21 is a high performance, transmit/receive T/R Front-End Module (FEM). The device provides a complete T/R chain with T/R switches.


    Original     		SKY65313-21: SKY65313-21 02121A PDF

    dvi schematic

    Abstract: S-PQFP-G100 Package powerPAD layout
    Text: TFP403 TI PanelBus DIGITAL RECEIVER SLDS125 – DECEMBER 2000 D D D D D D D Supports UXGA Resolution Output Pixel Rates up to 165 MHz Digital Visual Interface (DVI 1.0) Specification Compliant1 Pin-for-Pin Compatible With TFP501 for Simple Upgrade Path to HDCP2


    Original     		TFP403 SLDS125 TFP501 dvi schematic S-PQFP-G100 Package powerPAD layout PDF

    TFP401

    Abstract: 100-PIN TFP401A TFP401APZP TFP401PZP
    Text: TFP401, TFP401A TI PanelBus DIGITAL RECEIVER SLDS120A - MARCH 2000 – REVISED JUNE 2000 D D D D D D D Supports UXGA Resolution Output Pixel Rates Up to 165 MHz Digital Visual Interface (DVI) Specification Compliant1 True-Color, 24 Bit/Pixel, 16.7M Colors at


    Original     		TFP401, TFP401A SLDS120A TFP401A TFP401 100-PIN TFP401APZP TFP401PZP PDF

    dvi schematic

    Abstract: RX-2 -G s S-PQFP-G100 Package powerPAD layout TFP403 TFP501
    Text: TFP403 TI PanelBus DIGITAL RECEIVER SLDS125 – DECEMBER 2000 D D D D D D D Supports UXGA Resolution Output Pixel Rates up to 165 MHz Digital Visual Interface (DVI 1.0) Specification Compliant1 Pin-for-Pin Compatible With TFP501 for Simple Upgrade Path to HDCP2


    Original     		TFP403 SLDS125 TFP501 dvi schematic RX-2 -G s S-PQFP-G100 Package powerPAD layout TFP403 PDF

    receiver CONTROLLER rx-2

    Abstract: dvi schematic diode 101a HSYNC, VSYNC, DE RX-2 -G s S-PQFP-G100 Package powerPAD layout TFP101A tft monitor schematic 100-PIN TFP101
    Text: TFP101, TFP101A TI PanelBus DIGITAL RECEIVER SLDS119A - MARCH 2000 – REVISED JUNE 2000 D D D D D D D Supports XGA Resolution Output Pixel Rates Up to 86 MHz Digital Visual Interface (DVI) Specification Compliant1 True-Color, 24 Bit/Pixel, 16.7M Colors at 1


    Original     		TFP101, TFP101A SLDS119A TFP101A receiver CONTROLLER rx-2 dvi schematic diode 101a HSYNC, VSYNC, DE RX-2 -G s S-PQFP-G100 Package powerPAD layout tft monitor schematic 100-PIN TFP101 PDF

    100-PIN

    Abstract: TFP201 TFP201A TFP201APZP TFP201PZP
    Text: TFP201, TFP201A TI PanelBus DIGITAL RECEIVER SLDS116A - MARCH 2000 – REVISED JUNE 2000 D Supports SXGA Resolution D D D D D D Reduced Power Consumption – 1.8 V Core Output Pixel Rates Up to 112 MHz Digital Visual Interface (DVI) Specification Compliant1


    Original     		TFP201, TFP201A SLDS116A TFP201A 100-PIN TFP201 TFP201APZP TFP201PZP PDF

    S-PQFP-G100 Package footprint

    Abstract: No abstract text available
    Text: TFP403 TI PanelBus DIGITAL RECEIVER SLDS125A – DECEMBER 2000 – REVISED OCTOBER 2002 D D D D D D D Supports UXGA Resolution Output Pixel Rates up to 165 MHz Digital Visual Interface (DVI 1.0) Specification Compliant1 Pin-for-Pin Compatible With TFP501 for


    Original     		TFP403 SLDS125A TFP501 S-PQFP-G100 Package footprint PDF

    Untitled

    Abstract: No abstract text available
    Text: TFP403 TI PanelBus DIGITAL RECEIVER SLDS125A − DECEMBER 2000 − REVISED OCTOBER 2002 D Supports UXGA Resolution Output Pixel D D D D D D 4x Over-Sampling for Reduced Bit-Error Rates up to 165 MHz Digital Visual Interface (DVI 1.0) Specification Compliant1


    Original     		TFP403 SLDS125A TFP501 PDF

    TFP401

    Abstract: 401A TFP401A TFP401APZP TFP401PZP 100-PIN HSYNC, VSYNC, DE, input, output
    Text: TFP401, TFP401A TI PanelBus DIGITAL RECEIVER SLDS120A - MARCH 2000 – REVISED JUNE 2000 D D D D D D D Supports UXGA Resolution Output Pixel Rates Up to 165 MHz Digital Visual Interface (DVI) Specification Compliant1 True-Color, 24 Bit/Pixel, 16.7M Colors at


    Original     		TFP401, TFP401A SLDS120A TFP401A TFP401 401A TFP401APZP TFP401PZP 100-PIN HSYNC, VSYNC, DE, input, output PDF

    S-PQFP-G100 Package footprint

    Abstract: S-PQFP-G100 Package powerPAD layout TFP403 TFP501
    Text: TFP403 TI PanelBus DIGITAL RECEIVER SLDS125A – DECEMBER 2000 – REVISED OCTOBER 2002 D Supports UXGA Resolution Output Pixel D D D D D D 4x Over-Sampling for Reduced Bit-Error Rates up to 165 MHz Digital Visual Interface (DVI 1.0) Specification Compliant1


    Original     		TFP403 SLDS125A TFP501 S-PQFP-G100 Package footprint S-PQFP-G100 Package powerPAD layout TFP403 PDF

    100-PIN

    Abstract: TFP101 TFP101A TFP101APZP TFP101PZP HSYNC, VSYNC, DE, input, output
    Text: TFP101, TFP101A TI PanelBus DIGITAL RECEIVER SLDS119A - MARCH 2000 – REVISED JUNE 2000 D D D D D D D Supports XGA Resolution Output Pixel Rates Up to 86 MHz Digital Visual Interface (DVI) Specification Compliant1 True-Color, 24 Bit/Pixel, 16.7M Colors at 1


    Original     		TFP101, TFP101A SLDS119A TFP101A 100-PIN TFP101 TFP101APZP TFP101PZP HSYNC, VSYNC, DE, input, output PDF

    Untitled

    Abstract: No abstract text available
    Text: TFP403 TI PanelBus DIGITAL RECEIVER SLDS125A − DECEMBER 2000 − REVISED OCTOBER 2002 D Supports UXGA Resolution Output Pixel D D D D D D 4x Over-Sampling for Reduced Bit-Error Rates up to 165 MHz Digital Visual Interface (DVI 1.0) Specification Compliant1


    Original     		TFP403 SLDS125A TFP501 PDF

    dvi schematic

    Abstract: HSYNC, VSYNC, DE receiver CONTROLLER rx-2 RX-2 -G s tmds receiver 100-PIN TFP201 TFP201A TFP201APZP TFP201PZP
    Text: TFP201, TFP201A TI PanelBus DIGITAL RECEIVER SLDS116A - MARCH 2000 – REVISED JUNE 2000 D D D D D D D Supports SXGA Resolution Output Pixel Rates Up to 112 MHz Digital Visual Interface (DVI) Specification Compliant1 True-Color, 24 Bit/Pixel, 16.7M Colors at 1


    Original     		TFP201, TFP201A SLDS116A TFP201A dvi schematic HSYNC, VSYNC, DE receiver CONTROLLER rx-2 RX-2 -G s tmds receiver 100-PIN TFP201 TFP201APZP TFP201PZP PDF

    TFP403

    Abstract: TFP501
    Text: TFP403 TI PanelBus DIGITAL RECEIVER SLDS125A – DECEMBER 2000 – REVISED OCTOBER 2002 D Supports UXGA Resolution Output Pixel D D D D D D 4x Over-Sampling for Reduced Bit-Error Rates up to 165 MHz Digital Visual Interface (DVI 1.0) Specification Compliant1


    Original     		TFP403 SLDS125A TFP501 TFP403 PDF

    Hsync Vsync separate

    Abstract: No abstract text available
    Text: TFP101, TFP101A TI PanelBus DIGITAL RECEIVER SLDS119B - MARCH 2000 – REVISED JANUARY 2003 D D D D D D D Supports XGA Resolution Output Pixel Rates Up to 86 MHz Digital Visual Interface (DVI) Specification Compliant1 True-Color, 24 Bit/Pixel, 16.7M Colors at 1


    Original     		TFP101, TFP101A SLDS119B Hsync Vsync separate PDF

    TFP201A

    Abstract: TFP201APZP TFP201PZP 100-PIN TFP201 Hsync Vsync decoder HSYNC, VSYNC, DE, input, output
    Text: TFP201, TFP201A TI PanelBus DIGITAL RECEIVER SLDS116A - MARCH 2000 – REVISED JUNE 2000 D D D D D D D Supports SXGA Resolution Output Pixel Rates Up to 112 MHz Digital Visual Interface (DVI) Specification Compliant1 True-Color, 24 Bit/Pixel, 16.7M Colors at 1


    Original     		TFP201, TFP201A SLDS116A TFP201A TFP201APZP TFP201PZP 100-PIN TFP201 Hsync Vsync decoder HSYNC, VSYNC, DE, input, output PDF

    S-PQFP-G100 Package footprint

    Abstract: S-PQFP-G100 Package powerPAD layout RX-2 -G s S-PQFP-G100 Package powerPAD 100-PIN TFP201 TFP201A TFP201APZP TFP201PZP 0.18-um CMOS Flash technology
    Text: TFP201, TFP201A TI PanelBus DIGITAL RECEIVER SLDS116A - MARCH 2000 – REVISED JUNE 2000 D Supports SXGA Resolution D D D D D D Reduced Power Consumption – 1.8 V Core Output Pixel Rates Up to 112 MHz Digital Visual Interface (DVI) Specification Compliant1


    Original     		TFP201, TFP201A SLDS116A TFP201A S-PQFP-G100 Package footprint S-PQFP-G100 Package powerPAD layout RX-2 -G s S-PQFP-G100 Package powerPAD 100-PIN TFP201 TFP201APZP TFP201PZP 0.18-um CMOS Flash technology PDF

    Untitled

    Abstract: No abstract text available
    Text: TFP403 TI PanelBus DIGITAL RECEIVER SLDS125A − DECEMBER 2000 − REVISED OCTOBER 2002 D Supports UXGA Resolution Output Pixel D D D D D D 4x Over-Sampling for Reduced Bit-Error Rates up to 165 MHz Digital Visual Interface (DVI 1.0) Specification Compliant1


    Original     		TFP403 SLDS125A TFP501 PDF

    100-PIN

    Abstract: TFP101 TFP101A TFP101APZP TFP101PZP
    Text: TFP101, TFP101A TI PanelBus DIGITAL RECEIVER SLDS119C - MARCH 2000 − REVISED OCTOBER 2003 D Supports XGA Resolution D D D D D D Reduced Power Consumption − 1.8 V Core Output Pixel Rates Up to 86 MHz Digital Visual Interface (DVI) Specification Compliant1


    Original     		TFP101, TFP101A SLDS119C TFP101A 100-PIN TFP101 TFP101APZP TFP101PZP PDF