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    RV 10L8 Search Results

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    Catalog Datasheet MFG & Type Document Tags PDF

    Untitled

    Abstract: No abstract text available
    Text: FINAL P A L C E 1 6 V 8 AMDÜ COM’L: H-5/7/10/15/25, Q-10/15/25 IND: H-10/15/25, Q-20/25 F a m ily EE CMOS 20-Pin Universal Programmable Array Logic V A N T I AN A M D C O M P A N Y DISTINCTIVE CHARACTERISTICS • Pin and function compatible with all 20-pin


    OCR Scan     		H-5/7/10/15/25, Q-10/15/25 H-10/15/25, Q-20/25 20-Pin 20-pin PAL16R8 PAL10H8 300-mil 16-lead PDF

    Untitled

    Abstract: No abstract text available
    Text: OCT / 2 4 T ^ T 199! T /k S G g S - T H O Œ M Ï M S O Q N * § G A L I 6 V 8 A S E2PR0M CMOS PROGRAMMABLE LOGIC DEVICE • HIGH PERFORMANCE SGS-THOMSON SINGLE-POLY E2PROM CMOS TECHNOLOGY - 10ns maximum propagation delay GAL16V8AS-1 Oxxx) - Fm ax = 62.5MHz


    OCR Scan     		GAL16V8AS-1 115mA PDF

    16v8s

    Abstract: 16V8AS
    Text: SbE ]> • TTSTSB? SCS-THOMSON IIL iM M O Ê S □□'45151 bST ■ SGTH s 6 s HonsON G A L I 6V8A S “ T - H ê - f t - o 7 E2PR0M CMOS PROGRAMMABLE LOGIC DEVICE ■ HIGH PERFORMANCE SGS-THOMSON SINGLE-POLY E2PROM CMOS TECHNOLOGY - 10ns maximum propagation delay


    OCR Scan     		DDH2121 AL16V8AS 115mA Q042134 GAL16V8AS_ GAL16V8AS GAL16V8AS, GAL16V8AS-12HB1 16v8s 16V8AS PDF

    Untitled

    Abstract: No abstract text available
    Text: GA23SV8/GA23S8 High-Perform ance Logic Device Gallium Arsenide gazelle _ G eneral Description Features Gazelle’s GA23SV8/GA23S8 are TTL-compatible high-performance logic sequencers. Based on the fam iliar programmable array logic architecture, they provide highest performance and


    OCR Scan     		GA23SV8/GA23S8 GA23SV8/GA23S8 20-pin GA23SV8 PDF

    Untitled

    Abstract: No abstract text available
    Text: PLDC18G8 I CYPRESS SEMICONDUCTOR • Fast — Commercial: tpo = 12 ns, tc o = 10 ns, t§ = 10 ns — Military/Industrial: tpD = 15 ns, t c o = 12 ns, t§ — 12 ns • Low power Generic architecture to replace stan­ dard logic functions including: 10H8, 1 2 H 6 ,1 4 H 4 ,16H 2,10L 8,12L 6,14L 4,


    OCR Scan     		PLDC18G8 disconnDC18G8Lâ 20-Lead 300-Mil) PLDC18G8Lâ C18G8-12W PDF

    18CV8

    Abstract: No abstract text available
    Text: -> GOULD CHIOSE*PLD Electrically ErasableProgrammableLogic PEEL 18CV8 Features • Synchronous preset, asynchronous clear • Independent output enables Advanced CMOS E2PROM Technology Application Versatility • Replace SSI/MSI logic • Emulates bipolar PAL™, GAL™ and the EPLDS


    OCR Scan     		18CV8 18CV8 PDF

    EP320

    Abstract: altera ep320 EP320-2 program altera ep320 EP320I RAL16L8 EP3201 PAL16LB Eprom, altera, ep320 cx 1213 circuit diagram
    Text: § /à\^ 8 M ACR O CELL EPLD EP320 FEATURES GENERAL DESCRIPTION • User-Configurable replacement for TTL, 74HC and 20 pin PAL Family. The Altera EP320 Erasable Programmable Logic Device may be used as a replacement for T TL and 74HC. It also provides a high speed, low power “plug


    OCR Scan     		10/jA EP320. EP320 altera ep320 EP320-2 program altera ep320 EP320I RAL16L8 EP3201 PAL16LB Eprom, altera, ep320 cx 1213 circuit diagram PDF

    atf16v88

    Abstract: 416rp 16V8AS PAL AM 16v8 AM 16v8
    Text: ATF16V8B Features • Industry Standard Architecture Emulates Many 20-Pin PALs Low Cost Easy-to-Use Software Tools High Speed Electrically Erasable Programmable Logic Devices 7.5 ns Maximum Pin-to-Pin Delay Several Power Saving Options • • Device ATF16V8B


    OCR Scan     		ATF16V8B 20-Pin ATF16V8B ATF16V8BQ ATF16 -10JC ATF16V8BQ-1OPC ATF16V8BQ-10SC atf16v88 416rp 16V8AS PAL AM 16v8 AM 16v8 PDF

    Untitled

    Abstract: No abstract text available
    Text: l ^ = • INC. PEEL 16V8 Data Sheet October 1994 4Ô4G7Q7 00014b5 ^50 ■ [ [U Advanced Designation The "Advanced” designation on an ICT data sheet indicates that the product is not yet ready for release. The specifications are subject to change, are based on design goals or preliminary part evaluation, and


    OCR Scan     		00014b5 EEL22CV10A PEEL22V10AZ D0D147b PEEL16V8 PEEL20CG10A 16V8s 20-pin 24-pin 22V10s, PDF

    Untitled

    Abstract: No abstract text available
    Text: PEEL 16V8 -5/-7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Features Low Power and Quarter Power Versions — Low Power: 75mA typical Ice — Quarter Power: 45mA typical Icc • Compatible with Popular 16V8 Devices — 16V8 socket and function compatible


    OCR Scan     		20-pin 28-Pin 0G01bfi 40-Pin 0001bf PDF

    Untitled

    Abstract: No abstract text available
    Text: •■■ ■■■ Lattice FEATURES GAL16V8C High Performance E2CMOS PLD Generic Array Logic FUNCTIONAL BLOCK DIAGRAM • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 5 ns Maxim um Propagation Delay — Fmax = 1 6 6 MHz — 4 ns Maxim um from Clock Input to Data Output


    OCR Scan     		GAL16V8C 100ms) PDF

    Untitled

    Abstract: No abstract text available
    Text: / = 7 SGS-THOMSON G AL16V8S KiiD ^ S iL[i©Tr (S)[MD(gi E2PR0M CMOS PROGRAMMABLE LOGIC DEVICE • HIGH PERFORMANCE SGS-THOMSON SINGLE-POLY E2PROM CMOS TECHNOLOGY - 15ns maximum propagation delay (GAL16V8S-15Exx) - Fmax = 50MHz - 12ns max. from clock input to data output


    OCR Scan     		AL16V8S GAL16V8S-15Exx) 50MHz PDF

    EP330-12CN

    Abstract: EP330 EP330-15CN EP330-15C EP330-15 EP330-15CFN
    Text: C D f« C C D IC C HIGH-PERFORMANCE 8-MACROCELL ONE-TIME PROGRAMMABLE LOGIC DEVICES _ SRES002A - D3374, OCTOBER 1 9 8 9 - REVISED SEPTEMBER 1992 N PACKAGE Programmable Replacement for Conventional TTL, 74HC, and 20-Pin PLD Family TOP VIEW) High-Voltage EPIC Process Allows for


    OCR Scan     		SRES002A D3374, 20-Pin EP330 EP330-12CN EP330-15CN EP330-15C EP330-15 EP330-15CFN PDF

    P16V8

    Abstract: F16V P320S eZI3
    Text: Features Industry Standard Architecture - Emulates Many 20-Pin PALs - Low Cost Easy-to-Use Software Tools High-Speed Electrically Erasable Programmable Logic Devices - 7.5 ns Maximum Pin-to-Pin Delay Several Power Saving Options Device lcc, Stand-By lcc, Active


    OCR Scan     		20-Pin ATF16V8B ATF16V8BQ ATF16V8BQL 0364F-- 12/98/xM P16V8 F16V P320S eZI3 PDF

    18p8

    Abstract: 18v8 23S8
    Text: _ * Gl GA23SV8/GA23S8 gazelle H ig h -P erfo rm an ce L o g ic D e v ice G alliu m A rse n id e _ G e n e ra l D e scrip tio n G azelle’s GA23SV8/GA23S8 are TTL-compatible high-perform­ ance logic sequencers. Based on the fam iliar programmable


    OCR Scan     		GA23SV8/GA23S8 20-pin GA23SV8 18p8 18v8 23S8 PDF

    P320S

    Abstract: F16V8BQ 16v8b pld program 16R8
    Text: Features * Industry Standard Architecture - Emulates Many 20-pin PALs - Low-cost Easy-to-use Software Tools * High-speed Electrically-erasable Programmable Logic Devices - 7.5 ns Maximum Pin-to-pin Delay * Several Power Saving Options Device lcc, Standby


    OCR Scan     		20-pin ATF16V8B ATF16V8BQ ATF16V8BQL 0364G -04/99/X P320S F16V8BQ 16v8b pld program 16R8 PDF

    similar ic book

    Abstract: No abstract text available
    Text: LATTICE SE MICONDUCTOR böE D Bi SBÖbTHT ÜGG5753 S5T « L A T Lattice G A L16V8Z G A L16V8ZD Zero Power E2CMOS PLD FUNCTIONAL BLOCK DIAGRAM FEATURES • ZERO POWER E’ CMOS TECHNOLOGY — 100|iA Standby Current — Input Transition Detection on GAL16V8Z


    OCR Scan     		GG5753 L16V8Z L16V8ZD GAL16V8Z GAL16V8ZD 10MHz) similar ic book PDF

    G16V8A

    Abstract: 0425E 16v8 PLD
    Text: Features Industry Standard Architecture - Emulates Many 20-Pin PALs - Low Cost Easy-to-Use Software Tools High-Speed Electrically-Erasable Programmable Logic Devices - 5 ns Maximum Pin-to-Pin Delay Low Power -10 0 pA Pin-Controlled Power Down Mode Option


    OCR Scan     		20-Pin ATF16V8C G16V8A 0425E 16v8 PLD PDF

    Untitled

    Abstract: No abstract text available
    Text: GAL16V8Z GAL16V8ZD •ill a ttire :LdlllUC ■■■■■■ Corporation Zero Power E2CMOS PLD FUNCTIONAL BLOCK DIAGRAM FEATURES • ZERO POWER E2CMOS TECHNOLOGY — 100|iA Standby Current — Input Transition Detection on GAL16V8Z — Dedicated Power-down Pin on GAL16V8ZD


    OCR Scan     		GAL16V GAL16V8Z GAL16V8ZD 100ms) 10MHz) PDF

    altera ep320

    Abstract: pal,16l8 EP320I EP320 16RP8 program altera ep320 T1733
    Text: /Â \^ 8 MACROCELL EPLD FEATURES GENERAL DESCRIPTION • U ser-C onfigurable replacem ent fo r TTL, 74HC and 20 pin PAL Family. The Altera EP320 Erasable Program m able Logic Device m ay be used as a replacem ent fo r T TL and 74HC. It also provides a high speed, low pow er “plug


    OCR Scan     		EP320 10/vA EP320. altera ep320 pal,16l8 EP320I EP320 16RP8 program altera ep320 T1733 PDF

    Untitled

    Abstract: No abstract text available
    Text: GAL16V8Z GAL16V8ZD Lattice Zero Power E2CMOS PLD FEATURES FU N C TIO N AL B LO C K D IAG R AM • ZER O PO W ER E2C M O S TEC H N O LO G Y — 100|jA Standby Current — Input Transition Detection on G AL16V8Z — Dedicated Pow er-dow n Pin on G AL16V8ZD — Input and Output Latching During Pow er Down


    OCR Scan     		GAL16V8Z GAL16V8ZD AL16V8Z AL16V8ZD 10MHz) PDF

    GAL16V8 25lp

    Abstract: 10-32 UNF TL 1074 CT 16l8 JEDEC fuse l16V L16V8D-7 IC gal16v8 GAL16V8D-15U gal16v8
    Text: Lattica GAL16V8 High Performance E2CMOS PLD Generic Array Logic !Semiconductor Corporation Features Functional Block Diagram • HIGH PERFORMANCE E2CMOS* TECHNOLOGY — 3.5 ns Maximum Propagation Delay — Fmax =250 MHz — 3.0 ns Maximum from Clock Input to Data Output


    OCR Scan     		GAL16V8 Tested/100% 100ms) GAL16V8 25lp 10-32 UNF TL 1074 CT 16l8 JEDEC fuse l16V L16V8D-7 IC gal16v8 GAL16V8D-15U gal16v8 PDF

    14L4

    Abstract: PALCE16
    Text: COM’L: -15/25 AMDB IND: -12/15/25 PALCE16V8Z FAMILY Zero-Power 20-Pin EE CMOS Universal Programmable Array Logic V A M T I S DISTINCTIVE CHARACTERISTICS • Zero-Power CMOS technology — 15-nA Standby Current -15/25 — 30-nA Standby Current (-12) — 12-ns propagation delay for “-12” version


    OCR Scan     		PALCE16V8Z 20-Pin 15-nA 30-nA 12-ns 15-ns PAL16R8 PAL10H8 14L4 PALCE16 PDF

    gal 16v8 programming algorithm

    Abstract: gal programming algorithm GAL programming Guide GAL16V8QS TAT 2159 opal 16V8A 16V8Q 16V8QS gal programming specification
    Text: Semiconductor GAL16V8QS-10L, -15L 20-Pin 0.8jli EEC M O S PLD s General Description Features Th e EECM OS G AL16V8Q S devices are fabricated using N ational’s CS80BEV 0.8|u. E lectrically Erasable C M O S pro­ cess. This advanced process m akes N ational’s


    OCR Scan     		GAL16V8QS-10L, 20-Pin GAL16V8QS CS80BEV Cep-01451, gal 16v8 programming algorithm gal programming algorithm GAL programming Guide TAT 2159 opal 16V8A 16V8Q 16V8QS gal programming specification PDF