ROHC Search Results

transistor marking WC 2C

Abstract: E22/6/AS7620/TMS320C6678/AS7620/NZT6728-datasheet
Contextual Info: TMS320C6678 SPRS691E—November 2010—Revised March 2014 Multicore Fixed and Floating-Point Digital Signal Processor Check for Evaluation Modules EVM : TMS320C6678 1 TMS320C6678 Features and Description 1.1 Features • Eight TMS320C66x DSP Core Subsystems (C66x

Contextual Info: 66AK2E05, 66AK2E02 SPRS865B—June 2013—Revised January 2014 Multicore DSP+ARM KeyStone II System-on-Chip SoC 1 66AK2E05/02 Features and Description • ARM Cortex -A15 MPCore™ CorePac – Up to Four ARM Cortex-A15 Processor Cores at up to 1.4-GHz

er36 transformer

Contextual Info: S TANDARD PRO DUCT PM PMC-Sierra, inc. PM 7345 S/UNI-PDH ISSUE 5 SATURN User Network Interface forPD H PM7345 S/UNI- fTM PDH S/UNI-PDH S A T U R N U s e r N e t w o r k I n t e r f a c e for A T M P l e s i o c h r o n o u s Di gi t al H i e r a r c h y Pre lim ina ry

TMS320C6678ACYP

Abstract: TMS320C6678CYP TMS320C6678XCYP TMS320C6678CYPA TMS320C6678XCYPA
Contextual Info: TMS320C6678 Multicore Fixed and Floating-Point Digital Signal Processor Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not

Contextual Info: AM5K2E04, AM5K2E02 SPRS864B—June 2013—Revised January 2014 Multicore ARM KeyStone II System-on-Chip SoC 1 AM5K2E04/02 Features and Description • ARM Cortex -A15 MPCore™ CorePac – Up to Four ARM Cortex-A15 Processor Cores at up to 1.4-GHz – 4MB L2 Cache Memory Shared by all Cortex-A15

Contextual Info: AM5K2E04, AM5K2E02 SPRS864B—June 2013—Revised January 2014 Multicore ARM KeyStone II System-on-Chip SoC 1 AM5K2E04/02 Features and Description • ARM Cortex -A15 MPCore™ CorePac – Up to Four ARM Cortex-A15 Processor Cores at up to 1.4-GHz – 4MB L2 Cache Memory Shared by all Cortex-A15

TMS320TCI6608

Abstract: SPRS623A SPRS623B
Contextual Info: TMS320TCI6608 Multicore Fixed and Floating-Point Digital Signal Processor Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not

SPRS836D

Contextual Info: TCI6638K2K SPRS836D—February 2012—Revised October 2013 Multicore DSP+ARM KeyStone II System-on-Chip SoC 1 TCI6638K2K Features and Description 1.1 Features • Eight TMS320C66x DSP Core Subsystems (C66x CorePacs), Each With – 1.0 GHz or 1.2 GHz C66x Fixed/Floating-Point DSP Core

Contextual Info: AM5K2E04/02 Multicore ARM KeyStone II System-on-Chip SoC Data Manual PRODUCT PREVIEW information applies to products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products

Contextual Info: 66AK2H12/06 Multicore DSP+ARM KeyStone II System-on-Chip SoC Data Manual PRODUCT PREVIEW information applies to products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products

drca

Abstract: vhdl code for a 16*2 lcd HP3070 PM7346 SBGA256 G4 BC 30 B0278
Contextual Info: BSDL SOURCE CODE - PMC_Sierra_Cells for PMC - Sierra revision : VHDL Package and Package Body 1.0 created by : James Lamond Hewlett Packard Canada Ltd date : 20 December 1995 package PMC_Sierra_Cells is use STD_1149_1_1990.all; constant cele0 : CELL_INFO;

Contextual Info: PM7347 S/UNI-JET PRELIMINARY DATA SHEET PMC-990267 ISSUE 1 SATURN USER NETWORK INTERFACE FOR J2, E3, T3 PM7347 TM S/UNI JET S/UNI-JET SATURN USER NETWORK INTERFACE FOR J2/E3/T3 DATA SHEET ISSUE 1: APRIL 1999 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Contextual Info: PRODUCT BRIEF DS3177 DS3/E3 Single-Chip Transceiver FEATURES GENERAL DESCRIPTION The DS3177 combines a DS3/E3 framer and an LIU single-chip transceiver to interface to a DS3/E3 physical copper line. • •  APPLICATIONS  Routers and Switches Multiservice Access

ty 612

Abstract: PJ 3139
Contextual Info: PMC-Sierra, Inc. ADVANCE PM5313 SPECTRA-622 DATA SHEET PMC-981162 ISSUE 2 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER FOR 622 MBIT/S PM5313 SPECTRA-622 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER FOR 622 MBIT/S DATA SHEET PROPRIETARY AND CONFIDENTIAL ADVANCE ISSUE 2: MAY 1999

100-PIN

Abstract: 78P7200 84-PIN PM4341 PM6341 PM7345
Contextual Info: PM7345 S/UNI-PDH DATA SHEET PMC-931011 ISSUE 6 SATURN USER-NETWORK INTERFACE PM7345 TM S/UNI- PDH S/UNI-PDH SATURN USER-NETWORK INTERFACE FOR ATM PLESIOCHRONOUS DIGITAL HIERARCHY DATACOM DATA SHEET ISSUE 6: JUNE 1998 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

SI 1150H

Abstract: xnxx 1155H 16 x E1 G.703 MP 9720 ds yt 1208 diode 1N311
Contextual Info: PM5313 SPECTRA-622 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER FOR 622 MBIT/S DATA SHEET PRELIMINARY ISSUE 3: OCTOBER 1999 Proprietary and Confidential to PMC-Sierra Inc., and for its Customers’ Internal Use REVISION HISTORY Issue No. Issue Date Details of Change

1N07

Abstract: relay cross reference z570 1062H
Contextual Info: PMC-Sierra, Inc. PRELIMINARY PM5313 SPECTRA-622 DATA SHEET PMC-1981162 ISSUE 4 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER FOR 622 MBIT/S PM5313 SPECTRA-622 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER FOR 622 MBIT/S DATA SHEET PRELIMINARY ISSUE 4: FEBRUARY 2000 Proprietary and Confidential to PMC-Sierra Inc., and for its Customers’ Internal Use

en1 3009

Abstract: 56KQ MQFP-F256 EM 222 raft pd TSC695F uart example used in k60 l17h 2360D
Contextual Info: INTEGRATED CIRCUITS, SILICON MONOLITHIC, 32-BIT SPARC EMBEDDED PROCESSOR, BASED ON TYPE TSC695F ESCC Detail Specification No. 9512/003 ISSUE 1 February 2004 esa = 11 ss = -i- 1 1 1 iis = a ii: a Document Custodian: European Space Agency - see https://escies.org

Contextual Info: T3 Framer MegaCore Function—Implementing Loopback Functions May 2001, ver. 1.00 Introduction Application Note This application note documents the external implementation of loopback functions in a T3 Framer MegaCore Function T3FRM . It covers diagnostic loopback, line loopback, and payload loopback.

SPRS691C

Contextual Info: TMS320C6678 Multicore Fixed and Floating-Point Digital Signal Processor Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not

JR 608H

Abstract: BEE 7CA atm8 deb hex nv AG75
Contextual Info: DATASHEET PM PMC-960835 ISSUE 4 PRELIMINARY PMC-Sierra, Inc. PM7346 s / u n i - q j e t SA TURN QUAD USER NETWORK INTERFA CE FOR J2, E3, T3 PM7346 S/UNI“ QJET S/UNI-QJET SATURN QUAD USER NETWORK INTERFACE FOR J2/E3/T3 DATA SHEET PRELIMINARY ISSUE 4: JANUARY 1998

free verilog code of prbs pattern generator

Abstract: CRC-16 GR-499-CORE HDLC verilog code prbs generator using vhdl digital alarm clock vhdl code in modelsim verilog code of prbs pattern generator vhdl code for 16 bit Pseudorandom Streams Generation
Contextual Info: T3 Framer MegaCore Function T3FRM August 2001 User Guide 101 Innovation Drive San Jose, CA 95134 408 544-7000 http://www.altera.com A-UG-IPT3FRM-1.02 T3 Framer MegaCore Function (T3FRM) User Guide Copyright 2001 Altera Corporation. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device

CP155

Abstract: GR-499-CORE PP155 multiplexing t1 frame to t3 frame
Contextual Info: T3 Framer MegaCore Function T3FRM August 2001; ver. 1.02 Data Sheet Achieving optimum performance in the Altera APEXTM 20K device architecture, the multi-featured T3 Framer MegaCore® Function (T3FRM) meets your innovative design needs, and provides fast time-to-market

IDT82V8313

Abstract: MX12 MX23 mux E1
Contextual Info: 3.3 VOLT M13 MULTIPLEXER IDT82V8313 Version 6 September 25, 2009 6024 Silver Creek Valley Road, San Jose, CA 95138 Telephone: 800 345-7015 • TWX: 910-338-2070 • FAX: (408) 284-2775 Printed in U.S.A. 2009 Integrated Device Technology, Inc DISCLAIMER