XC7K410TFFG900-1
Abstract: the RMII Consortium Specification UG814 XC7K410TFFG900 XC6SLX45T-FGG484-2 XC7K410T-FFG900 UG81 ff676 RMII Specification RMII Consortium
Text: a LogiCORE IP MII to RMII v1.01.a DS476 July 25, 2012 Product Specification Introduction LogiCORE IP Facts Table The Xilinx LogiCORE IP Media Independent Interface (MII) to Reduced Media Independent (RMII) design provides the RMII between RMII-compliant
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DS476
XC7K410TFFG900-1
the RMII Consortium Specification
UG814
XC7K410TFFG900
XC6SLX45T-FGG484-2
XC7K410T-FFG900
UG81
ff676
RMII Specification
RMII Consortium
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the RMII Consortium Specification
Abstract: 25MHz-MII RMII PHY DP83640 AN-1405 IEEE-1588 AN1794 RMII Consortium AN-1730
Text: Using RMII Master Mode Using RMII Master Mode National Semiconductor Application Note 1794 Ben Buchanan March 11, 2008 1.0 Introduction National Semiconductor’s PHYTER family of products incorporate the Reduced Media Independent Interface RMII as described in the RMII revision 1.2 specification from the
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AN-1794
the RMII Consortium Specification
25MHz-MII
RMII PHY
DP83640
AN-1405
IEEE-1588
AN1794
RMII Consortium
AN-1730
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RMII PHY
Abstract: 59014 alcatel 1603 rMII verilog 59014 transistor RMII Specification
Text: Inventra Soft Core RTL IP PE-RMII RMII I/F for PE-MACMII™ 10/100 Ethernet MAC Tx Data Tx Data PEMCS Tx Status PETFUN RMII Reduced MII Interface Module Rx Data Rx Status Control PECLKRST RMII PHY Tx Control T A S H E E T PEMIIM • Works with Alcatel PE-MACMII
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10/100Mbps
50MHz
PD-59014
001-FO
RMII PHY
59014
alcatel 1603
rMII verilog
59014 transistor
RMII Specification
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the RMII Consortium Specification
Abstract: RMII PHY UCF virtex-4 ethernet xilinx vhdl RMII Consortium
Text: MII to RMII v1.00b DS476 April 24, 2009 Product Specification Introduction LogiCORE IP Facts The MII_to_RMII design described in this document provides the Reduced Media Independent Interface between RMII compliant ethernet physical media devices (PHY) and Xilinx 10/100 Mb/s ethernet cores
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DS476
the RMII Consortium Specification
RMII PHY
UCF virtex-4
ethernet xilinx vhdl
RMII Consortium
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Untitled
Abstract: No abstract text available
Text: September 26, 1997 Reduced MII interface Sponsored By: N 1.0 Overview and Architecture This document specifies a low pin count Reduced Media Independent Interface (RMII) intended for use between Ethernet PHYs and Switch or Repeater ASICs. Under IEEE 802.3u [2] an MII comprised of 16 pins for data and control is defined. In devices
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100BASE-T.
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"network interface cards"
Abstract: No abstract text available
Text: Network interface features o Supports 10/100Mb/s data transfer rates MAC Ethernet Media Access Controller Core o Media Independent Interface MII o Optional Reduced Media In- dependent Interface (RMII) Data link layer functionality o Meets the IEEE 802.3
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10/100Mb/s
"network interface cards"
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"network interface cards"
Abstract: No abstract text available
Text: Network interface features o Supports 10/100Mb/s data transfer rates MAC Ethernet Media Access Controller Megafunction o Media Independent Interface MII o Optional Reduced Media In- dependent Interface (RMII) Data link layer functionality o Meets the IEEE 802.3
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10/100Mb/s
"network interface cards"
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tsmc
Abstract: "network interface cards"
Text: Network interface features o Supports 10/100Mb/s data transfer rates MAC Ethernet Media Access Controller Core o Media Independent Interface MII o Optional Reduced Media In- dependent Interface (RMII) Data link layer functionality o Meets the IEEE 802.3
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10/100Mb/s
tsmc
"network interface cards"
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En1522
Abstract: RMII12 "filtering database" RMII PHY uplink DMA13 MTD516 REG14 RXD11 RMII Specification revision 1.2
Text: MYSON TECHNOLOGY MTD516 Preliminary 16 Port 10M/100M Ethernet Switch FEATURES GENERAL DESCRIPTION • IEEE802.3 and IEEE802.3u compliant. • Provide 16 RMII (Reduced Media Independent Interface) ports. • Programmable 1K/8K MAC addresses filtering database.
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MTD516
10M/100M
IEEE802
pressure/802
83MHz
MTD516
En1522
RMII12
"filtering database"
RMII PHY
uplink
DMA13
REG14
RXD11
RMII Specification revision 1.2
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fifo buffer ram 512 byte
Abstract: RTL code for ethernet DESIGN AND IMPLEMENTATION OF SYNCHRONOUS FIFO
Text: Network interface features MAC 10/100 Ethernet Media Access Controller Core Supports 10/100Mb/s data transfer rates Media Independent Interface MII Optional Reduced Media Independent Interface (RMII) Data link layer functionality Meets the IEEE 802.3
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10/100Mb/s
fifo buffer ram 512 byte
RTL code for ethernet
DESIGN AND IMPLEMENTATION OF SYNCHRONOUS FIFO
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Am97C973
Abstract: ANSI X3.263-1995 100BASE-FX AM79C100 layout rj45 Magnetics
Text: PRELIMINARY Am79C875 NetPHY -4LP Low Power Quad 10/100-TX/FX Ethernet Transceiver DISTINCTIVE CHARACTERISTICS n Four 10/100BASE-TX Ethernet PHY transceivers n Supports RMII Reduced MII interface n Automatic Polarity Detection during AutoNegotiation and 10BASE-T signal reception
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Am79C875
10/100-TX/FX
10/100BASE-TX
10BASE-T
100BASE-FX
Am97C973
ANSI X3.263-1995
AM79C100 layout
rj45 Magnetics
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afdx
Abstract: R8051XC macl
Text: Network interface features o Supports 10/100Mb/s data transfer rates MAC-L 10/100 Ethernet Media Access Controller Lite Megafunction o Media Independent Interface MII o Optional Reduced Media In- dependent Interface (RMII) o Optional Serial MII interface
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10/100Mb/s
R8051XC-MAC-L-HA
R8051XC
afdx
macl
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3s500e-5
Abstract: "network interface cards"
Text: Network interface features o Supports 10/100Mb/s data transfer rates MAC Ethernet Media Access Controller Core o Media Independent Interface MII o Optional Reduced Media In- dependent Interface (RMII) Data link layer functionality o Meets the IEEE 802.3
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10/100Mb/s
3s500e-5
"network interface cards"
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Kendin KS8721B
Abstract: NRZ clock recovery KS8721B Mlt-3
Text: KS8721B Product Brief Revision 1.0 KS8721B – Low Power 10/100 PHY Transceiver Introduction • Fully compliant to IEEE 802.3u standard • Supports Media Independent Interface MII and Reduced MII (RMII) • Supports 10BaseT, 100BaseTX and 100Base-FX with Far_End_Fault
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KS8721B
KS8721B
10BaseT,
100BaseTX
100Base-FX
10/100Mbps
10BaseT
CA94085
Kendin KS8721B
NRZ clock recovery
Mlt-3
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nrzi circuit diagram MLT-3
Abstract: Am97C973 ANSI X3.263-1995 ansi x3.263-1995 Throughput 100BASE-FX
Text: PRELIMINARY Am79C875 NetPHY -4LP Low Power Quad 10/100-TX/FX Ethernet Transceiver DISTINCTIVE CHARACTERISTICS • Four 10/100BASE-TX Ethernet PHY transceivers ■ Supports RMII Reduced MII interface ■ Automatic Polarity Detection during AutoNegotiation and 10BASE-T signal reception
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Am79C875
10/100-TX/FX
10/100BASE-TX
10BASE-T
100BASE-FX
nrzi circuit diagram MLT-3
Am97C973
ANSI X3.263-1995
ansi x3.263-1995 Throughput
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AM7992
Abstract: No abstract text available
Text: PRELIMINARY Am79C875 NetPHY -4LP Low Power Quad 10/100-TX/FX Ethernet Transceiver DISTINCTIVE CHARACTERISTICS n Four 10/100BASE-TX Ethernet PHY transceivers n Supports RMII Reduced MII interface n Automatic Polarity Detection during AutoNegotiation and 10BASE-T signal reception
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Am79C875
10/100-TX/FX
10/100BASE-TX
10BASE-T
100BASE-FX
100BASE-TX,
100BASE-FX,
AM7992
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afdx
Abstract: No abstract text available
Text: Network interface features MAC-L 10/100 Ethernet Media Access Controller Lite Core Supports 10/100Mb/s data transfer rates Media Independent Interface MII o Optional Reduced Media In- dependent Interface (RMII) Optional Serial MII interface instead of standard (SMII)
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10/100Mb/s
afdx
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dual port fifo design code
Abstract: RTL code for ethernet R8051XC "network interface cards"
Text: Network interface features o Supports 10/100Mb/s data transfer rates MAC-L 10/100 Ethernet Media Access Controller Lite Core o Media Independent Interface MII o Optional Reduced Media In- dependent Interface (RMII) o Optional Serial MII interface instead of standard (SMII)
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10/100Mb/s
R8051XC-MAC-L-HA
R8051XC
dual port fifo design code
RTL code for ethernet
"network interface cards"
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ANSI X3.263-1995 standard
Abstract: ANSI X3.263-1995 ANSI X3.263-1995 tests MDIO clause 22 simple circuit diagram of electronic choke RF REMOTE CONTROLLER 1/3 phase common mode choke 2 port 10/100 ethernet PHY transceiver RMII AM79C874 design 100BASE-FX
Text: PRELIMINARY Am79C875 NetPHY -4LP Low Power Quad 10/100-TX/FX Ethernet Transceiver DISTINCTIVE CHARACTERISTICS n Four 10/100BASE-TX Ethernet PHY transceivers n Next Page register support n Supports RMII Reduced MII interface and Shared MII interface for 100 Mbps repeater
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Am79C875
10/100-TX/FX
10/100BASE-TX
10BASE-T
ANSI X3.263-1995 standard
ANSI X3.263-1995
ANSI X3.263-1995 tests
MDIO clause 22
simple circuit diagram of electronic choke
RF REMOTE CONTROLLER
1/3 phase common mode choke
2 port 10/100 ethernet PHY transceiver RMII
AM79C874 design
100BASE-FX
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afdx
Abstract: R8051XC
Text: Network interface features o Supports 10/100Mb/s data transfer rates MAC-L 10/100 Ethernet Media Access Controller Lite Core o Media Independent Interface MII o Optional Reduced Media In- dependent Interface (RMII) o Optional Serial MII interface instead of standard (SMII)
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R8051XC-MAC-L-HA
R8051XC
afdx
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"filtering database"
Abstract: 921 T34 IEEE802-3 MTD655 IEEE802.3 Clause 45
Text: MYSON TECHNOLOGY MTD655 5 Port 10M/100M Hub With 2 port Switch FEATURES GENERAL DESCRIPTION • IEEE802.3 Clause 9 and IEEE802.3u Cluse 27 compliant. • Provide 4 RMII Reduced Media Independent Interface ports and 1 MII port. • Provide 2 inter_repeater stacking bus for 10M
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MTD655
10M/100M
IEEE802
100FX
100FD
MTD655
"filtering database"
921 T34
IEEE802-3
IEEE802.3 Clause 45
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clause 22 phy registers
Abstract: "filtering database" MTD658
Text: MYSON TECHNOLOGY MTD658 8 Port 10M/100M Hub With 2 port Switch FEATURES GENERAL DESCRIPTION • IEEE802.3 Clause 9 and IEEE802.3u Cluse 27 compliant. • Provide 8 RMII Reduced Media Independent Interface ports. • Provide 2 inter_repeater stacking bus for 10M
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MTD658
10M/100M
IEEE802
100FX
100FD
MTD658
clause 22 phy registers
"filtering database"
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TXD70
Abstract: RMII PHY MTD508
Text: MYSON TECHNOLOGY MTD508 Preliminary 8 Port 10M/100M Ethernet Switch FEATURES GENERAL DESCRIPTION • IEEE802.3 and IEEE802.3u compliant. • Provide 8 RMII (Reduced Media Independent Interface) ports. • Programmable 1K/8K MAC addresses filtering. • Store and forward switching function and bad
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MTD508
10M/100M
IEEE802
pressure/802
75MHz
MTD508
TXD70
RMII PHY
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MII IEEE802.3u
Abstract: "filtering database" MTD655 MDIO clause 22 clause 22 phy registers
Text: MYSON TECHNOLOGY MTD655 Preliminary 5 Port 10M/100M Hub With 2 port Switch FEATURES GENERAL DESCRIPTION • IEEE802.3 Clause 9 and IEEE802.3u Cluse 27 compliant. • Provide 4 RMII (Reduced Media Independent Interface) ports and 1 MII port. • Provide 2 inter_repeater stacking bus for 10M
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MTD655
10M/100M
IEEE802
100FX
100FD
MTD655
MII IEEE802.3u
"filtering database"
MDIO clause 22
clause 22 phy registers
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