MA17
Abstract: MA18 MX98728EC Macronix marking GMAC
Text: MX98728EC 1.0 Features GMAC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER FOR GENERIC APPLICATION • 1.6KB TX FIFO to support maximum network throughput in the full duplex mode • 16/8 bits SRAM interface of the packet buffer supporting burst DMA for on-chip FIFOs
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MX98728EC
C9930
TA777001
38BAX
MA17
MA18
MX98728EC
Macronix marking
GMAC
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PDF
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GFP 73 A
Abstract: MPC860 RDB AU-AIS tt 2194 AT24C04 CRC-32 GR-253-CORE HDMP-3001 MPC860 NM24C02U
Text: Agilent HDMP-3001 Ethernet over SONET Mapper IC Device Specification Data Sheet Table of Contents 1. Introduction . 5 1.1 Internal Functional Blocks . 5
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HDMP-3001
HDMP-3001
5988-3853EN
GFP 73 A
MPC860 RDB
AU-AIS
tt 2194
AT24C04
CRC-32
GR-253-CORE
MPC860
NM24C02U
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PDF
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LTC3546
Abstract: ltc3546 layout
Text: LTC3546 Dual Synchronous, 3A/1A or 2A/2A Configurable Step-Down DC/DC Regulator Features Description VIN Range: 2.25V to 5.5V VOUT Range: 0.6V to 5V n Programmable Frequency Operation; 2.25MHz, or Adjustable Between 0.75MHz to 4MHz n Low R DS ON Internal Switches
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LTC3546
25MHz,
75MHz
28-Lead
MS10E,
DFN-10
QFN-20
3546fc
com/3546
ltc3546 layout
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PDF
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63D12
Abstract: No abstract text available
Text: Advanced Information NPC401QFA-100 SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER FOR GENERIC APPLICATION 1.0 Features • 32 bits general purpose asynchronous bus architecture up to 33Mhz for easy system application • Single chip solution integrating 10/100 TP transceiver to reduce overall cost
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NPC401QFA-100
33Mhz
NPC401QFA-100-01
63D12
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Automatic Gain Control AGC Algorithm Users
Abstract: AIC28 TSC2100 AIC32 AIC26 TLV320AIC26 TLV320AIC33 TSC2101 "saturation flag"
Text: Application Report SLAA260 – September 2005 The Built-In AGC Function in TSC2100/01 and TLV320AIC26/28/32/33 Devices Wendy Fang and Nitesh Kekre . DAP Group ABSTRACT
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SLAA260
TSC2100/01
TLV320AIC26/28/32/33
TLV320AIC26/28/32/33
Automatic Gain Control AGC Algorithm Users
AIC28
TSC2100
AIC32
AIC26
TLV320AIC26
TLV320AIC33
TSC2101
"saturation flag"
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PDF
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h1632
Abstract: Macronix marking ds130 diode MAR7 MA17 MA18 MX98728EC Long teim timer 4D70 LTPS
Text: MX98728EC 1.0 Features GMAC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER FOR GENERIC APPLICATION • 1.6KB TX FIFO to support maximum network throughput in the full duplex mode • 16/8 bits SRAM interface of the packet buffer supporting burst DMA for on-chip FIFOs
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MX98728EC
C9930
TA777001
38BAX
h1632
Macronix marking
ds130 diode
MAR7
MA17
MA18
MX98728EC
Long teim timer
4D70
LTPS
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PDF
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MMA7660FC
Abstract: Calibration Technique for Accelerometers AN344 AN3841 AN3447 MMA7660
Text: Freescale Semiconductor Application Note AN3841 Rev 2, 9/2009 Performing Offset Calibration using the MMA7660FC by: Laura Salhuana and Fengchao Zhang ACRONYMS PMP: Portable Media Player PDA: Personal Digital Assistant ABSTRACT Offset calibration is very important for applications such as tilt for gaming and hand gesturing on mobile phones/PMP/PDA
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AN3841
MMA7660FC
MMA7660FC
AN3447,
Calibration Technique for Accelerometers
AN344
AN3841
AN3447
MMA7660
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PDF
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MPC860 RDB
Abstract: AU-AIS AT24C04 CRC-32 GR-253-CORE HDMP-3001 MPC860 PCF8594C-2
Text: Agilent HDMP-3001 Ethernet over SONET Mapper IC Device Specification Data Sheet Table of Contents 1. Introduction . 5 1.1 Internal Functional Blocks . 5
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HDMP-3001
HDMP-3001
5988-3853EN
5988-8632EN
MPC860 RDB
AU-AIS
AT24C04
CRC-32
GR-253-CORE
MPC860
PCF8594C-2
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PDF
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amd RADEON igp
Abstract: amd RADEON igp 1010 amd sb600 ATI Radeon Xpress 200 RADEON IGP amd athlon II x2 270 amd athlon II x2 240 RADEON IGP 216 AMD turion 64 X2 amd RADEON
Text: AMD SB600 Register Reference Manual Public Version Technical Reference Manual Rev. 3.03 P/N: 46155_sb600_rrg_pub_3.03 2008 Advanced Micro Devices, Inc. Trademarks AMD, the AMD Arrow logo, Athlon, and combinations thereof, ATI, ATI logo, Radeon, and Crossfire are trademarks of Advanced Micro Devices, Inc.
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SB600
reg0x48,
reg0x48
amd RADEON igp
amd RADEON igp 1010
amd sb600
ATI Radeon Xpress 200
RADEON IGP
amd athlon II x2 270
amd athlon II x2 240
RADEON IGP 216
AMD turion 64 X2
amd RADEON
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PDF
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Untitled
Abstract: No abstract text available
Text: ADVANCED INFORMATION MX98728 1.0 Features GMAC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER FOR GENERIC APPLICATION • 1.6KB TX FIFO to support maximum network throughput in the full duplex mode • 16/8 bits SRAM interface of the packet buffer supporting burst DMA for on-chip FIFOs
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MX98728
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Untitled
Abstract: No abstract text available
Text: MX98728AEC 1.0 Features GMAC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER FOR GENERIC APPLICATION • 1.6KB TX FIFO to support maximum network throughput in the full duplex mode • 16/8 bits SRAM interface of the packet buffer supporting burst DMA for on-chip FIFOs
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MX98728AEC
C9930
TA777001
38BAX
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PDF
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RXD015
Abstract: No abstract text available
Text: PRELIMINARY MX98217EC 16-port Dual-Speed Ethernet Switch Controller FEATURES z z z z z z z z z Single chip 16-port 10/100M wire speed Ethernet switching controller with all memory embedded Integration of 16-port dual speed, full/half duplex capable Media Access Controllers MACs with RMII
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MX98217EC
16-port
10/100M
CoC0013
F40044937B1
46AAX
MX98217EC
PM0781
RXD015
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