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Contextual Info: Data Sheet HD74LV1G126A R04DS0026EJ0800 Rev.8.00 Jan 10, 2014 Bus Buffer Gate with 3–state Output Description The HD74LV1G126A has a bus buffer gate with 3–state output in a 5 pin package. Output is disabled when the associated output enable OE input is low. To ensure the high impedance state during power up or power down, OE |
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HD74LV1G126A R04DS0026EJ0800 HD74LV1G126A |