QUAD 2 INPUT TTL NAND GATE DATA SHEET Search Results

BR1339

Abstract: MC74LCX00
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low-Voltage CMOS Quad 2-Input NAND Gate MC74LCX00 With 5V-Tolerant Inputs The MC74LCX00 is a high performance, quad 2–input NAND gate operating from a 2.7 to 3.6V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL

74LVCXXX

Abstract: Hitachi "J suffix" toshiba toggle NAND
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low-Voltage CMOS Quad 2-Input NAND Gate MC74LCX00 With 5V-Tolerant Inputs The MC74LCX00 is a high performance, quad 2–input NAND gate operating from a 2.7 to 3.6V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL

BR1339

Abstract: MC74LCX38 tolerancing
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview MC74LCX38 Low-Voltage CMOS Quad 2-Input NAND Gate, Open Drain With 5V-Tolerant Inputs The MC74LCX38 is a high performance, open drain quad 2–input NAND gate operating from a 2.7 to 3.6V supply. High impedance TTL

toshiba smd marking code transistor

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview MC74LCX38 Low-Voltage CMOS Quad 2-Input NAND Gate, Open Drain With 5V-Tolerant Inputs The MC74LCX38 is a high performance, open drain quad 2–input NAND gate operating from a 2.7 to 3.6V supply. High impedance TTL

MC74VHCT00A

Abstract: VHCT00A DL203
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 2-Input NAND Gate MC74VHCT00A The MC74VHCT00A is an advanced high speed CMOS 2–input NAND gate fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining

DL203

Abstract: MC74VHC00 MC74VHCXXD MC74VHCXXDT MC74VHCXXM
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 2-Input NAND Gate MC74VHC00 The MC74VHC00 is an advanced high speed CMOS 2–input NAND gate fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining

VHC132

Abstract: DL203 MC74VHC00 MC74VHC132 MC74VHCXXD MC74VHCXXDT MC74VHCXXM
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 2-Input NAND Schmitt Trigger MC74VHC132 The MC74VHC132 is an advanced high speed CMOS Schmitt NAND trigger fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining

MC74VHCT132A

Abstract: VHCT132A DL203 MC74VHC00
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 2-Input NAND Schmitt Trigger MC74VHCT132A The MC74VHCT132A is an advanced high speed CMOS Schmitt NAND trigger fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining

74LVC132A

Abstract: 74LVC132ABQ 74LVC132AD 74LVC132APW TSSOP14
Contextual Info: 74LVC132A Quad 2-input NAND Schmitt trigger Rev. 01 — 15 December 2006 Product data sheet 1. General description The 74LVC132A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The 74LVC132A provides four 2-input NAND gates with Schmitt trigger inputs. It is

74HCT00A

Abstract: 751A-02 MC54HCTXXAJ MC74HCTXXAD MC74HCTXXAN
Contextual Info: ! 1991 Order this data sheet by MC54HCT00A/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 2-Input NAND Gate with LSTTL-Compatible Inputs High-Performance Silicon-Gate CMOS J SUFFIX CERAM IC CASE 632-08 The MC54/74HCT00A may be used as a level converter for interfacing TTL or

74hc00

Abstract: TTL 74HC00 74HCT00 74HCT00N 74HC00DB 74HCT00D 74HCT00DB 74HC00 B1 74HC00N function table 74HC00 ordering information
Contextual Info: 74HC00; 74HCT00 Quad 2-input NAND gate Rev. 04 — 11 January 2010 Product data sheet 1. General description The 74HC00; 74HCT00 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .

AHCT00

Abstract: 74AHC00D 74AHC00 74AHC00BQ 74AHC00PW 74AHCT00 TSSOP14
Contextual Info: 74AHC00; 74AHCT00 Quad 2-input NAND gate Rev. 04 — 28 April 2008 Product data sheet 1. General description The 74AHC00; 74AHCT00 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC

Contextual Info: 74HC00; 74HCT00 Quad 2-input NAND gate Rev. 6 — 14 December 2011 Product data sheet 1. General description The 74HC00; 74HCT00 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .

74HC00 NOT GATE

Abstract: 74HC00 74HCT00 TTL 74HC00 74HC00 national semiconductor 74HC00 B1 74HCT00N 74HC00DB 74HC00N 74HCT00D
Contextual Info: 74HC00; 74HCT00 Quad 2-input NAND gate Rev. 5 — 25 November 2010 Product data sheet 1. General description The 74HC00; 74HCT00 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .

dhvqfn14

Abstract: 74AHC00 74AHC00BQ 74AHC00D 74AHC00PW 74AHCT00 74AHCT00D 74AHCT00PW JESD22-A114E
Contextual Info: 74AHC00; 74AHCT00 Quad 2-input NAND gate Rev. 03 — 8 January 2008 Product data sheet 1. General description The 74AHC00; 74AHCT00 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . They are specified in compliance with JEDEC

74HCT00

Abstract: 74HC00 74HC00 ordering information 74HCT00D CI 74HC00 74HC00 quad CMOS nand gate TTL 74HC00 74HC00 NOT GATE 74HC00BQ
Contextual Info: 74HC00-Q100; 74HCT00-Q100 Quad 2-input NAND gate Rev. 1 — 12 July 2012 Product data sheet 1. General description The 74HC00-Q100; 74HCT00-Q100 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL

IC 74HC00

Contextual Info: 74HC00-Q100; 74HCT00-Q100 Quad 2-input NAND gate Rev. 1 — 12 July 2012 Product data sheet 1. General description The 74HC00-Q100; 74HCT00-Q100 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL

74HC132D

Abstract: Q-100 74HCT132D 74HC132 74HCT132
Contextual Info: 74HC132-Q100; 74HCT132-Q100 Quad 2-input NAND Schmitt trigger Rev. 2 — 13 August 2012 Product data sheet 1. General description The 74HC132-Q100; 74HCT132-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with

Contextual Info: 74HC132-Q100; 74HCT132-Q100 Quad 2-input NAND Schmitt trigger Rev. 2 — 13 August 2012 Product data sheet 1. General description The 74HC132-Q100; 74HCT132-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with

74HC132

Abstract: 74HCT132
Contextual Info: 74HC132; 74HCT132 Quad 2-input NAND Schmitt trigger Rev. 3 — 30 August 2012 Product data sheet 1. General description The 74HC132; 74HCT132 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard

74AHC132

Abstract: 74AHC132BQ 74AHC132D 74AHC132PW 74AHCT132 TSSOP14
Contextual Info: 74AHC132; 74AHCT132 Quad 2-input NAND Schmitt trigger Rev. 05 — 9 May 2008 Product data sheet 1. General description The 74AHC132; 74AHCT132 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard

74AHC132

Abstract: 74AHC132BQ 74AHC132D 74AHC132PW 74AHCT132 TSSOP14
Contextual Info: 74AHC132; 74AHCT132 Quad 2-input NAND Schmitt trigger Rev. 04 — 7 February 2005 Product data sheet 1. General description The 74AHC132; 74AHCT132 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . The device is specified in compliance with JEDEC

ahct132

Abstract: 74AHC132 74AHC132BQ 74AHC132D 74AHC132PW 74AHCT132 TSSOP14
Contextual Info: 74AHC132; 74AHCT132 Quad 2-input NAND Schmitt trigger Rev. 06 — 4 May 2009 Product data sheet 1. General description The 74AHC132; 74AHCT132 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard

Contextual Info: 74AHC132; 74AHCT132 Quad 2-input NAND Schmitt trigger Rev. 06 — 4 May 2009 Product data sheet 1. General description The 74AHC132; 74AHCT132 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard