CS02
Abstract: DVETR2800S
Text: DVETR2800S Series HIGH RELIABILITY HYBRID DC-DC CONVERTERS WITH INTEGRAL EMI FILTER DESCRIPTION FEATURES The DVETR series of high reliability DC-DC converters is operable over the full military -55 °C to +125 °C temperature range with no power derating.
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DVETR2800S
ISO9001,
AS9000,
MIL-PRF-38534
MIL-STD-883.
10031DSA
CS02
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CS02
Abstract: DVETR2800D
Text: DVETR2800D Series HIGH RELIABILITY HYBRID DC-DC CONVERTERS WITH INTEGRAL EMI FILTER DESCRIPTION FEATURES The DVETR series of high reliability DC-DC converters is operable over the full military -55 °C to +125 °C temperature range with no power derating.
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DVETR2800D
ISO9001,
AS9000,
MIL-PRF-38534
MIL-STD-883.
10032DSA
CS02
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CS02
Abstract: DVEHF2800T
Text: DVEHF2800T Series HIGH RELIABILITY HYBRID DC-DC CONVERTERS WITH INTEGRAL EMI FILTER DESCRIPTION FEATURES The DVEHF series of high reliability DC-DC converters is operable over the full military -55 °C to +125 °C temperature range with no power derating.
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DVEHF2800T
ISO9001,
AS9000,
MIL-PRF-38534
MIL-STD-883.
10030DSA
CS02
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5962L0053605VYC
Abstract: 5962-9069204QXA ATMEL 302 24C16 UT9Q512E-20YCC MOH0268D UT54ACS164245SEIUCCR Z085810 5962-9762101Q2A UT28F256QLET-45UCC 5962R0250401KXA
Text: NOT MEASUREMENT SENSITIVE MIL-HDBK-103AJ 19 SEPTEMBER 2011 SUPERSEDING MIL-HDBK-103AH 28 MARCH 2011 DEPARTMENT OF DEFENSE HANDBOOK LIST OF STANDARD MICROCIRCUIT DRAWINGS This handbook is for guidance only. Do not cite this document as a requirement. AMSC N/A
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MIL-HDBK-103AJ
MIL-HDBK-103AH
MIL-HDBK-103AJ
5962L0053605VYC
5962-9069204QXA
ATMEL 302 24C16
UT9Q512E-20YCC
MOH0268D
UT54ACS164245SEIUCCR
Z085810
5962-9762101Q2A
UT28F256QLET-45UCC
5962R0250401KXA
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INCOMING RAW MATERIAL INSPECTION
Abstract: smd led 5050 0.5 w datasheet INCOMING RAW MATERIAL INSPECTION procedure uei310 smd led 5050 datasheet smd 6 led 5050 datasheet airgap Vs Al Value in Ferrite Core TOROIDS Design Considerations smd led 5050 smd transistor A6t
Text: Soft Ferrites THOMSON-CSF PASSIVE COMPONENTS A Committed International Strategy Provide worldwide an innovative range of components and effective solutions focused on the needs of customers and the evolution of market applications. Ensure the growth of the company and the satisfaction of shareholders
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Low Pin Count LPC Interface Specification
Abstract: SC1100UFH-266 pci-usb 16550A UART GPIO PROGRAMMING AMD Geode GX1 300 MHz Geode "Processor Specification Update" h1g1 AMD Geode GX 0/pmr 210 mb
Text: AMD Geode SC1100 Processor Data Book January 2004 Publication ID: Revision 2.0 AMD Geode™ SC1100 Processor Data Book 2004 Advanced Micro Devices, Inc. All rights reserved. The contents of this document are provided in connection with Advanced Micro
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SC1100
Low Pin Count LPC Interface Specification
SC1100UFH-266
pci-usb
16550A UART
GPIO PROGRAMMING
AMD Geode GX1 300 MHz
Geode "Processor Specification Update"
h1g1
AMD Geode GX
0/pmr 210 mb
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F100K
Abstract: No abstract text available
Text: & July 1992 100307 Low Power Quint Exclusive OR/NOR Gate General Description Features The 100307 is monolithic quint exclusive-OR/NOR gate. The Function output is the wire-OR of all five exclusive-OR outputs. All inputs have 50 k fi pull-down resistors. •
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MIL-STD-883
24-Pin
F100K
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Untitled
Abstract: No abstract text available
Text: Semi co n d u July 1992 t o r 100351 Low Power Hex D Flip-Flop General Description Features The 100351 contains six D-type edge-triggered, master/ slave flip-flops with true and complement outputs, a pair of common Clock inputs CPa and CPt, and common Master
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Untitled
Abstract: No abstract text available
Text: S E M IC O N D U C T O R tm 100354 Low Power 8-Bit Register with Cut-Off Drivers General Description The 100354 contains eight D-Type edge triggered, master/ slave flip-flops with individual inputs Dn , true outputs (Qn), a clock input (CP), an output enable pin (OEN), and a com
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F100163
Abstract: F100363 F100K
Text: 100363 O T National ÆÂ Semiconductor F100363 Low Power Dual 8-Input Multiplexer General Description Features The F100163 is a dual 8 -input multiplexer. The Data Select <Sn inputs determine which bit An and Bn) will be present ed at the outputs (Za and Z& respectively). The same bit
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F100363
F100163
F100163
24-Pin
TL/F/10612-6
TL/F/10612-7
F100363
F100K
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Untitled
Abstract: No abstract text available
Text: 100322 ¡33 National Æm Semiconductor 100322 Low Power 9-Bit Buffer General Description Features The 100322 is a monolithic 9-bit buffer. The device contains nine non-inverting buffer gates with single input and output. All inputs have 50 k il pull-down resistors and all outputs are
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MIL-STD-883
24-Pln
TL/F/10600-5
TL/F/10608-6
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F100K
Abstract: TL 2292
Text: Semi co n d u July 1992 t o r 100350 Low Power Hex D-Latch General Description Features The 100350 contains six D-type latches with true and com plement outputs, a pair of common Enables Ea and E*, , and a common Master Reset (MR). A Q output follows its D
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Untitled
Abstract: No abstract text available
Text: 100343 ^National Æm Semiconductor 100343 Low Power 8-Bit Latch General Description Features The 100343 contains eight D-type latches, individual inputs, Dn , outputs (Qn), a common enable pin (E), and a latch enable pin (LE). A Q output follows its D input when both E
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MIL-STD-883
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100352
Abstract: No abstract text available
Text: & July 1992 100352 Low Pow er 8-B it B u ffer w ith C u t-O ff D rivers General Description Features The 100352 contains an 8-bit buffer, individual inputs Dn , outputs (Qn), and a data output enable pin (OEN). A Q out put follows its D input when the OEN pin is LOW. A HIGH on
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100155DC
Abstract: No abstract text available
Text: 100155 National SjA Semiconductor F100155 Quad Multiplexer/Latch General Description The F100155 contains four transparent latches, each of which can accept and store data from two sources. When both Enable En inputs are LOW, the data that appears at an output is controlled by the Select (Sn) inputs, as shown in
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F100155
100155DC
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F100124
Abstract: F100324
Text: National düä Semiconductor F100324 Low Power Hex TTL-to-ECL Translator General Description T he F100324 is a hex translator, designed to convert TTL logic levels to 100K ECL logic levels. The inputs are com patible with standard or Schottky TTL. A comm on Enable
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F100324
F100324
F100324,
125eC,
tl/F/9S78-6
TL/F/9678-5
F100124
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Untitled
Abstract: No abstract text available
Text: 100324 £3 National ÆÆ Semiconductor 100324 Low Power Hex TTL-to-ECL Translator General Description The 100324 is a hex translator, designed to convert TTL logic levels to 100K ECL logic levels. The inputs are com patible with standard or Schottky TTL. A common Enable
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Untitled
Abstract: No abstract text available
Text: Se mi c o n dut July 1992 t o r 100331 Low Power Triple D Flip-Flop General Description Features The 100331 contains three D-type, edge-triggered master/ slave flip-flops with true and complement outputs, a Com mon Clock CPc , and Master Set (MS) and Master Reset
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Untitled
Abstract: No abstract text available
Text: 03 Semiconductor National ÆM 100370 Low Power Universal Demultiplexer/Decoder General Description The 100370 universal demultiplexer/decoder functions as either 9 dual t -of-4 decoder or as a single 1-of-8 decoder, depending on the signai applied to the Mode Control M
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Untitled
Abstract: No abstract text available
Text: S E M IC O N D U C T O R tm 100363 Low Power Dual 8-Input Multiplexer General Description • 2000V ESD protection The 100363 is a dual 8-input m ultiplexer. The Data S elect S n inputs determ ine w hich bit (A n and Bn) will be presented a t the outputs (Za and Z b respectively). The sam e bit (0 -7 )
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Untitled
Abstract: No abstract text available
Text: I R C H I L D S E M I C O N D U C T O R TM 100341 Low Power 8-Bit Shift Register General Description “parallel e ntry”, “hold”, “shift left” or “shift righ t” as described in the Truth Table. All inputs have 50 kQ pull-dow n resistors. The 100341 contains e ight edge-triggered, D-type flip-flops
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A2P-202
Abstract: No abstract text available
Text: F100136 4-Stage Counter/Shift Register General Description The F100136 operates as either a modulo-16 up/down counter or as a 4-bit bidirectional shift register. Three Select Sn inputs determine the mode of operation, as shown in the Function Select table. Two Count Enable (C£P, CET)
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F100136
modulo-16
TL/F/98S5-12
TL/F/9655-15
A2P-202
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Untitled
Abstract: No abstract text available
Text: S E M IC O N D U C T O R tm 100355 Low Power Quad Multiplexer/Latch General Description The 100355 contains fo u r transparent latches, each of which can a ccept and store d ata from tw o sources. W hen both En able E n inputs are LOW, the data th a t appears at an output
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY DATA SHEET - Z o Z V ,ON IS D 2 5 0 0 S e r ie s Single-Chip Voice Record/Playback Devices 60-, 75-, and 90-Second Durations @ d e v ic e s GENERAL DESCRIPTION FEATURES provides high-quality, single-chip record/playback
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90-Second
ISD2500ChipCorderâ
ISD2500
448L2
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