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    PT36C EQUIVALENT Search Results

    PT36C EQUIVALENT Result Highlights (2)

    Part ECAD Model Manufacturer Description Download Buy
    LM3550SP/NOPB
    Texas Instruments A Flash LED Driver with Automatic Vf and ESR Detection for Mobile Camera Systems 20-UQFN -30 to 85 Visit Texas Instruments Buy
    LM3550SPX/NOPB
    Texas Instruments A Flash LED Driver with Automatic Vf and ESR Detection for Mobile Camera Systems 20-UQFN -30 to 85 Visit Texas Instruments Buy

    PT36C EQUIVALENT Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    pt36c equivalent

    Abstract: transistor pt36c pt36c pt35c transistor pt42c datasheet transistor pt36C PT42C l22c INTEL Core i7 860 128x8 ram
    Contextual Info: Data Sheet January 15, 2002 ORCA Series 4 FPGAs Introduction • Traditional I/O selections: — LVTTL and LVCMOS 3.3 V, 2.5 V, and 1.8 V I/Os. — Per pin-selectable I/O clamping diodes provide 3.3 V PCI compliance. — Individually programmable drive capability:


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    sink/12 256-Pin 352-Pin 416-Pin 432-Pin 680-Pin DS01-174NCIP DS01-024NCIP) pt36c equivalent transistor pt36c pt36c pt35c transistor pt42c datasheet transistor pt36C PT42C l22c INTEL Core i7 860 128x8 ram PDF

    Contextual Info: Data Sheet January 3, 2002 ORCA Series 4 FPGAs Introduction • Traditional I/O selections: — LVTTL and LVCMOS 3.3 V, 2.5 V, and 1.8 V I/Os. — Per pin-selectable I/O clamping diodes provide 3.3 V PCI compliance. — Individually programmable drive capability:


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    sink/12 DS01-174NCIP DS01-024NCIP) PDF

    pt36c equivalent

    Abstract: PT21C CORE F5A k72 u2 128x8 rom
    Contextual Info: Data Sheet April, 2002 ORCA Series 4 FPGAs Introduction • Traditional I/O selections: — LVTTL and LVCMOS 3.3 V, 2.5 V, and 1.8 V I/Os. — Per pin-selectable I/O clamping diodes provide 3.3 V PCI compliance. — Individually programmable drive capability:


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    OR4E062BM680-DB OR4E061BA352-DB OR4E061BM680-DB OR4E04 OR4E06 DS01-174NCIP DS01-024NCIP) pt36c equivalent PT21C CORE F5A k72 u2 128x8 rom PDF

    PT18C

    Abstract: k62M k72 u2
    Contextual Info: Data Sheet November, 2002 ORCA Series 4 FPGAs Introduction • Traditional I/O selections: — LVTTL 3.3V and LVCMOS (2.5 V and 1.8 V) I/Os. — Per pin-selectable I/O clamping diodes provide 3.3 V PCI compliance. — Individually programmable drive capability:


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    OR4E02 OR4E02-2BA352I OR4E02-2BM416I OR4E02-2BM680I OR4E02-1BA352I OR4E02-1BM416I OR4E02-1BM680I OR4E04-2BA352I OR4E04-2BM416I OR4E04-2BM680I PT18C k62M k72 u2 PDF

    k72 u2

    Abstract: sd tray
    Contextual Info: Data Sheet September, 2002 ORCA Series 4 FPGAs Introduction • Traditional I/O selections: — LVTTL and LVCMOS 3.3 V, 2.5 V, and 1.8 V I/Os. — Per pin-selectable I/O clamping diodes provide 3.3 V PCI compliance. — Individually programmable drive capability:


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    anE041BM680-DB OR4E063BA352-DB OR4E063BM680-DB OR4E062BA352-DB OR4E062BM680-DB OR4E061BA352-DB OR4E061BM680-DB OR4E04 OR4E06 DS01-174NCIP k72 u2 sd tray PDF

    transistor pt36c

    Abstract: stm cl-30 datasheet transistor pt36C transistor pt42c pt36c PT42C pt8a ap13.6 diode PT35c transistor PR25D
    Contextual Info: Data Sheet March, 2003 ORCA Series 4 FPGAs Introduction • Traditional I/O selections: — LVTTL 3.3V and LVCMOS (2.5 V and 1.8 V) I/Os. — Per pin-selectable I/O clamping diodes provide 3.3 V PCI compliance. — Individually programmable drive capability:


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    sink/12 OR4E06-1BM680I transistor pt36c stm cl-30 datasheet transistor pt36C transistor pt42c pt36c PT42C pt8a ap13.6 diode PT35c transistor PR25D PDF

    transistor pt36c

    Abstract: datasheet transistor pt36C PT35c transistor pt36c microprocessor block diagram of plc pt35c transistor pt42c PT42C transistor BC 157 PLC Communication cables pin diagram
    Contextual Info: Data Sheet November, 2003 ORCA Series 4 FPGAs Introduction • Traditional I/O selections: — LVTTL 3.3V and LVCMOS (2.5 V and 1.8 V) I/Os. — Per pin-selectable I/O clamping diodes provide 3.3 V PCI compliance. — Individually programmable drive capability:


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    sink/12 transistor pt36c datasheet transistor pt36C PT35c transistor pt36c microprocessor block diagram of plc pt35c transistor pt42c PT42C transistor BC 157 PLC Communication cables pin diagram PDF

    PB21D

    Contextual Info: Data Sheet August, 2003 ORCA Series 4 FPGAs Introduction • Traditional I/O selections: — LVTTL 3.3V and LVCMOS (2.5 V and 1.8 V) I/Os. — Per pin-selectable I/O clamping diodes provide 3.3 V PCI compliance. — Individually programmable drive capability:


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    OR4E04 OR4E06 PB21D PDF

    transistor pt36c

    Abstract: PT35c transistor pt36c PT42C transistor pt42c T146 ap13.6 diode PT 9732 MPC8260 MPC860
    Contextual Info: Data Sheet May, 2006 ORCA Series 4 FPGAs Introduction • Traditional I/O selections: — LVTTL 3.3V and LVCMOS (2.5 V and 1.8 V) I/Os. — Per pin-selectable I/O clamping diodes provide 3.3 V PCI compliance. — Individually programmable drive capability:


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    sink/12 OR4E06-1BM680I transistor pt36c PT35c transistor pt36c PT42C transistor pt42c T146 ap13.6 diode PT 9732 MPC8260 MPC860 PDF

    transistor pt36c

    Abstract: pt36c equivalent datasheet transistor pt36C transistor bc 5763 datasheet OR4E06 PT35c transistor pt36c transistor pt42c CD0308 OR4E02-1BA352I
    Contextual Info: ORCA Series 4 FPGA Device Datasheet June 2010 All Devices Discontinued! Product Change Notifications PCNs #09-10 has been issued to discontinue all devices in this data sheet. The original datasheet pages have not been modified and do not reflect those changes.


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    OR4E02 OR4E04 OR4E02-3BA352C OR4E02-2BA352C OR4E02-1BA352C OR4E02-2BA352I OR4E02-1BA352I OR4E02-3BM416C OR4E02-2BM416C OR4E02-1BM416C transistor pt36c pt36c equivalent datasheet transistor pt36C transistor bc 5763 datasheet OR4E06 PT35c transistor pt36c transistor pt42c CD0308 OR4E02-1BA352I PDF

    higig2 frame format

    Abstract: "higig header" EZchip higig2 higig specification verilog code for spi4.2 to fifo higig pause frame marvell 618 datasheet pt36C 0x00900
    Contextual Info: LatticeSCM XAUI to SPI4.2 July 2008 Reference Design RD1033 Introduction The XAUI to SPI4.2 X2S4 Bridge reference design is a cost-effective system solution for bridging SPI4.2 based network processors and 10G/10G+ Ethernet switching devices. On the XAUI side, the X2S4 optionally supports the


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    RD1033 10G/10G+ 12Gbps RD1033. higig2 frame format "higig header" EZchip higig2 higig specification verilog code for spi4.2 to fifo higig pause frame marvell 618 datasheet pt36C 0x00900 PDF

    pt45

    Contextual Info: LatticeSC Family Data Sheet DS1004 Version 01.2, June 2006 LatticeSC Family Data Sheet Introduction June 2006 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks


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    DS1004 DS1004 700MHz 600Mbps 125Gbps) 110mW VCC12. LFSC25 900-Ball pt45 PDF

    Contextual Info: LatticeSC Family Data Sheet DS1004 Version 01.3, August 2006 LatticeSC Family Data Sheet Introduction August 2006 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os


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    DS1004 DS1004 700MHz 600Mbps 125Gbps) 110mW PDF

    Contextual Info: LatticeSC Family Data Sheet DS1004 Version 01.4b, February 2007 LatticeSC Family Data Sheet Introduction November 2006 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os


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    DS1004 DS1004 700MHz 600Mbps 125Gbps) 105mW SC115 PDF

    Contextual Info: LatticeSC Family Data Sheet DS1004 Version 01.5, March 2007 LatticeSC Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks


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    DS1004 DS1004 700MHz 600Mbps 125Gbps) 105mW LFSC25 FF1020 LFSC80 PDF

    Contextual Info: LatticeSC Family Data Sheet DS1004 Version 01.5, March 2007 LatticeSC Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks


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    DS1004 DS1004 700MHz 600Mbps 125Gbps) 105mW LFSC25 FF1020 LFSC80 PDF

    Contextual Info: LatticeSC Family Data Sheet DS1004 Version 01.5, March 2007 LatticeSC Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks


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    DS1004 DS1004 700MHz 600Mbps 125Gbps) 105mW LFSC25 FF1020 LFSC80 PDF

    Contextual Info: LatticeSC/M Family Data Sheet DS1004 Version 01.6, August 2007 LatticeSC/M Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os


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    DS1004 DS1004 700MHz 600Mbps 125Gbps) 105mW PDF

    2-bit comparator

    Abstract: LFSC3GA15E-5F900I PR77A PR55D pr94a diode transistor pt36c pt36C PB110C pb127d PB138
    Contextual Info: LatticeSC/M Family Data Sheet DS1004 Version 01.8, November 2007 LatticeSC/M Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os


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    DS1004 DS1004 700MHz 600Mbps 125Gbps) 105mW 2-bit comparator LFSC3GA15E-5F900I PR77A PR55D pr94a diode transistor pt36c pt36C PB110C pb127d PB138 PDF

    Contextual Info: LatticeSC/M Family Data Sheet DS1004 Version 02.1, June 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 139 to 942 I/Os • 700MHz global clock; 1GHz edge clocks


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    DS1004 DS1004 700MHz 600Mbps 125Gbps) 105mW PDF

    pb127d

    Contextual Info: LatticeSC/M Family Data Sheet DS1004 Version 02.2, December 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 139 to 942 I/Os • 700MHz global clock; 1GHz edge clocks


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    DS1004 DS1004 700MHz 600Mbps 125Gbps) 105mW pb127d PDF

    Contextual Info: LatticeSC/M Family Data Sheet DS1004 Version 01.9, January 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os


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    DS1004 DS1004 700MHz 600Mbps 125Gbps) 105mW PDF

    transistor pt36c

    Abstract: pb127d PB110C pr82a PB80D umi u26 BA5 904 AF P PB124A PL84C PR55D
    Contextual Info: LatticeSC/M Family Data Sheet DS1004 Version 02.1, June 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 139 to 942 I/Os • 700MHz global clock; 1GHz edge clocks


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    DS1004 DS1004 700MHz 600Mbps 125Gbps) 105mW transistor pt36c pb127d PB110C pr82a PB80D umi u26 BA5 904 AF P PB124A PL84C PR55D PDF

    Contextual Info: LatticeSC/M Family Data Sheet DS1004 Version 02.0, March 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 139 to 942 I/Os


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    DS1004 DS1004 700MHz 600Mbps 125Gbps) 105mW PDF