PSEUDO Search Results

TC51832FL10

Abstract: TC51832 TC51832FL-10 TC51832PL-10 256IC 832P
Contextual Info: 832P/S 832 P/S 832P/S 32,768 WORD x 3 BIT CMOS PSEUDO STATIC RAM IDESCRIPTION] The TC51832 Family is a 256IC bit high-speed CMOS Pseudo-Static RAM organized as 32,768 words by 8 bits. The TC51832 Family utilizes one transistor dynamic memory cell array with

TC518129

Abstract: de interlace
Contextual Info: TOSHIBA TC518129AP/ASP/AF/AFW-80/10/12 TC518129APL/ASPL/AFL/AFWL30/10/12 TC518129AFTLS0/10/12 SILICON GATE CMOS 131,072 WORD x 8 BIT CMOS PSEUDO STATIC RAM Description The T C 5 1 8 1 2 9 A is a 1M bit high speed C M O S p se udo static R AM organized as 131,07 2 w o rd s by 8 bits. The TC 5 18 1 29A utilizes

TH4B

Contextual Info: PHAST-3N STM-1/STS-3/STS-3c SDH/SONET Overhead Terminator with Telecom Bus Interface TXC-06103 DATA SHEET • • • • • • • • • • • • • • • • • Bit-serial SDH/SONET line interface - Pseudo-ECL interface with clock recovery and synthesis

Contextual Info: TB62201AFG TOSHIBA Bi-CMOS Processor IC Silicon Monolithic TB62201AFG Dual-Stepping Motor Driver IC for OA Equipment Using PWM Chopper Type The TB62201AFG is a dual-stepping motor driver driven by chopper micro-step pseudo sine wave. To drive two-phase stepping motors, Two pairs of 16-bit latch and

Contextual Info: ADS7881 SLAS400B − SEPTEMBER 2003 − REVISED NOVEMBER 2005 12ĆBIT, 4ĆMSPS LOW POWER SAR ANALOGĆTOĆDIGITAL CONVERTER FEATURES D 4 MHz Sample Rate, 12-Bit Resolution D Zero Latency D Unipolar, Pseudo Differential Input, Range: D D D D D D D D − 0 V to 2.5 V

low noise pseudomorphic

Contextual Info: MwT - H4 26 GHz Low Noise Pseudomorphic HEMT GaAs FET_ MicroWave Technology 4268 Solar Way Fremont, CA 94538 510-651-6700 FAX 510-651-2208 FEATURES — 50 • 0.9 dB NOISE FIGURE AT 12 GHZ • HIGH ASSOCIATED GAIN 1241 8.4 •0.3 MICRON REFRACTORY METAL /GOLD GATE

ADS7881

Abstract: ADS7881IPFBR ADS7881IPFBT ADS7881IRGZR ADS7881IRGZT DB10 THS4211
Contextual Info: ADS7881 SLAS400B − SEPTEMBER 2003 − REVISED NOVEMBER 2005 12ĆBIT, 4ĆMSPS LOW POWER SAR ANALOGĆTOĆDIGITAL CONVERTER FEATURES D 4 MHz Sample Rate, 12-Bit Resolution D Zero Latency D Unipolar, Pseudo Differential Input, Range: D D D D D D D D − 0 V to 2.5 V

Contextual Info: ADS8254 www.ti.com. SLAS643 – MARCH 2009 16-BIT, 1-MSPS, PSEUDO-BIPOLAR DIFFERENTIAL SAR ADC WITH ON-CHIP ADC

GL032A

Abstract: S71GL032A S71GL032
Contextual Info: S71GL032A Based MCPs Stacked Multi-Chip Product MCP Flash Memory and RAM 32 Megabit (2 M x 16-bit) CMOS 3.0 Volt-only Page Mode Flash Memory and 16/8/4 Megabit (1M/512K/256K x 16-bit) Pseudo Static RAM Data Sheet ADVANCE INFORMATION Notice to Readers: The Advance Information status indicates that this

ATF-38143

Abstract: ATF-38143-BLK ATF-38143-TR1 ATF-38143-TR2 k5 z2 Cgd01 D 1709 N 20
Contextual Info: Low Noise Pseudomorphic HEMT in a Surface Mount Plastic Package Technical Data ATF-38143 Features • Low Noise Figure Surface Mount Package SOT-343 • Excellent Uniformity in Product Specifications • Low Cost Surface Mount Small Plastic Package SOT-343 4 lead SC-70

nec 8772

Abstract: LD 7522 142.58 NE32584C NE32584C-S NE32584C-T1 cha 9935 K 4017 j50 0513 5 5252 f 1001
Contextual Info: ULTRA LOW NOISE PSEUDOMORPHIC HJ FET NE32584C NOISE FIGURE & ASSOCIATED GAIN vs. FREQUENCY VDS = 2 V, IDS = 10 mA FEATURES 1.2 • HIGH ASSOCIATED GAIN: 12.5 dB Typical at 12 GHz 24 21 • LG ≤ 0.20 µm, WG = 200 µm • LOW COST METAL CERAMIC PACKAGE • TAPE & REEL PACKAGING OPTION AVAILABLE

Contextual Info: Ordering number : EN %5041A _ CMOS LSI LC11011-141 SAIÊYO Computer Image Signal Processing Full-Color Gray-Scale Processor i Preliminary Overview Package Dimensions The LC 11011 -141 is a pseudo gray scale processor for

N02Q

Abstract: la2730 IC LA3160 Sanyo LA2500
Contextual Info: SANYO SEMICONDUCTOR 7997076 S ANY O CORP 7b SEMICONDUCTOR dË | 7 cH7CI7fe. G D Q 1 Û M 5 C ORP LA2500 76C 7 T- 7y-os- 0/ 01845 m o n o lith ic lin e a r 1C CIRCUIT D R AW ING NO.SD3B PSEUDO CLASS A BIAS CIRCUIT FOR POWER AMP 3017B Features • In c o rp o ra tin g the L A 2 5 0 0 in a pure c o m p le m e n ta ry class B p o w e r am p p e rm its th is am p to be changed

Micro-X Marking 865

Contextual Info: S IE M E N S CFY67 HiRel K-Band GaAs Super Low Noise HEMT • HiRel Discrete and Microwave Semiconductor • Pseudo-morphic AIGaAs/lnGaAs/GaAs HEMT • For professional super low-noise amplifiers • For frequencies from 500 MHz to > 20 GHz • Hermetically sealed microwave package

SPF 455

Abstract: SPF-1576 SPF 455 H 5 SPF-1676
Contextual Info: SPF-1576, -1676 2-26 GHz Low Noise PHEMT GaAs FET Preliminary Data Features - Pseudomorphic HEMT Technology - Low Noise Figure: 0.55dB Typical at 12 GHz - High Associated Gain: 10dB Typical at 12 GHz • Low Cost Ceramic Package - Tape and Reel Packaging Available

TC518129AFwl

Contextual Info: TOSHIBA TC518129APL/AFL/AFWL-80LV/lOLV/12LV TC518129AFTL80LV/lOLV/12LV SILICON GATE CM O S 131,072 W ORD x 8 BIT C M O S PSEUDO STATIC RAM D escription The TC5181 29A-LV is a 1M bit high speed CMOS pseudo static RAM organized as 131,072 words by 8 bits. The TC518129A-LV

data sw 3205

Contextual Info: Ordering number : EN JK4711 CMOS LSI LC338128P, M, PL, ML-7Q/8o7fÖ 1 MEG 131072 words x 8 bits Pseudo-SRAM Preliminary Overview Package Dimensions The LC338128 series is composed of pseudo static RAM that operate on a single 5 V power supply and is organized

Contextual Info: Dynamic RAMs Synchronous DRAM Static RAMs Capacity 2M Organization 12 8 K X 1 6bits 2Bank Type No. Page L C 3 8 2 16 1T Pseudo SRAMs . 191 • Pin Numbering W hen you face the to p side (m arking side) o f a package, w ith its pins tow ard you, num bering starts w ith

TC518128B

Abstract: TRANSISTOR BFW 11 pin diagram TC518128 TC518128bfl pin diagram of TRANSISTOR BFW 11 TC5181
Contextual Info: TOSHIBA T C 5 1 8 1 2 8 B P L /B S P L /B F L /B F W 1 V B F IL -7 0 /8 0 /1 0 T C 5 1 8 1 2 8 B P iy B S P L /B F V B F W L /B F H r 7 0 iy 8 0 L /1 0 L SILICON GATE CMOS 131,072 WORD x 8 BIT CMOS PSEUDO STATIC RAM Description The TC518128B is a 1M bit high speed CMOS pseudo static RAM organized as 131,072 words by 8 bits. The TC518128B utilizes

transistor D128

Abstract: TC518129 D128 transistor transistor d133 ksh 200 TRANSISTOR equivalent TRANSISTOR 80l
Contextual Info: TOSHIBA TC518129BPL/BSPL/BFL/BFWL/BFIL-70/80/10 TC518129BPL/BSPL/BFL/BFWL/BFIL-70L/80L/10L SILICON GATE CMOS 131,072 WORD x 8 BIT CMOS PSEUDO STATIC RAM Description The TC518129B is a 1M bit high speed CMOS pseudo static RAM organized as 131,072 words by 8 bits. TheTC518129B utilizes

TRANSISTOR D206

Abstract: 8512A transistor D209 LA 8512 TC51V8512
Contextual Info: TOSHIBA TC51V8512AF/AFT/ATR-12/15 PRELIMINARY SILICON GATE CMOS 524,288 WORD x 8 BIT CMOS PSEUDO STATIC RAM Description The T C 5 1V 8512 A F is a 4M bit high speed C M O S pse udo static RAM organized as 5 2 4 ,2 8 8 w o rd s by 8 bits. The T C 51V 8512A F

pseudomorphic HEMT

Abstract: TRANSISTOR c 5578 B TRANSISTOR BC 135 0604HQ FPD6836SOT343 OT343 3.5GHz BJT bc 548 transistor transistor bc 731 transistor bc 564
Contextual Info: FPD6836SOT343 FPD6836SOT3 43 Low-Noise High-Linearity Packaged pHEMT LOW-NOISE HIGH-LINEARITY PACKAGED pHEMT Package: SOT343 Product Description The FPD6836SOT343 is a packaged depletion mode pseudomorphic High Electron Mobility Transistor pHEMT . It utilizes a 0.25µmx750µm

4430B

Abstract: 256x128x8
Contextual Info: |Ordering number : EN4430B] CMOS LSI LC33832P, S, M, PL, SL, ML-70/80/10 No. 4430B 256 K 32768 words x 8 bits Pseudo-SRAM Overview Package Dimensions The LC33832 series is composed of pseudo static RAM that operates on a single S V power supply and is organized as 32768 words x 8 bits. By using memory

TC511632

Abstract: TC511632FL
Contextual Info: TOSHIBA TC511632FL/FTL-70/85/10 PRELIMINARY SILICON GATE CMOS 32,768 WORD x 16 BIT CMOS PSEUDO STATIC RAM Description The T C 5 1 1632FL7FTL is a 5 1 2K b t high speed C M O S p s e u d o static RAM organized as 3 2 ,7 6 8 w o rd s by 16 bits. The T C 511632FL7F TL utilizes a o n e tra n s is to r dyn a m ic m e m o ry cell w ith C M O S peripheral circuitry to p rovide high capacity, high