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    Riedon FPR2A-0R1F1

    RES 0.1 OHM 1% 30W TO218
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    DigiKey FPR2A-0R1F1 Tube 786 1
    • 1 $13.2
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    • 100 $6.85
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    Riedon FPR2A-0R5F1

    RES 0.5 OHM 1% 30W TO218
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    DigiKey FPR2A-0R5F1 Tube 289 1
    • 1 $21.7
    • 10 $13.531
    • 100 $9.685
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    Riedon FPR2A-0R05F1

    RES 0.05 OHM 1% 30W TO218
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    DigiKey FPR2A-0R05F1 Tube 176 1
    • 1 $22.39
    • 10 $13.98
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    Riedon FPR2A-0R002F1

    RES 0.002 OHM 1% 30W TO218
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    DigiKey FPR2A-0R002F1 Tube 171 1
    • 1 $24.43
    • 10 $15.293
    • 100 $11.25
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    Riedon FPR2A-0R01F1

    RES 0.01 OHM 1% 30W TO218
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    DigiKey FPR2A-0R01F1 Tube 132 1
    • 1 $22.39
    • 10 $13.98
    • 100 $10.08
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    PR2A Datasheets (1)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    PR2A10DC12K-1.5 Hasco Relays RELAY DPST 10A 12V Original PDF

    PR2A Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    00XXX001

    Abstract: BA 5979 R15C3 OR3T125 OR3T20 OR3T30 OR3T55 PT10 PT11 PT12
    Text: Data Sheet November 2006 ORCA Series 3C and 3T Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Baseline FPGA family used in Series 3+ FPSCs field programmable system chips which combine FPGA logic


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    PDF OR3T20 OR3T30 1A-06. OR3T80 00XXX001 BA 5979 R15C3 OR3T125 OR3T20 OR3T30 OR3T55 PT10 PT11 PT12

    Untitled

    Abstract: No abstract text available
    Text: Stellaris Family Development Board U S E R ’S M A N U A L DM - LM3SF AM-0 4 C opyr ight 2005- 2007 Lumi nary Micro , Inc. Legal Disclaimers and Trademark Information INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH LUMINARY MICRO PRODUCTS. NO LICENSE,


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    PDF

    MachXO sysIO Usage Guide

    Abstract: LCMXO256C-4M100C LCMXO2280 lcmxo640c-3tn100i LCMXO640C-3FT256C LCMXO1200 LCMXO256 LCMXO2280E-4M132I LVCMOS15 LVCMOS25
    Text: MachXO Family Data Sheet Version 02.3_4W February 2007 MachXO Family Data Sheet Introduction April 2006 Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL


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    PDF TN1086) TN1087) TN1097) MachXO sysIO Usage Guide LCMXO256C-4M100C LCMXO2280 lcmxo640c-3tn100i LCMXO640C-3FT256C LCMXO1200 LCMXO256 LCMXO2280E-4M132I LVCMOS15 LVCMOS25

    OR3LP26B

    Abstract: OR3T20 ORT8850 7ba2 diode pb7d
    Text: Preliminary Data Sheet April 2001 PayloadPlus /APC UTOPIA Slave Bridge Introduction Features The PayloadPlus/ATM port controller APC universal test and operations PHY interface for ATM (UTOPIA) slave bridge, also known as the PayloadPlus APC wedge (PAW) or the Atlanta™ interface


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    PDF OR3T20 DS01-212NCIP OR3LP26B ORT8850 7ba2 diode pb7d

    LCMXO2-1200HC-4TG100C

    Abstract: LCMXO2-256HC-4TG100I LCMXO2-1200 tn1200 lcmxo2 LCMXO2-1200HC-4TG100 LCMXO2-2000 LCMXO2-7000 MachXO2-1200 LCMXO2-4000HC
    Text: MachXO2 Family Handbook HB1010 Version 01.0, November 2010 MachXO2 Family Handbook Table of Contents November 2010 Section I. MachXO2 Family Data Sheet Introduction Features . 1-1


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    PDF HB1010 LCMXO2-1200HC-4TG100C LCMXO2-256HC-4TG100I LCMXO2-1200 tn1200 lcmxo2 LCMXO2-1200HC-4TG100 LCMXO2-2000 LCMXO2-7000 MachXO2-1200 LCMXO2-4000HC

    LAttice top marking

    Abstract: QTH-030-01-F-D-A PT4E lattice machxo starter evaluation board marking bb8 CB20 EVQ-QWP01W R145 R150 R153
    Text: MachXO Starter Evaluation Board User’s Guide April 2007 Revision: ebug14_01.4 MachXO Starter Evaluation Board User’s Guide Lattice Semiconductor Introduction The Lattice MachXO Starter Evaluation Board provides a convenient platform to evaluate, test and debug user


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    PDF ebug14 MachXO256 100-pin 33MHz RC1117X/SOT223 LAttice top marking QTH-030-01-F-D-A PT4E lattice machxo starter evaluation board marking bb8 CB20 EVQ-QWP01W R145 R150 R153

    TPE11

    Abstract: TPT20 CON6A v2 tpr4 pr48b PT13B condor E5 Condor LVCMOS15 LVCMOS25
    Text: LatticeEC Standard Evaluation Board – Revision B User’s Guide April 2007 ebug10_01.4 Lattice Semiconductor LatticeEC Standard Evaluation Board – Revision B User’s Guide Introduction The LatticeEC Standard Evaluation Board provides a convenient platform to evaluate, test and debug user


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    PDF ebug10 120-pin) 32-bit PVG5H503A01 TPE11 TPT20 CON6A v2 tpr4 pr48b PT13B condor E5 Condor LVCMOS15 LVCMOS25

    OSC4/SM

    Abstract: MDLS-20265 OPTREX C-51505 MDLS-24265 short stop 12v p18 30a rs232 converter dmx Mosfet J49 LCM-S01602 lcm-s02402 Vishay SOT23 MARKING F5
    Text: LatticeXP2 Advanced Evaluation Board User’s Guide January 2009 Revision: EB30_01.3 LatticeXP2 Advanced Evaluation Board User’s Guide Lattice Semiconductor Introduction The LatticeXP2 Advanced Evaluation Board provides a convenient platform to evaluate, test and debug user


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    PDF LatticeXP2-17 24-6R8 OSC4/SM MDLS-20265 OPTREX C-51505 MDLS-24265 short stop 12v p18 30a rs232 converter dmx Mosfet J49 LCM-S01602 lcm-s02402 Vishay SOT23 MARKING F5

    CON6A

    Abstract: K4T51163QG-HCE60 pDS4102-DL2 LVCMOS33 LVCMOS15 LVCMOS25 PB50B TPE11 PL43A FPGA48
    Text: LatticeEC Standard Evaluation Board – Revision A User’s Guide April 2007 EB07_02.4 Lattice Semiconductor LatticeEC Standard Evaluation Board – Revision A User’s Guide Introduction The LatticeEC Standard Evaluation Board provides a convenient platform to evaluate, test and debug user


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    PDF 120-pin) 32-bit PVG5H503A01 CON6A K4T51163QG-HCE60 pDS4102-DL2 LVCMOS33 LVCMOS15 LVCMOS25 PB50B TPE11 PL43A FPGA48

    LC4064ZE

    Abstract: BSDL Files infineon LFXP6C-3FN256I "x-ray machine" K4H560838E LC4064 LC4256ZE LFXP10C-3F256I LFxP3C-3TN144C PCI x1 express PCB dimensions artwork
    Text: LatticeXP Family Handbook HB1001 Version 03.4, September 2010 LatticeXP Family Handbook Table of Contents September 2010 Section I. LatticeXP Family Data Sheet Introduction Features . 1-1


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    PDF HB1001 TN1050 TN1049 TN1082 TN1074 LC4064ZE BSDL Files infineon LFXP6C-3FN256I "x-ray machine" K4H560838E LC4064 LC4256ZE LFXP10C-3F256I LFxP3C-3TN144C PCI x1 express PCB dimensions artwork

    syscon

    Abstract: LFEC1E-3T100C ips works 6CW3
    Text: LatticeECP/EC Family Data Sheet Version 01.3 LatticeECP/EC Family Data Sheet Introduction November 2004 Preliminary Data Sheet Features − − − − − − • Extensive Density and Package Options • 1.5K to 41K LUT4s • 65 to 576 I/Os • Density migration supported


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    PDF 36x36 18x18 DDR400 200MHz) TN1052) TN1057) TN1053) syscon LFEC1E-3T100C ips works 6CW3

    Untitled

    Abstract: No abstract text available
    Text: LatticeXP Family Data Sheet Version 04.4, April 2006 LatticeXP Family Data Sheet Introduction December 2005 Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL


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    PDF HSTL15 TN1050) TN1052) TN1082)

    Untitled

    Abstract: No abstract text available
    Text: LatticeXP Family Data Sheet Version 03.0, September 2005 LatticeXP Family Data Sheet Introduction July 2005 Advance Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2


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    PDF HSTL15 TN1050) TN1052) TN1082)

    Untitled

    Abstract: No abstract text available
    Text: LatticeECP/EC Family Handbook HB1000 Version 03.7, September 2012 LatticeECP/EC Family Handbook Table of Contents September 2012 Section I. LatticeECP/EC Family Data Sheet Introduction Features . 1-1


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    PDF HB1000 TN1008 TN1010 TN1018 TN1071 TN1074 TN1078

    68hc11kw1

    Abstract: J 9631 A448 M68HC11evm Nippon capacitors
    Text: MC68HC11KW1/D MC68HC11KW1 TECHNICAL DATA Freescale Semiconductor, Inc. Freescale Semiconductor, Inc. HC11 MC68HC11KW1 TECHNICAL DATA !MOTOROLA !MOTOROLA For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. Freescale Semiconductor, Inc.


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    PDF MC68HC11KW1/D MC68HC11KW1 MC68HC11KW1 MC68HC11KW1CPU4 68hc11kw1 J 9631 A448 M68HC11evm Nippon capacitors

    IC TTL 7495 diagram and truth table

    Abstract: BA 5979 S AM 5766 BA 5979 motorola s240 pin diagram of ic 7495 Xilinx counter transistor on 4409 PR25D inverter design using plc
    Text: Data Sheet June 1999 ORCA Series 3C and 3T Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance, cost-effective, 0.35 µm OR3C and 0.3 µm (OR3T) 4-level metal technology, (4- or 5-input look-up table delay of 1.1 ns with -7 speed grade in


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    PDF DS99-087FPGA DS98-163FPGA-01) IC TTL 7495 diagram and truth table BA 5979 S AM 5766 BA 5979 motorola s240 pin diagram of ic 7495 Xilinx counter transistor on 4409 PR25D inverter design using plc

    PT35c transistor

    Abstract: pt35c transistor pt36c me 4946 PBGA PR25D transistor on 4409 307-45 4946 ah lm 458 ic
    Text: Data Addendum March 2002 ORCA OR3LxxxB Series Field-Programmable Gate Arrays Introduction This data addendum refers to the information found in the ORCA® Series 3C and 3T Field-Programmable Gate Arrays Data Sheet. • ■ Features ■ ■ ■ ■ ■ ■


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    PDF 16-bit OR3L165B OR3L225B OR3L165B7PS208I-DB OR3L165B7PS240I-DB OR3L165B7BA352I-DB OR3L165B7BC432I-DB OR3L165B7BM680I-DB OR3L225B7BC432I-DB OR3L225B7BM680I-DB PT35c transistor pt35c transistor pt36c me 4946 PBGA PR25D transistor on 4409 307-45 4946 ah lm 458 ic

    RTL8211E

    Abstract: ISL6258A 88E1116R Marvell 88E1116R ISL6258 RTL8211 L6703 u9701 MCP79-B01 Q7055
    Text: 8 6 7 2 3 4 5 1 CK APPD 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. REV SCHEM,MBP 15"MLB ZONE ECN ENG APPD DESCRIPTION OF CHANGE DATE ? ? ? ? DATE ?


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    PDF ISL10 ISL11 RTL8211E ISL6258A 88E1116R Marvell 88E1116R ISL6258 RTL8211 L6703 u9701 MCP79-B01 Q7055

    LCM-S02002DSR

    Abstract: No abstract text available
    Text:  LatticeECP3 Video Protocol Board – Revision C User’s Guide October 2012 Revision: EB52_01.3  LatticeECP3 Video Protocol Board – Revision C User’s Guide Introduction The LatticeECP3™ FPGA family includes many features for video applications. For example, DisplayPort, SMPTE


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    PDF BLM21AG601SN1D LCM-S02002DSR

    BA 5979 S

    Abstract: or3t806ba352-db 2764 EEPROM BA 5979 BL06 transistor OR3T125 OR3T20 OR3T30 OR3T55 PT10
    Text: Data Sheet November 2006 ORCA Series 3C and 3T Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance, cost-effective, 0.35 m OR3C and 0.3 μm (OR3T) 4-level metal technology, (4- or 5-input look-up table delay of 1.1 ns with -7 speed grade in


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    PDF OR3C804PS208I-DB OR3C804BA352I-DB OR3T206S208I-DB OR3T306S208I-DB OR3T306S240I-DB OR3T306BA256I-DB OR3T556PS208I-DB1 OR3T556S208I-DB OR3T556PS240I-DB OR3T556BA256I-DB BA 5979 S or3t806ba352-db 2764 EEPROM BA 5979 BL06 transistor OR3T125 OR3T20 OR3T30 OR3T55 PT10

    su kam inverter circuits

    Abstract: HC11 M68HC11 MC68HC11 MC68HC11A8 MC68HC11G5 MC68HC11G7 MC68HC711G5
    Text: Freescale Semiconductor, Inc. MC68HC11G5/D TECHNICAL DATA Freescale Semiconductor, Inc. MC68HC11G5 HC11 MC68HC11G5 MC68HC11G7 MC68HC711G5 TECHNICAL DATA For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. Freescale Semiconductor, Inc.


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    PDF MC68HC11G5/D MC68HC11G5 MC68HC11G7 MC68HC711G5 su kam inverter circuits HC11 M68HC11 MC68HC11 MC68HC11A8 MC68HC11G5 MC68HC11G7 MC68HC711G5

    A2ND

    Abstract: AM29116 cjey Amdasm
    Text: 9U6ZUJV Am29116 A High-Performance rmance 16-Bit Bipolar Microprocessor Mi PRELIMINARY DISTINCTIVE CHARACTERISTICS Powerful Field Insertion/Extraction and Bit Ma­ nipulation Instructions Rotate and Merge, Rotate and Compare and bit manipulation instructions provided for complex bit


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    PDF Am29116 16-Bit 100ns time/10MHz 32-Work3) 02112C A2ND cjey Amdasm

    RETS-1212

    Abstract: CI sj 4558 h3 0925 CP2515 16x16 barrel shifter with flipflop Am29C116 C26S vc2545 PH92
    Text: m A m 29C l16/116-1/116-2 16-Bit CMOS Microprocessors > 3 DISTINCTIVE CHARACTERISTICS A m 29C 116 Supports up to 100-ns system cycle time. Less than 1 w att power dissipation and equivalent perform ance to the bipolar Am29116. A m 29C 116-1 Faster, speed-select version of the Am 29C 116 90 ns .


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    PDF Am29Cl16/116-1/116-2 16-Bit Am29C116 100-ns Am29116 Am29C116-1 29C116-2 80-ns RETS-1212 CI sj 4558 h3 0925 CP2515 16x16 barrel shifter with flipflop C26S vc2545 PH92

    Untitled

    Abstract: No abstract text available
    Text: AT&T Data Sheet October 1995 Microelectronics Optimized Reconfigurable Cell Array ORCA 2C Series Field-Programmable Gate Arrays Features Description • High-performance, cost-effective 0.5 |im technology (four-input look-up table delay less than 3.6 ns)


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    PDF ATT2C04, ATT2C06, ATT2C08, ATT2C10, ATT2C12, ATT2C15, ATT2C26, ATT2C40. DS95-183FPGA DS95-031