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    PPD23 Price and Stock

    L-com Inc FXC-SFPPD23ER10G-MSA

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    L-com Inc FXC-SFPPD23ZR10G-EKS

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    L-com Inc FXC-SFPPD23ZR10G-BTI

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    L-com Inc FXC-SFPPD23ZR10G-MSA

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    L-com Inc FXC-SFPPD23ZR10G-ADV

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    PPD23 Datasheets (9)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    PPD-23-1 Data Delay Devices Programmable Pulse Discriminator Scan PDF
    PPD-23-10 Data Delay Devices Programmable Pulse Discriminator Scan PDF
    PPD-23-15 Data Delay Devices Programmable Pulse Discriminator Scan PDF
    PPD-23-2 Data Delay Devices Programmable Pulse Discriminator Scan PDF
    PPD-23-20 Data Delay Devices Programmable Pulse Discriminator Scan PDF
    PPD-23-3 Data Delay Devices Programmable Pulse Discriminator Scan PDF
    PPD-23-40 Data Delay Devices Programmable Pulse Discriminator Scan PDF
    PPD-23-5 Data Delay Devices Programmable Pulse Discriminator Scan PDF
    PPD-23-50 Data Delay Devices Programmable Pulse Discriminator Scan PDF

    PPD23 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    APPLE A6 CHIP

    Abstract: cf325 W07 sot 23 C-492-5 SMD M05 sot23 C4977 cf406 p66 apple c5297 I342
    Text: 8 6 7 PDF CSA CONTENTS IMG5 17" REV E 11/01/05 SYNC MASTER DATE PDF CSA CONTENTS TABLE_TABLEOFCONTENTS_HEAD 2 System Block Diagram FINO-DD 06/20/2005 TABLE_TABLEOFCONTENTS_ITEM 3 4 Power Block Diagram FINO-PC 06/20/2005 5 Table Items FINO-M23 08/26/2005 6


    Original     		PDF RF420 CF414 1/16W RF424 APPLE A6 CHIP cf325 W07 sot 23 C-492-5 SMD M05 sot23 C4977 cf406 p66 apple c5297 I342

    Untitled

    Abstract: No abstract text available
    Text: NEC PPD23C1010A 131,072 x 8-Bit Mask-Programmable CMOS ROM NEC Electronics Inc. Description Pin Configuration The fiPD23Cl010A is a 1,048,576-bit ROM fabricated with CMOS siiicon-gate technology. The device is static in operation and organized as 131,072 words by 8 bits. It


    OCR Scan     		PDF uPD23C1010A fiPD23Cl010A 576-bit 28-pin juPD23Cl010A ---------------------------83IH-6207B

    Untitled

    Abstract: No abstract text available
    Text: Programmable Pulse Discriminator series: PPD23 3 BIT T T L Interfaced Features: • Discriminates against precisely programm ed pulse widths. ■ 3-bit address. ■ 24 pins DIP. ■ Low profile. P W IN In p u t p u ls e w id th PW OUT TP data W P/ devicesYinc.


    OCR Scan     		PDF PPD-23-1 PPD-23-S

    UPD23C4000

    Abstract: C-5a-3 QFP68 upd23c40
    Text: pPD23C4000 4,194,304-Bit Mask-Programmable CMOS ROM Description Pin Configurations The /iPD23C4000 is a 4,194,304-bit ROM fabricated with CMOS silicon-gate technology. The device is static in operation and has three-state outputs, fully TTLcompatible inputs and outputs, and an output enable pin


    OCR Scan     		PDF uPD23C4000 304-Bit /iPD23C4000 nPD23C4000 fxPD23C4000 40-pin O8-O15 JJPD23C4000 C-5a-3 QFP68 upd23c40

    6211a

    Abstract: No abstract text available
    Text: me JUPD23C2001 262,144 X 8-Bit Mask-Programmable CMOS ROM NEC Electronics Inc. Description Pin Configuration The pPD23C2001 is a 262,144-word by 8-bit static ROM fabricated with CMOS silicon-gate technology and designed to operate from a single + 5-volt power supply.


    OCR Scan     		PDF uPD23C2001 32-Pht pPD23C2001 144-word 32-pin JJPD23C2001 6211a

    Untitled

    Abstract: No abstract text available
    Text: pPD23C4000A 4,194,304-Bit Mask-Programmable CMOS ROM NEC NEC Electronics Inc. Description Pin Configuration T h e /JP D 23C 4000A is a 4,194,304-bit ROM fa b ric a te d w ith C M O S silic o n -g a te technology. T h e d e v ic e is s ta tic in o p e ra tio n an d has th re e -s ta te o u tp uts, fu lly T T L c o m p a tib le in puts an d outp uts, an d an o u tp u t e n ab le


    OCR Scan     		PDF pPD23C4000A 304-Bit 304-bit 40-Pin JHPD23C4000A

    Untitled

    Abstract: No abstract text available
    Text: PPD23C1024E 65,536 X 16-Bit Mask-Programmable CMOS ROM NEC NEC Electronics Inc. Description Pin Configuration The jiiPD23C1024E is a 65,536-word by 16-bit maskprogram m able ROM fabricated with CMOS silicon-gate technology and designed to o perate from a single


    OCR Scan     		PDF PPD23C1024E 16-Bit jiiPD23C1024E 536-word 16-bit 600-mil, 40-pin /iPD23C1024E 83IH-6075B

    PPD-23-1

    Abstract: PPD-23-10 PPD-23-15 PPD-23-2 PPD-23-20 PPD-23-3 PPD-23-40 PPD-23-5 PPD-23-50
    Text: data delay devicesYinc. Programmable Pulse Discriminator SER|ES: PPD23 3 BIT T T L Interfaced Features: • D iscrim inates against precisely p ro g ram m ed pulse w idths. ■ 3 -bit address. ■ 2 4 pins DIP. ■ Low profile. PW IN = Input pulse width


    OCR Scan     		PDF PPD23 PPD-23-1 PPD-23-2 PPD-23-3 PPD-23-5 PPD-23-10 PPD-23-15 PPD-23-20 PPD-23-40 PPD-23-50

    NEC 1132

    Abstract: No abstract text available
    Text: iL fT JS * N IL W #iPD23C2001 262,144 X 8-Bit Mask-Programmable CMOS ROM NEC Electronics Inc. Description Pin Configuration The pPD23C2001 is a 262,144-word by 8-bit static ROM fabricated with CMOS sillcon-gate technology and designed to operate from a single + 5-volt power supply.


    OCR Scan     		PDF uPD23C2001 pPD23C2001 144-word 32-pin 32-Pln JHPD23C2001 NEC 1132

    Untitled

    Abstract: No abstract text available
    Text: data delay devices^««. Programmable Pulse Discriminator SER|ES: PPD23 3 BIT T T L Interfaced Features: • Discriminates against precisely programmed pulse widths. ■ 3-bit address. ■ 24 pins DIP. ■ Low profile. PW IN = Input pulse width PW OUT = O utput p u ls e s PW IN - 4 ns


    OCR Scan     		PDF 100TYP, PPD-23-5 PPD-23-10 PPD-23-15 PPD-23-20 PPD-23-40 PPD-23-50 PPD-23-1 PPD-23-2 PPD-23-3

    Untitled

    Abstract: No abstract text available
    Text: fiPD23C8001E 1,048,576 x 8-Bit Mask-Programmable CMOS ROM NEC NEC Electronics Inc. Description Pin Configuration The pPD23C8001E is a 1,084,576-word by 8-bit ROM fabricated with CMOS siiicon-gate technology and designed to operate from a single + 5-volt power


    OCR Scan     		PDF fiPD23C8001E pPD23C8001E 576-word 32-pin JJPD23C8001E

    Untitled

    Abstract: No abstract text available
    Text: data Programmable Pulse delay Discriminator SEB,ES PPD23 Inc. 3 BIT T T L Interfaced Features: • Discrim inates against precisely program m ed pulse widths. ■ 3-bit address. ■ 24 pins DIP. ■ Low profile. PW IN In p u t pu lse w id th PW O U T O u tp u t p u ls e — PW IN


    OCR Scan     		PDF PPD-23-1 PPD-23-2 PPD-23-3 PPD-23-5 PPD-23-10 PPD-23-15 PPD-23-20 PPD-23-40 PPD-23-50

    Untitled

    Abstract: No abstract text available
    Text: Programmable Pulse Discriminator SEBIES: PPD23 3 BIT TTL Interfaced Features: • Discriminates against precisely programmed pulse widths. ■ 3-bit address. ■ 24 pins DIP. ■ Low profile. PW IN Input pulse width PW OUT Output pulse — PW IN - 4 ns TP


    OCR Scan     		PDF PPD-23-1 PPD-23-2 PPD-23-3 PPD-23-5 PPD-23-10 PPD-23-15 PPD-23-20 PPD-23-40 PPD-23-50

    Untitled

    Abstract: No abstract text available
    Text: NEC PPD23C4001E 524,288 X 8-Bit Mask-Programmable CMOS ROM NEC Electronics Inc. Description Pin Configuration The ;tPD23C4001 E is a 524,288-word by 8-bit static ROM fabricated with CMOS silicon-gate technology and designed to operate from a single + 5-volt power supply.


    OCR Scan     		PDF uPD23C4001E tPD23C4001 288-word 600-mil, 32-pin pPD23C4001E

    UPD23C4000

    Abstract: PD23C4000
    Text: JIPD23C4000 4,194,304-Blt Mask-Programmable CMOS ROM NEC NEC Electronics Inc. Description Pin Configurations The pPD23C4000 is a 4,194,304-bit ROM fabricated with CMOS siiicon-gate technology. The device is static in operation and has three-state outputs, fully TTLcompatible Inputs and outputs, and an output enable pin


    OCR Scan     		PDF uPD23C4000 304-Blt 40-Pin pPD23C4000 304-bit JJPD23C4000 PD23C4000

    UPD23C1000E

    Abstract: UPD23C1000
    Text: SEC PPD23C1000EA 131,072 x 8-Bit Mask-Programmable CMOS ROM NEC Electronics Inc. Description Pin Configuration The jiPD23Cl000EA is a 131,072-word by 8-bit static ROM fabricated with CMOS silicon-gate technology. Designed to operate from a single + 5-volt power supply,


    OCR Scan     		PDF uPD23C1000EA jiPD23Cl000EA 072-word 600-mil, 32-pin 32-Pln PD23C1000EA UPD23C1000E UPD23C1000

    oa131

    Abstract: uPD23C1010
    Text: PPD23C1010A 131,072 x 8-Bit Mask-Programmable CMOS ROM NEC NEC Electronics Inc. Description Pin Configuration The ftPD23Cl010A is a 1,048,576-bit ROM fabricated with CMOS siiicon-gate technology. The device is static in operation and organized as 131,072 words by 8 bits. It


    OCR Scan     		PDF uPD23C1010A 28-Pin ftPD23Cl010A 576-bit iPD23C1010A 83IH-6207B oa131 uPD23C1010

    UPD23C1000

    Abstract: NEC 28PIN DIP
    Text: NEC NEC Electronics Inc. pPD23C1000A 131,072 x 8-Bit Mask-Programmable CMOS ROM Description Pin Configuration The jtPD23Cl000A is a 131,072-word by 8-bit static ROM fabricated with CMOS silicon-gate technology and designed to operate from a single + 5-volt power supply.


    OCR Scan     		PDF uPD23C1000A 072-word 28-pin pPD23C1000A JUPD23C1000A UPD23C1000 NEC 28PIN DIP

    D23C200

    Abstract: d23c2001 5volt power supply PD23C2001 C1301
    Text: ffPD23C2001 262,144 X 8-B it Mask-Programmable CMOS ROM SEC NEC Electronics Inc. Description Pin Configuration The pPD23C2001 is a 262,144-word by 8-bit static ROM fabricated with CMOS silicon-gate technology and designed to operate from a single + 5-volt power supply.


    OCR Scan     		PDF uPD23C2001 32-Pin pPD23C2001 144-word JUPD23C2001 D23C200 d23c2001 5volt power supply PD23C2001 C1301

    PPD-23-1

    Abstract: No abstract text available
    Text: data W3\> Programmable Pulse delay W Discriminator SER|ES: PPD23 devices; in c . 3 BIT TTL Interfaced Features: • Discrim inates against precisely program m ed pulse widths. ■ 3-bit address. ■ 24 pins DIP. ■ Low profile. PW IN Input pulse width PW OUT


    OCR Scan     		PDF PPD-23-1 PPD-23-2 PPD-23-3 PPD-23-5 PPD-23-10 PPD-23-15 PPD-23-20 PPD-23-40 PPD-23-50

    upd23c8000

    Abstract: 8000C
    Text: pPD23C8000 8,388,608-Bit Mask-Programmable CMOS ROM SEC NEC Electronics Inc. 42-Pin Plastic DIP 1 42 □ NC 2 41 a 7 c 6 c 3 40 4 39 □ A 10 5 c A4 c 5 38 □ A n 6 37 □ A 12 L 7 36 □ c A 13 8 35 3 . c 9 c 10 c 11 GND 1= 12 Œ /O E /D C c 13 o0 C 14 c:


    OCR Scan     		PDF uPD23C8000 608-Bit 42-Pin JJPD23C8000 8000C

    Mdu 1517

    Abstract: IC 8783 N
    Text: data delay devieesYinc. Table of Contents Page C o m p a n y P r o f i l e .In s id e F ro n t C o v e r D C E le c tric a l C h a r a c t e r is t ic s . P ro d u c t S e l e c t i o n . 1


    OCR Scan     		PDF

    m23a

    Abstract: UPD27C1000A D-20 PD27C1000
    Text: SEC JUPD27C1000A 131,072 X 8-Bit CMOS UV EPROM NEC Electronics Inc. Description Pin Configuration The fiPD27C1000A is a 1,048,576-bit ultraviolet erasable and electrically programmable read-only memory fabri­ cated with double-polysilicon CMOS technology for a


    OCR Scan     		PDF uPD27C1000A 32-Pin fiPD27C1000A 576-bit 3rH-62 JHPD27C1000A fiPD27C1000A JIPD27C1000A m23a D-20 PD27C1000

    upd23c40

    Abstract: No abstract text available
    Text: I N E C ELECTRONICS INC 3ÛE D • b42?S25 00324ñb 1 ■ NECE /JPD23C4001E 524,288 X 8-Bit Mask-Programmable CMOS ROM NEC Electronics Inc. T" W - i s -is" Description Pin Configuration The /¡PD23C4001E is a 524,288-word by 8-bit static ROM fabricated with CMOS siiicon-gate technology and


    OCR Scan     		PDF uPD23C4001E PD23C4001E 288-word 600-mil, 32-pin JHPD23C4001E upd23c40