PM5326 Search Results

1292-Pin

Abstract: PM5326 STS-192 STS-48 STM-64 serdes sfi-4
Contextual Info: PM5326 ARROW 2x192 SONET/SDH Transport Framer/Aggregator for OC-48 and OC-192 FEATURES • Supports channelized down to STS-1 , concatenated, and arbitrarily concatenated (STS-3cxN) traffic. Changes in traffic configurations are automatically detected. • Terminates (or monitors) SONET/SDH

Contextual Info: PM5326 ARROW 2x192 SONET/SDH Transport Framer/Aggregator for OC-48 and OC-192 5: 51 AM Released Product Brief • Provides overhead passthrough for entire TOH, and re-mapping for • Dual SONET/SDH framer/aggregator for use in channelized • • OB Line Side

PM5326

Abstract: 2X19 STS-192 STS-48 SFI-4
Contextual Info: PM5326 ARROW-2x192 Advance, Issue 3 SONET/SDH Transport Framer/Aggregator for OC-48 and OC-192 FEATURES • Dual SONET/SDH framer/aggregator for use in channelized STS-192/STM64 and STS-48/STM-16 applications. • 20 Gbit/s aggregate capacity. Each of the two framers within the device can

Contextual Info: PM5308 TSE 120 Released PM Single Chip 74-Port STS-1/STM-0 Cross-Connect LB_IFP[4:1] rtm LBTE x4 R_P/N [26] R_P/N [27.74] LB_ECLK[4:1] RASIO 3G Rx ESSI Rx RASIO 3G Rx ESSI Rx RASIO 3G Rx ESSI Rx DMI ESSI Tx RASIO 3G Tx ESSI Tx RASIO 3G Tx ESSI Tx RASIO

Contextual Info: PM5369 TUPP 9953 Tributary Unit Payload Processor for 9953 Mbit/s 5: 49 AM Released Product Brief • Provides hardware based Message Assisted Protection Switching :1 Product Highlights • io fI Block Diagram • • 01 2 01 Low Order Processor LOPP Perf. Mon/

SDH ADM

Abstract: PM5324 PM5326 PM5370 PM5377 PM5369 extended sonet serial interface
Contextual Info: PM5369 TUPP 9953 Preliminary Tributary Unit Payload Processor for 9953 Mbit/s FEATURES • Configurable, multi-channel payload processor for aligning SONET virtual tributaries VTs or SDH tributary units (TUs) in an STS-192/STM-64 or STS-48/STM-16 data stream.

CROSS-CONNECT

Abstract: PM5326 PM5397 PM5369 PM5377 PM5389 TU12 WSE20
Contextual Info: PM5389 WSE 20 Released SONET/SDH Wideband Cross-Connect FEATURES GENERAL • Multi-purpose SONET/SDH VT/TU and SONET/SDH STS/STM cross-connect. • With a memory-switch architecture, implements a strictly non-blocking switch that supports a VT/TU level fabric of up to 25 Gbit/s.

RTM 866 - 485

Abstract: PM5326 PMC-2021113 diode 1Y4 bit-slice MPSA reference TILE3 em 262 "Frame rate conversion"
Contextual Info: 4: 40 AM TSE Nx160 ASSP Telecom Standard Product Data Sheet Released ay ,2 2D ec em TSE Nx160 be r, 20 04 12 :3 PM5376 Data Sheet Proprietary and Confidential Released Issue No. 7: July 2004 Do wn l oa de d by C on te n tT ea m of Pa rtm in er In co n W ed

Contextual Info: PM5370 WSE 40 Preliminary SONET/SDH Wideband Cross-Connect FEATURES GENERAL • Multi-purpose SONET/SDH VT/TU and SONET/SDH STS/STM cross-connect. • With a memory-switch architecture, implements a strictly non-blocking switch that supports a VT/TU level

PM5326

Abstract: PM5377 STS192 STS-48
Contextual Info: PM5377 TSE 240 Released Single Chip 96-Port STS-1/STM-0 Cross-Connect FEATURES DELAY MANAGEMENT • Implements a 240G memory switch fabric with STS-1/AU-3 switching granularity. • 96 ingress and 96 egress STS48/STS-12 ports for a maximum of 4608 STS-1/AU-3 streams in a single

PM5326

Abstract: PM5324 PM5377 STS192 STS-48
Contextual Info: PM5377 TSE 240 Advance Single Chip 96 Port SONET/SDH Cross-Connect Switch Element FEATURES TOH PROCESSING AND TESTING • Implements a 240G memory switch fabric with STS-1/AU-3 switching granularity. • 96 ingress and 96 egress STS48/STS-12 ports for a maximum of

PM5326

Abstract: PM5369 TUPP 9953 STM64 STS-192 STS-48 difference between oc48 oc192 PMC DM 100 108byte PM5308
Contextual Info: PM5308 TSE 120 Released AM Single Chip 74-Port STS-1/STM-0 Cross-Connect SWITCH PORT CONFIGURATION TOH PROCESSING AND TESTING LB_ID[4:1][1:0] ico R_P/N [26] ESSI Rx RASIO 3G Rx ESSI Rx RASIO 3G Rx ESSI Rx 52 DMI DMO Memory Switch Core ESSI Tx RASIO 3G Tx ESSI Tx

OC-192/STM-64

Contextual Info: PM5308 TSE 120 Released PM Single Chip 74-Port STS-1/STM-0 Cross-Connect SWITCH PORT CONFIGURATION co LB_IFP[4:1] n LB_ID[4:1][1:0] 17 7: :0 Th BLOCK DIAGRAM LB_ED[4:1][1:0] LBTO x4 LB_EFP[4:1] LBTE (x4) LB_ICLK[4:1] er In LB_ECLK[4:1] R_P/N [26] R_P/N [27.74]

Contextual Info: PM5308 TSE 120 Released AM Single Chip 74-Port STS-1/STM-0 Cross-Connect SWITCH PORT CONFIGURATION LB_ID[4:1][1:0] 37 5: :3 LB_ED[4:1][1:0] LBTO x4 LB_EFP[4:1] LBTE (x4) LB_ECLK[4:1] rtm in LB_ICLK[4:1] er LB_IFP[4:1] of Pa R_P/N [1.25] R_P/N [26] m ea

Contextual Info: PM5308 TSE 120 Released PM Single Chip 74-Port STS-1/STM-0 Cross-Connect TOH PROCESSING AND TESTING co LB_IFP[4:1] of 13 1: :4 LBTO x4 LB_EFP[4:1] LBTE (x4) LB_ICLK[4:1] er In LB_ECLK[4:1] tm in R_P/N [1.25] R_P/N [26] R_P/N [27.74] RASIO 3G Rx ESSI Rx

pmc-2001500

Abstract: GR-253 PM5326 GR-253-CORE PM5317 PM5324 STM-16 STS-48 Forward Error Correction
Contextual Info: PM5395 CRSU-4x2488 Preliminary Quad Clock Recovery and Synthesis Unit for 2488 Mbit/s FEATURES The CRSU-4x2488 is a single chip Clock Recovery and Synthesis Unit supporting four SONET/SDH links operating at 2488.32 Mbit/s. • Processes four independent bit-serial

PM5326

Abstract: SDH ADM PM5369 PM5370 PM5377 TU12 PM5370 WSE 40 PM5329 PM5324 CROSS-CONNECT
Contextual Info: PM5370 WSE 40 SONET/SDH Wideband Cross-Connect Released Product Brief Product Highlights SONET/SDH Overhead Accessibility • Multi-purpose SONET/SDH VT/TU and SONET/SDH STS/STM cross• • • • • • • • connect With a memory-switch architecture, implements a strictly nonblocking switch that supports a VT/TU level fabric of up to

Contextual Info: 2: 22 AM TSE Nx160 ASSP Telecom Standard Product Data Sheet Released Au g es da y, 03 TSE Nx160 us t, 20 04 11 :0 PM5376 Data Sheet Proprietary and Confidential Released Issue No. 7: July 2004 Do wn lo ad ed by Sa nj iv Sh ar m ao fR SB SY ST EM S on Tu BIT SLICED TRANSMISSION SWITCH

Contextual Info: PM5329 ARROW 24xFE Preview 24 Channel 10/100 Ethernet over SONET/SDH Mapping Device FEATURES • Maps up to 24 channels of full-duplex 10/100M Ethernet into 2.488 Mbps SONET/SDH. • Supports multiple encapsulation protocols for worldwide interoperability

PM5326

Abstract: PM5369 PM5370 PM5377 TU12
Contextual Info: PM5370 WSE 40 Preliminary SONET/SDH Wideband Cross-Connect FEATURES GENERAL • Multi-purpose SONET/SDH VT/TU and SONET/SDH STS/STM cross-connect. • With a memory-switch architecture, implements a strictly non-blocking switch that supports a VT/TU level

Contextual Info: PM5308 TSE 120 Released AM Single Chip 74-Port STS-1/STM-0 Cross-Connect TOH PROCESSING AND TESTING rtm LB_IFP[4:1] 51 4: LB_EFP[4:1] LBTE x4 of Pa LB_ECLK[4:1] m R_P/N [1.25] R_P/N [26] R_P/N [27.74] RASIO 3G Rx ESSI Rx RASIO 3G Rx ESSI Rx RASIO 3G Rx

24xFE

Abstract: PM5326 9632 PM5397
Contextual Info: PM5329 ARROW 24xFE Preliminary 24 Channel 10/100 Ethernet over SONET/SDH Mapping Device FEATURES • Maps up to 24 channels of full-duplex 10/100M Ethernet into 2.488 Mbps SONET/SDH. • Supports multiple encapsulation protocols for worldwide interoperability

PM5326

Abstract: PM537 PM5369 PM5370 PM5377 TU12
Contextual Info: PM5370 WSE 40 Released SONET/SDH Wideband Cross-Connect FEATURES GENERAL • Multi-purpose SONET/SDH VT/TU and SONET/SDH STS/STM cross-connect. • With a memory-switch architecture, implements a strictly non-blocking switch that supports a VT/TU level fabric of up to 45 Gbit/s.