PLEXO Search Results

RS-343-A

Abstract: RS-343A BT458
Contextual Info: ADVANCED MICRO DEVICES *ÌL> D È | DSS7S5S 00203^5 1 Am81C81/Am81C82 • 28365 D T-SZ -33 - 09 CMOS Color Palette a ADVANCE INFORMATION > 3 co DISTINCTIVE CHARACTERISTICS Am81C81 On-chip phase-k>d<ed loop eliminates the need for ECL on PC board On-chip video timing generator

HA 12058

Contextual Info: Preliminary Product Specification Z89300 S e r ie s d i g i t a l t e l e v is io n Co n t r o ller s FEATURES AND BENEFITS • Advanced TV controller 1C with sophisticated OnScreen D isplay ca p a b ility and integral VBI data

WD83C690

Abstract: WD83B692 WD83C691
Contextual Info: WD83C690 DESCRIPTION AND APPLICATION 1.0 DESCRIPTION AND APPLICATION The WD83C690 Ethernet LAN Controller ELC is a VLSI device designed to interface with networks such as Ethernet, Cheapernet, and StarLAN. Functionally similar to the National DP8390 device,

ASD-A2-0421

Abstract: DVP28SV11T ASD-CARS0003 ASD-ABEN0005 encoder for PLC DELTA ASD-ABEN0003 34703237XX Delta ac servo motor ASD-ABPW0005 c10602
Contextual Info: iá k fc E L T il DELTA ELECTRONICS, INC. w w w .d e lta .c o m .tw /ln d u s tr la la u to m a tlo n IA B U H e a d q u a r te r s Delta E lectronics, Inc. Tao yuanl 31-1, X ingbang Road, G uishan Industrial Zone, Taoyuan C o unty 33370, Taiwan, R.O.C. TEL: 886-3-362-6301 / FAX: 886 -3-362-726 7

Contextual Info: CS6152 Semiconductor Corporation Low Power T1 Analog Interface Features General Description • Provides Analog T1 Line Interface • Low Power Consumption normally 180 mW • EXPERT Pulse Programmable Pulse-Shaping Line Driver The CS6152 combines the analog transmit and receive

CXD 4191

Abstract: H9925 jd 1803 b 107 jd 1803 data jd 1803 19 B L64032 L6421 SEL620 L64270QC Pal programming 22v10
Contextual Info: L64032 32 x 32-Bit Multiplier-Accumulator The L64032 is a high-speed 32 x 32-bit parallel multiplier-accumulator which provides single precision 32 x 32 and multiple precision (64 x 64) fixed point multiplication and single precision multiplication with accumulation.

K511TB1

Abstract: K500TM133T k176kt1 KM155DA3 K155PE3 K500TM131M K511TB K155A K155Kn7 k589
Contextual Info: M H T E rP A il bH blE MMKPOCXEMbl IN T E G R A T E D M IC R O C IR C U IT S H acT b Part I I klH TETPA Jlb H b lE M M KPOCXEM bl U M O P O Bb lE IN TE G R A T ED D IGITAL M ICRO CIRCU ITS B c n e flC T B M e H e n p e p b iB H o r o c o B e p u u e H C T b o b 3 h h j i

ECL IC NAND

Abstract: PLESSEY CLA
Contextual Info: i A PLESSEY W Sem iconductors ELA 60000 SERIES Supersedes August 1987 Edition ECLGATE ARRAYS The ELA60000 series of ECL gate arrays is a very high performance family of Semi-Custom products based on an advanced 1.5 micron bipolar process. There are three members of the family,

RX 3E

Abstract: RX-3E 8 Radio Corporation of America 252B marking LT 5216 1965-REVISED rca RX- 3E sur 288 SRDL oa 1160
Contextual Info: CORPORATION OF A M E R I C A . ELECTRONIC DATA PROCESSING PROCESSORS @ VU incui inumi RADIO REFERENCE MANUAL R A D I O C O R P O R A T I O N 70-35-601 March 1966 OF A M E R I C A The information contained herein is subject to change without notice. Revisions may be

D2259

Abstract: t35 12h diode
Contextual Info: N a t i o n a l S e m i c o n d u c t o r March 1998 DP83953 RIC2A Repeater Interface Controller with Security Features, Internal Drivers and Integrated Filters General Description • 1 IEEE 802.3 compatible AUI port The DP83953 Repeater Interface Controller with Security

Contextual Info: ^ 7 SGS-THOMSON h7 £ STLC7550 LOW POWER LOW VOLTAGE ANALOG FRONT END PRODUCT PREVIEW • GENERAL PURPOSE SIGNAL PROCESSING ANALOG FRONT END AFE ■ TARGETED FOR V.34bis MODEM AND 56Kbps MODEM APPLICATIONS ■ 16-BIT OVERSAMPLING ZA A/D AND D/A CONVERTERS

intel 8250 UART

Abstract: block diagram of ct scanner P82C605 82C605 82C606 8250 intel uart CHIPS TECHNOLOGIES delay line ms-31 ricoh marking LS245
Contextual Info: CÜHjlF^aÜ P R E L IM IN A R Y 8 2 C 6 0 5 /8 2 C 6 06 CH lPSpak/CH IPSport MULTIFUNCTION CO N TRO LLERS 100% Compatible to IBM" PC, XT and AT Fully compatible to the NS16450 Asynch­ ronous Communications Element, and the Motorola 146818A Real Time Clock

H20R

Abstract: FLIPFLOP SCHEMATIC schematic diagram power supply inverter type 1500 SL254 rs FLIPFLOP SCHEMATIC mdf 24 SIC 850 inverter SL2541 sp97508 PLESSEY CLA
Contextual Info: » JULY 1988 Ä PLESSEY w ' S e m ic o n d u c t o r s , ELA 60000 SERIES Supersedes August 1987 Edition ECL GATE ARRAYS The ELA60000 series of ECL gate arrays is a very high p e rfo rm a n c e fam ily of S e m i-C u s to m products based on an advanced 1.5 micron bipolar

CS6152

Abstract: CS6152A-IP CS6152-IL pulse shaper
Contextual Info: CS6152 Semiconductor Corporation Low Power T1 Analog Interface General Description Features The CS6152 combines the analog transmit and receive line interface functions for T1 system interface in one device. The T1 analog interface operates from a 5 Volt supply, and is transparent to the T1 framing format.

Contextual Info: ispLSI 8840 OE and Internal Tristate Configuration Introduction Internal Tristate Bus This document provides a detailed description of the ispLSI 8840 internal tristate bus and the output enable control configuration. It is assumed that the reader is familiar with the ispLSI 8840 architecture. Refer to the

AXE switch ERICSSON commands

Abstract: Ericsson AXE 10 AXE switch ERICSSON apz 212 33 apz 212 30 byb 501 node b ericsson hardware ericsson msc rnc bsc apz 212 ericsson AXE10
Contextual Info: Openness in AXE Einar Wennmyr In recent years, the term open system has become a catch phrase in the data and telecommunications industries. Open systems are expected to improve time to market and make it easier for operators to introduce new features that will help them to attract and retain their subscribers. As

Contextual Info: STPC CONSUMER PC Compatible Embeded Microprocessor • POWERFUL X86 PROCESSOR ■ 64-BIT BUS ARCHITECTURE ■ 64-BIT DRAM CONTROLLER ■ SVGA GRAPHICS CONTROLLER ■ UMA ARCHITECTURE ■ VIDEO SCALER ■ DIGITAL PAL7NTSC ENCODER ■ VIDEO INPUT PORT ■ CRT CONTROLLER

Contextual Info: SIEMENS ICs for Communications ATM Layer Processor ALP PXB 4350 E Version 1.1 Preliminary Data Sheet 09.98 DS 2 PXB 4350 E Revision History: Current Version: 09.98 Previous Version: Preliminary Data Sheet 08.97 DS 1 Page (in previous Version) Page (in current

z99300

Abstract: tv deflection theory 16x16 rgb led matrix Z89302 Z89303 Z89331 Z89300 16x16 LED Matrix driver 64043 v3 CCD matrix
Contextual Info: P r e l im in a r y P r o d u c t S pec ific a t io n ¿ £ S L O E Z89300 S er ies D ig it a l T e l e v is io n C o n t r o l l e r s FEATURES AND BENEFITS • Advanced TV controller 1C with sophisticated OnScreen Display capability and Integral VBI data

DVP20EX2

Abstract: DVP32ES2 DVP16ES2 DVP24ES2 DVP20EX200R DVP60ES200R DVP-20EX2 DVP32ES200R DVP16ES200R DVP-32ES
Contextual Info: DELTA ELECTRONICS, INC. w w w .d e lta .c o m .tw /ln d u s tr la la u to m a tlo n IA B U H e a d q u a r te r s D e lta E le c tr o n ic s , In c . Taoyuanl 3 1 - 1 , X i n g b a n g R o a d , G u is h a n I n d u s t r ia l Z o n e , T a o y u a n C o u n t y 3 3 3 7 0 , T a iw a n , R .O .C .

HN 554 transistor

Contextual Info: v i / i y j x i y i / i H ig h -S p e e d V id eo M u ltip le x e r/A m p lifie r _Features ♦ 16 0 M H z U n ity G a in B a n d w id th The on b o a rd v id e o a m p lifie r fe a tu re s a 16QMHz um tyga in b a n d w id th . '¿bOV/f.is slew ra te an d d ire c tly d riv e s a

Contextual Info: ^ 7 SG S-THO M SO N h7 £ STLC7550 LOW POWER LOW VOLTAGE ANALOG FRONT END PRELIMINARY DATA • GENERAL PURPOSE SIGNAL PROCESSING ANALOG FRONT END AFE ■ TARGETED FOR V.34bis MODEM AND 56Kbps MODEM APPLICATIONS ■ 16-BIT OVERSAMPLING ZA A/D AND D/A CONVERTERS

MH1SS1

Abstract: MH3SS2 MAF100 MH84 MHB4011 MZK105 MA3005 MH74141 MAA723 MH74188
Contextual Info: INTEGRATED CIRCUITS INTEGRIERTE SCHALTKREISE ANALOG DIGITAL EXPORT IM P O R T KOVO INTEGRATED CIRCUITS INTEGRIERTE SCHALTKREISE 1984-85 C O N T E N T S I N H A L T 1. LINEAR INTEGRATED CIRCUITS LINEARE INTEGRIERTE SCHALTKREISE Integrierte Schaltkreise für U nterhaltungs­

Contextual Info: T h i s p r o d n n l is n n l r o l r . i s e d nnc! TARGET SPECIFICATION 2.5 G B IT 2 X 2 t h f i s p n n l n n h n n s h n r c m nri Sllb| .'f;l 10 c h . u i q c I D U AL C R O SSPO IN T SW ITCH FEATURES • Supports 2.5 Gbit/sec Data Rates • Fully differential for minimum