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    PHYSICAL LAYER INTERFACE Search Results

    PHYSICAL LAYER INTERFACE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TB67S559FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver / Bipolar Type / Vout(V)=50 / Iout(A)=3 / Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S539FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Bipolar Type/Vout(V)=40/Iout(A)=2/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S141AFTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Unipolar Type/Vout(V)=84/Iout(A)=3/Phase Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S149AFTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Unipolar Type/Vout(V)=84/Iout(A)=3/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S549FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Bipolar Type/Vout(V)=40/Iout(A)=1.5/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation

    PHYSICAL LAYER INTERFACE Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    TRANSISTOR 7812 ct

    Abstract: TRANSISTOR 7812 internal block diagram working ALI-25 FMMT2369 LT1054 PMLL4151 TXC-05810 diagram of ic 7941
    Text: CellBus Technical Manual R CellBus Technical Manual and CUBIT Applications Switching and Routing implemented in the CUBIT Physical and Electrical Interconnect using CellBus Physical Layer Physical Layer Physical Layer Physical Layer Cost Effective


    Original     		TXC-05801-TM1 TRANSISTOR 7812 ct TRANSISTOR 7812 internal block diagram working ALI-25 FMMT2369 LT1054 PMLL4151 TXC-05810 diagram of ic 7941 PDF

    maintenance program

    Abstract: physical layer interface UTOPIA Level 3 atm forum
    Text: UTOPIA3 UTOPIA 3 Physical Layer Interface Controller Highlights: PHY Interfaces UTOPIA3 Interface ATM Interfaces • Fully compliant with ATM Forum’s UTOPIA 3 Physical Layer Interface specification • Supports all UTOPIA Physical Layer 3 operation modes


    Original     		150MHz 104MHz maintenance program physical layer interface UTOPIA Level 3 atm forum PDF

    DLR1040

    Abstract: PM5345 PM7321 STS-48 signal path designer the 155.52 mbit/s physical layer interface schematics
    Text: PMC-Sierra, Inc. APPLICATION NOTE PREVIEW INFORMATION THE ATM PHYSICAL LAYER THE ATM PHYSICAL LAYER


    Original     		930410V1 DLR1040 PM5345 PM7321 STS-48 signal path designer the 155.52 mbit/s physical layer interface schematics PDF

    te-5005

    Abstract: TXC oscillator Npi pulse transformer ic 7217 DP83924BVCE tp link schematic TL 722 DP83924A
    Text: DP83924B DP83924B Quad 10 Mb/s Ethernet Physical Layer - 4TPHY Literature Number: SNLS033A DP83924BVCE Quad 10 Mb/s Ethernet Physical Layer - 4TPHY • Programmable MAC Interface supports most standard 7 signal MAC interfaces The DP83924B Quad 10Mbps Ethernet Physical Layer


    Original     		DP83924B DP83924B SNLS033A DP83924BVCE 10Mbps 10BASE-T. te-5005 TXC oscillator Npi pulse transformer ic 7217 tp link schematic TL 722 DP83924A PDF

    TXC oscillator

    Abstract: DP83924BVCE mac 97 ab DP8392 DP83924AVCE DP83924B RXI450 rxc 50 NATIONAL DP83924A
    Text: January 1998 DP83924BVCE Quad 10 Mb/s Ethernet Physical Layer - 4TPHY General Description Features The Quad 10Mbps Ethernet Physical Layer 4TPHY is a 4-Port Twisted Pair PHYsical Layer Transceiver that includes all the circuitry required to interface four Ethernet


    Original     		DP83924BVCE 10Mbps 10BASE-T. 10Base-T control0-180-530 TXC oscillator mac 97 ab DP8392 DP83924AVCE DP83924B RXI450 rxc 50 NATIONAL DP83924A PDF

    lem CTSR

    Abstract: LBC5 cwi 1011
    Text: DP83256,DP83257 DP83256 DP83257 PLAYER+ TM Device (FDDI Physical Layer Controller) Literature Number: SNOS673A October 1994 DP83256 56-AP 57 PLAYER a TM Device (FDDI Physical Layer Controller) The DP83256 56-AP 57 Enhanced Physical Layer Controller (PLAYER a device) implements one complete Physical


    Original     		DP83256 DP83257 DP83257 SNOS673A 56-AP lem CTSR LBC5 cwi 1011 PDF

    cwi 1011

    Abstract: No abstract text available
    Text: October 1994 DP83256 56-AP 57 PLAYER a TM Device FDDI Physical Layer Controller The DP83256 56-AP 57 Enhanced Physical Layer Controller (PLAYER a device) implements one complete Physical Layer (PHY) entity as defined by the Fiber Distributed Data Interface (FDDI) ANSI X3T9 5 standard


    Original     		DP83256 56-AP DP83257VF VUL160A cwi 1011 PDF

    ddr phy

    Abstract: DDR PHY ASIC LSI Rapidchip CW000722 CW761041 g12 DDR lsi CW761030
    Text: RapidReady DDR-1 SDRAM Physical Layer Core CW761041 & CW000722 OVERVIEW FEATURES LSI Logic’s DDR-I physical layer core (PHY core) provides an integrationfriendly physical layer interface between the memory controller logic of the ASIC and the data and address busses of DDR-I SDRAM memory (see Figure1).


    Original     		CW761041 CW000722) CW761041 18-micron CW000722 C20057 ddr phy DDR PHY ASIC LSI Rapidchip g12 DDR lsi CW761030 PDF

    BS-28 POWER TRANSFORMER

    Abstract: 10H11 AUTO100 ethernet transformer centre tap
    Text: DP83840A DP83840A 10/100 Mb/s Ethernet Physical Layer Literature Number: SNLS006A DP83840A 10/100 Mb/s Ethernet Physical Layer Features General Description The DP83840A is a Physical Layer device for Ethernet 10BASE-T and 100BASE-X using category 5 Unshielded,


    Original     		DP83840A DP83840A SNLS006A 10BASE-T 100BASE-X DP83223 BS-28 POWER TRANSFORMER 10H11 AUTO100 ethernet transformer centre tap PDF

    TXC oscillator

    Abstract: DP83924AVCE DP83924B DP83924BVCE DP8392C Npi pulse transformer DP83924A
    Text: DP83924BVCE Quad 10 Mb/s Ethernet Physical Layer - 4TPHY • Programmable MAC Interface supports most standard 7 signal MAC interfaces The DP83924B Quad 10Mbps Ethernet Physical Layer ■ Twisted Pair Transceiver Module 4TPHY is a 4-Port Twisted Pair PHYsical Layer Trans– On-chip filters for transmit outputs


    Original     		DP83924BVCE DP83924B 10Mbps 10BASE-T. 10Base-T is0-180-530 TXC oscillator DP83924AVCE DP83924BVCE DP8392C Npi pulse transformer DP83924A PDF

    color led controler

    Abstract: diode T35 12H DP83924AVCE DP83924B DP83924BVCE DP8392C rxdt-2-5 EQUIVALENT TIMER IC WITH CD 4060 TXC oscillator DP83924A
    Text: DP83924BVCE Quad 10 Mb/s Ethernet Physical Layer - 4TPHY • Programmable MAC Interface supports most standard 7 signal MAC interfaces The DP83924B Quad 10Mbps Ethernet Physical Layer ■ Twisted Pair Transceiver Module 4TPHY is a 4-Port Twisted Pair PHYsical Layer Trans– On-chip filters for transmit outputs


    Original     		DP83924BVCE DP83924B 10Mbps 10BASE-T. 10Base-T is-180-530 color led controler diode T35 12H DP83924AVCE DP83924BVCE DP8392C rxdt-2-5 EQUIVALENT TIMER IC WITH CD 4060 TXC oscillator DP83924A PDF

    te-5005

    Abstract: te5005 ge38 2030ms DP83924A
    Text: DP83924BVCE Quad 10 Mb/s Ethernet Physical Layer - 4TPHY • Programmable MAC Interface supports most standard 7 signal MAC interfaces The DP83924B Quad 10Mbps Ethernet Physical Layer ■ Twisted Pair Transceiver Module 4TPHY is a 4-Port Twisted Pair PHYsical Layer Trans– On-chip filters for transmit outputs


    Original     		DP83924BVCE DP83924B 10Mbps 10BASE-T. 10Base-T VCE100A te-5005 te5005 ge38 2030ms DP83924A PDF

    NE255

    Abstract: 4-bit even parity checker circuit diagram 74 TTL PACKAGE OUTLINES cwi 1011 CTSR error monitor comparator multiplexer parity fiber optic FM Modulator p832 pin diagram of ic 741 state of the art
    Text: October 1994 DP83256 56-AP 57 PLAYER a TM Device FDDI Physical Layer Controller Y General Description The DP83256 56-AP 57 Enhanced Physical Layer Controller (PLAYER a device) implements one complete Physical Layer (PHY) entity as defined by the Fiber Distributed Data


    Original     		DP83256 56-AP NE255 4-bit even parity checker circuit diagram 74 TTL PACKAGE OUTLINES cwi 1011 CTSR error monitor comparator multiplexer parity fiber optic FM Modulator p832 pin diagram of ic 741 state of the art PDF

    Untitled

    Abstract: No abstract text available
    Text: DP83865 DP83865 Gig PHYTER V 10/100/1000 Ethernet Physical Layer Literature Number: SNLS165B DP83865 Gig PHYTER V 10/100/1000 Ethernet Physical Layer General Description The DP83865 is a fully featured Physical Layer transceiver with integrated PMD sublayers to support 10BASE-T,


    Original     		DP83865 DP83865 SNLS165B 10BASE-T, 100BASE-TX 1000BASE-T DP83861 PDF

    P1394

    Abstract: QFP Package drawing 945 MOTHERBOARD CIRCUIT diagram uPD72861 MARK AD9 uPD72850 uPD72870 uPD72871 pamc
    Text: NEW PRODUCTS 4 IEEE1394 PHYSICAL LAYER/OHCI LINK LAYER REALIZED ON 1 CHIP µPD72870/µPD72871 Norihisa Fujioka Introduction This article introduces NEC’s newly developed µPD72870 and µPD72871, which integrate an IEEE1394 interface-compliant physical layer LSI and an Open Host


    Original     		IEEE1394 PD72870/ PD72871 PD72870 PD72871, 1394-I/F P1394 QFP Package drawing 945 MOTHERBOARD CIRCUIT diagram uPD72861 MARK AD9 uPD72850 uPD72870 uPD72871 pamc PDF

    uwb antenna

    Abstract: DSA91304A wireless hdmi 8495D 11667B DSA90804A2 1250-1698 33SMA-Q50-0-4 UWB Forum DSA91204A
    Text: Agilent U7239A MB-OFDM Ultra-wideband UWB Physical Layer Validation and Compliance Software WiMedia-and Wireless USB-based test software for Infiniium Series oscilloscopes Data Sheet Verify the performance of your MB-OFDM physical layer Agilent Technologies U7239A MB-OFDM ultrawideband (UWB) physical layer


    Original     		U7239A MB-OFDM/ECMA-368 5990-3291EN uwb antenna DSA91304A wireless hdmi 8495D 11667B DSA90804A2 1250-1698 33SMA-Q50-0-4 UWB Forum DSA91204A PDF

    Untitled

    Abstract: No abstract text available
    Text: Philips Semiconductors Preliminary specification 3-port physical layer interface 1.0 PDI1394P11A 2.0 FEATURES DESCRIPTION The Philips Sem iconductors PDI1394P11A is an IEEE1394-1995 com pliant Physical Layer interface. The PDI1394P11A provides the analog physical layer functions needed to implement a three port


    OCR Scan     		PDI1394P11A 100Mb/s 1394a PDI1394P11A IEEE1394-1995 PDF

    bel ms

    Abstract: ST D63 DP83924A
    Text: t ß DP83924BVCE Quad 10 Mb/s Ethernet Physical Layer - 4TPHY General Description Programmable MAC Interface supports most standard 7 signal MAC interfaces The DP83924B Quad 10Mbps Ethernet Physical Layer 4TPHY is a 4-Port Twisted Pair PHYsical Layer Trans­


    OCR Scan     		DP83924BVCE DP83924B 10Mbps 10Base-T bel ms ST D63 DP83924A PDF

    DP83924AVCE

    Abstract: DP83924B DP83924BVCE Npi pulse transformer
    Text: July, 1998 Semiconductor 1 * DP83924BVCE Quad 10 Mb/s Ethernet Physical Layer 4TPHY General Description Programmable MAC Interface supports most standard 7 signal MAC interfaces The DP83924B Quad 10Mbps Ethernet Physical Layer 4TPHY is a 4-Port Twisted Pair PHYsical Layer Trans­


    OCR Scan     		DP83924BVCE DP83924B 10Mbps 10BASE-T. 10Base-T DP83924AVCE DP83924BVCE Npi pulse transformer PDF

    6BT80

    Abstract: PDI1394P11 PDI394P11 physical layer interface MAX17515 CT1610
    Text: Philips Semiconductors Preliminary specification 3-Port physical layer interface PDI1394P11 FEATURES DESCRIPTION • 3 cable interface ports The Philips PDI1394P11 is an IEEE1394 com pliant Physical Layer interface. The PDI1394P11 provides an associated Link Layer


    OCR Scan     		PDI1394P11 100Mb/s PDI1394P11 IEEE1394 110fl2b 01102b3 6BT80 PDI394P11 physical layer interface MAX17515 CT1610 PDF

    system functions and objectives for 4-bit synchronization counter

    Abstract: PM4341 PM7321 T1X14
    Text: -an/ir1pM c's,era'inc- r I Y IV * PRELIMINARY INFORMATION PM7321PLPP PHYSICAL LAYER PROTOCOL PROCESSOR FEATURES • Implements the ATM physical layer for Broadband ISDN according to CCITT Recommendation 1.432. • Implements the Physical Layer Convergence Protocol for DS1 and DS3 based


    OCR Scan     		PM7321PLPP TA-TSY-000773 TA-TSY-000772 910812S4 system functions and objectives for 4-bit synchronization counter PM4341 PM7321 T1X14 PDF

    Untitled

    Abstract: No abstract text available
    Text: February 1996 MgLMicro Linear PREUM NAY ^ ML6692 100BASE-TX Physical Layer with Mil GENERAL DESCRIPTION FEATURES The M L6692 implements the complete physical layer of the Fast Ethernet 10OBASE-TX standard. Combined with an external 1OBASE-T physical layer device, the ML6692


    OCR Scan     		ML6692 100BASE-TX L6692 10OBASE-TX 10OMb/s. 10BASE-T L2653, 100Mbps PDF

    t7351

    Abstract: DD231 T7352 T7351B-FC
    Text: Data Sheet January 1994 microelectronics group Lucent Technologies Bell Labs innovations T7351B/T7352 FDDI/TPDDI Physical Layer Devices Features Description • Single-chip FDDI physical layer PHY solution The T7351B FDDI/T7352 TPDDI Physical Layer Devices are single VLSI components that implement


    OCR Scan     		T7351B/T7352 T7352 0D50D2b DG23112 t7351 DD231 T7351B-FC PDF

    Untitled

    Abstract: No abstract text available
    Text: 7 iqot Preliminary Data Sheet May 1993 m A TaT Microelectronics T7351B FDDI Physical Layer Device Features Description • Single-chip FDDI physical layer PHY solution The T7351B FDDI Physical Layer Device is a single VLSI component that implements the complete fiber


    OCR Scan     		T7351B de086 DS93-067LAN PDF