Untitled
Abstract: No abstract text available
Text: LatticeXP2 Family Data Sheet DS1009 Version 2.1, August 2014 LatticeXP2 Family Data Sheet Introduction February 2012 Data Sheet DS1009 Flexible I/O Buffer Features • sysIO™ buffer supports: – LVCMOS 33/25/18/15/12; LVTTL – SSTL 33/25/18 class I, II
|
Original
|
DS1009
DS1009
HSTL15
HSTL18
|
PDF
|
DS1009J
Abstract: 16J3 TN1137 dsp-219 TN1141 LVCMOS25
Text: Aug. 2012 LatticeXP2 データシート LatticeXP2 ファミリ・データシート DS1009J Version 01.8b, August 2012 2012 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders.
|
Original
|
DS1009J
7k10k
TN1139,
TN1144
TN1220
csBGA144
16J3
TN1137
dsp-219
TN1141
LVCMOS25
|
PDF
|
LFXP2-17E-5QN208C
Abstract: lfxp2-5e-5ftn256c lfxp2-5e-5tn144c LFXP2-8E-5FTN256I 16X4 XP2-17 LFXP2-40E LFXP2-5E-6TN144C sequential gearbox LFXP2-8E-5TN144I
Text: LatticeXP2 Family Data Sheet DS1009 Version 01.7, April 2011 LatticeXP2 Family Data Sheet Introduction February 2008 Data Sheet DS1009 Flexible I/O Buffer Features • sysIO™ buffer supports: – LVCMOS 33/25/18/15/12; LVTTL – SSTL 33/25/18 class I, II
|
Original
|
DS1009
DS1009
HSTL15
HSTL18
128eristics
XP2-17
LFXP2-17E-5QN208C
lfxp2-5e-5ftn256c
lfxp2-5e-5tn144c
LFXP2-8E-5FTN256I
16X4
XP2-17
LFXP2-40E
LFXP2-5E-6TN144C
sequential gearbox
LFXP2-8E-5TN144I
|
PDF
|
TN1126
Abstract: XP2-17 TN1139 LVCMOS12 TN1141
Text: DS1009ver1.6-J2 Aug. 2008 LatticeXP2 ファミリ・データシート DS1009 Version 01.6, August 2008 DISCLAIMER Translation of Lattice materials into languages other than English is intended as a convenience for our non-English reading customers. Although we attempt to provide
|
Original
|
DS1009ver1
DS1009
7k10k
TN1126
XP2-17
TN1139
LVCMOS12
TN1141
|
PDF
|
Untitled
Abstract: No abstract text available
Text: LatticeXP2 Family Data Sheet DS1009 Version 02.0, March 2014 LatticeXP2 Family Data Sheet Introduction February 2012 Data Sheet DS1009 Flexible I/O Buffer Features • sysIO™ buffer supports: – LVCMOS 33/25/18/15/12; LVTTL – SSTL 33/25/18 class I, II
|
Original
|
DS1009
DS1009
HSTL15
HSTL18
|
PDF
|
Untitled
Abstract: No abstract text available
Text: LatticeXP2 Family Data Sheet DS1009 Version 01.9, June 2013 LatticeXP2 Family Data Sheet Introduction February 2012 Data Sheet DS1009 Flexible I/O Buffer Features • sysIO™ buffer supports: – LVCMOS 33/25/18/15/12; LVTTL – SSTL 33/25/18 class I, II
|
Original
|
DS1009
DS1009
HSTL15
HSTL18
|
PDF
|
LFXP2-5E-5QN208C
Abstract: lfxp25e5tn144c LFXP2-17E LFXP2-5E LFXP2-8E-7FTN256C 16X4 XP2-17 TN1126 FTBGA 256 16x4 ENCODER
Text: LatticeXP2 Family Data Sheet DS1009 Version 01.6, August 2008 LatticeXP2 Family Data Sheet Introduction February 2008 Data Sheet DS1009 Flexible I/O Buffer Features • sysIO™ buffer supports: – LVCMOS 33/25/18/15/12; LVTTL – SSTL 33/25/18 class I, II
|
Original
|
DS1009
DS1009
HSTL15
HSTL18
XP2-17
LFXP2-5E-5QN208C
lfxp25e5tn144c
LFXP2-17E
LFXP2-5E
LFXP2-8E-7FTN256C
16X4
XP2-17
TN1126
FTBGA 256
16x4 ENCODER
|
PDF
|
Untitled
Abstract: No abstract text available
Text: LatticeXP2 Family Data Sheet DS1009 Version 01.6, August 2008 LatticeXP2 Family Data Sheet Introduction February 2008 Data Sheet DS1009 Flexible I/O Buffer Features • sysIO™ buffer supports: – LVCMOS 33/25/18/15/12; LVTTL – SSTL 33/25/18 class I, II
|
Original
|
DS1009
DS1009
HSTL15
HSTL18
XP2-17
|
PDF
|
LFXP2-17E-5QN208C
Abstract: FTN256 lfxp2-5e LFXP2-5E-5QN208C LFXP2-8E-6FTN256C lfxp2-8E LFXP2-30E-6FTN256C XP2 LFXP2-5E-5QN208C LFXP2-30E-5FTN256I LFXP2-5E-5FTN256C
Text: LatticeXP2 Family Data Sheet DS1009 Version 01.6, August 2008 LatticeXP2 Family Data Sheet Introduction February 2008 Data Sheet DS1009 • Flexible I/O Buffer Features • sysIO™ buffer supports: – LVCMOS 33/25/18/15/12; LVTTL – SSTL 33/25/18 class I, II
|
Original
|
DS1009
DS1009
HSTL15
HSTL18
XP2-17
LFXP2-17E-5QN208C
FTN256
lfxp2-5e
LFXP2-5E-5QN208C
LFXP2-8E-6FTN256C
lfxp2-8E
LFXP2-30E-6FTN256C
XP2 LFXP2-5E-5QN208C
LFXP2-30E-5FTN256I
LFXP2-5E-5FTN256C
|
PDF
|
FTN256
Abstract: LFXP2-30E-5FTN256I LFXP2-8E-6FTN256C LFXP2-17E-5FTN256I LFXP2-8E-5FTN256C FTBGA 256 LFXP2-17E-6FT256I8W LFXP2-17E-7FTN256C LFXP2-5E-6TN144C LFXP2-5E-7FTN256C
Text: LatticeXP2 Family Data Sheet DS1009 Version 01.4, April 2008 LatticeXP2 Family Data Sheet Introduction February 2008 Preliminary Data Sheet DS1009 • Flexible I/O Buffer Features • sysIO™ buffer supports: – LVCMOS 33/25/18/15/12; LVTTL – SSTL 33/25/18 class I, II
|
Original
|
DS1009
DS1009
HSTL15
HSTL18
FTN256
LFXP2-30E-5FTN256I
LFXP2-8E-6FTN256C
LFXP2-17E-5FTN256I
LFXP2-8E-5FTN256C
FTBGA 256
LFXP2-17E-6FT256I8W
LFXP2-17E-7FTN256C
LFXP2-5E-6TN144C
LFXP2-5E-7FTN256C
|
PDF
|
lfxp2
Abstract: TN1137
Text: LatticeXP2 Family Data Sheet DS1009 Version 01.8, January 2012 LatticeXP2 Family Data Sheet Introduction January 2012 Data Sheet DS1009 Flexible I/O Buffer Features • sysIO™ buffer supports: – LVCMOS 33/25/18/15/12; LVTTL – SSTL 33/25/18 class I, II
|
Original
|
DS1009
DS1009
HSTL15
HSTL18
XP2-17
lfxp2
TN1137
|
PDF
|
ISA CODE VHDL
Abstract: 16x4 ram VERILOG IPUG35
Text: LatticeXP2 Family Handbook HB1004 Version 02.3, January 2009 LatticeXP2 Family Handbook Table of Contents January 2009 Section I. LatticeXP2 Family Data Sheet Introduction Features . 1-1
|
Original
|
HB1004
TN1130
TN1141
TN1143,
ISA CODE VHDL
16x4 ram VERILOG
IPUG35
|
PDF
|
LFXP2-5E-5QN208C
Abstract: ld33 LFXP2-5E-5M132C XP2 LFXP2-5E-5QN208C LD33 F LFXP2-5E lfxp2-8E lattice xp2 LFXP2-8E-5QN208C IPUG35
Text: LatticeXP2 Family Handbook HB1004 Version 02.4, May 2009 LatticeXP2 Family Handbook Table of Contents May 2009 Section I. LatticeXP2 Family Data Sheet Introduction Features . 1-1
|
Original
|
HB1004
TN1130
TN1136
TN1137
TN1138
TN1141
LFXP2-5E-5QN208C
ld33
LFXP2-5E-5M132C
XP2 LFXP2-5E-5QN208C
LD33 F
LFXP2-5E
lfxp2-8E
lattice xp2
LFXP2-8E-5QN208C
IPUG35
|
PDF
|
LFXP2_8E_5FT256C
Abstract: ld33 LD33 V LD33 e LD41 lfxp2-8E LFXP2-8E-6FT256C verilog code for correlator LVCMOS25 3 tap fir filter based on mac vhdl code
Text: LatticeXP2 Family Handbook HB1004 Version 02.5, February 2010 LatticeXP2 Family Handbook Table of Contents February 2010 Section I. LatticeXP2 Family Data Sheet Introduction Features . 1-1
|
Original
|
HB1004
TN1126
TN1130
TN1136
TN1138
TN1141
LFXP2_8E_5FT256C
ld33
LD33 V
LD33 e
LD41
lfxp2-8E
LFXP2-8E-6FT256C
verilog code for correlator
LVCMOS25
3 tap fir filter based on mac vhdl code
|
PDF
|
|
|
lfxp2-40e
Abstract: LVCMOS25 LD48 LFXP2-17E-5FTN256C HB1004 ispLEVER project Navigator route place LFXP2-5E-5QN IPUG35 LFXP2-8E
Text: LatticeXP2 Family Handbook HB1004 Version 02.9, May 2011 LatticeXP2 Family Handbook Table of Contents May 2011 Section I. LatticeXP2 Family Data Sheet Introduction Features . 1-1
|
Original
|
HB1004
TN1144
TN1220.
TN1143
lfxp2-40e
LVCMOS25
LD48
LFXP2-17E-5FTN256C
ispLEVER project Navigator route place
LFXP2-5E-5QN
IPUG35
LFXP2-8E
|
PDF
|
dqs detect
Abstract: verilog code pipeline ripple carry adder PLC programming toshiba t1 lattice xp2-5e DOB80
Text: LatticeXP2 Family Handbook HB1004 Version 03.2, January 2012 LatticeXP2 Family Handbook Table of Contents January 2012 Section I. LatticeXP2 Family Data Sheet Introduction Features . 1-1
|
Original
|
HB1004
TN1136
TN1138
TN1141
TN1137
dqs detect
verilog code pipeline ripple carry adder
PLC programming toshiba t1
lattice xp2-5e
DOB80
|
PDF
|
IPUG35
Abstract: No abstract text available
Text: LatticeXP2 Family Handbook HB1004 Version 03.1, July 2011 LatticeXP2 Family Handbook Table of Contents July 2011 Section I. LatticeXP2 Family Data Sheet Introduction Features . 1-1
|
Original
|
HB1004
TN1136
TN1138
TN1141
TN1137
IPUG35
|
PDF
|
tn1037
Abstract: verilog code for lvds driver 8772 P OR4E02 OR4E06 ORLI10G ORT82G5 plc array 399-798
Text: ORCA Series 4 Fast DDR Interface October 2002 Technical Note TN1037 Introduction This document will specify the capabilities of the ORCA series 4 I/O logic. Specifically, Double Data Rate DDR interface schemes with clock forwarding. Single-ended I/O standards, such as XGMII, and speed capabilities up to
|
Original
|
TN1037
311MHz
350MHz
OR4E04-680
ORT82G5,
1-800-LATTICE
tn1037
verilog code for lvds driver
8772 P
OR4E02
OR4E06
ORLI10G
ORT82G5
plc array
399-798
|
PDF
|
marking PGW
Abstract: SMDJ series DO214AB SMDJ10 SMDJ10A SMDJ11 SMDJ11A SMDJ12 SMDJ170 SMDJ170CA
Text: MDE Semiconductor, Inc. 78-150 Calle Tampico, Unit 210 La Quinta, CA. U.S.A. 92253 Tel: 760-564-8656 • Fax: 760-564-2414 SMDJ SERIES SURFACE MOUNT TRANSIENT VOLTAGE SUPPRESSOR VOLTAGE-5.0 TO 170 Volts 3000 Watt Peak Pulse Power FEATURES • For surface mounted applications in order to
|
Original
|
10volts
marking PGW
SMDJ series
DO214AB
SMDJ10
SMDJ10A
SMDJ11
SMDJ11A
SMDJ12
SMDJ170
SMDJ170CA
|
PDF
|
Untitled
Abstract: No abstract text available
Text: LatticeSC Family Data Sheet DS1004 Version 01.5, March 2007 LatticeSC Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks
|
Original
|
DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
LFSC25
FF1020
LFSC80
|
PDF
|
Untitled
Abstract: No abstract text available
Text: LatticeSC Family Data Sheet DS1004 Version 01.5, March 2007 LatticeSC Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks
|
Original
|
DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
LFSC25
FF1020
LFSC80
|
PDF
|
MARKING PFG
Abstract: SMDJ60A marking PDX marking code pfk DO214AB SMDJ75 SMDJ10 SMDJ10A SMDJ11 SMDJ11A
Text: MDE Semiconductor, Inc. 78-150 Calle Tampico, Unit 210, La Quinta, CA. U.S.A. 92253 Tel: 760-564-8656 • Fax: 760-564-2414 SMDJ SERIES SURFACE MOUNT TRANSIENT VOLTAGE SUPPRESSOR VOLTAGE-5.0 TO 170 Volts 3000 Watt Peak Pulse Power FEATURES • For surface mounted applications in order to
|
Original
|
10volts
MARKING PFG
SMDJ60A
marking PDX
marking code pfk
DO214AB
SMDJ75
SMDJ10
SMDJ10A
SMDJ11
SMDJ11A
|
PDF
|
SMLJ10A
Abstract: SMLJ11A marking PGW DO214AB SMLJ10 SMLJ11 SMLJ170 SMLJ170CA marking PDX marking code pfk
Text: MDE Semiconductor, Inc. 78-150 Calle Tampico, Unit 210, La Quinta, CA. U.S.A. 92253 Tel: 760-564-8656 • Fax: 760-564-2414 SMLJ SERIES SURFACE MOUNT TRANSIENT VOLTAGE SUPPRESSOR VOLTAGE-5.0 TO 170 Volts 3000 Watt Peak Pulse Power FEATURES • For surface mounted applications in order to
|
Original
|
10volts
SMLJ10A
SMLJ11A
marking PGW
DO214AB
SMLJ10
SMLJ11
SMLJ170
SMLJ170CA
marking PDX
marking code pfk
|
PDF
|
T3168
Abstract: ATT ORCA fpga gc 5.5V .22f 207 525s ATT1C05 op3120 D1313 oa259 ATT ORCA fpga architecture OA154
Text: T i T HELEC I t4E D C • DuSGOPti 001G23D 3fi2 ■ A T T E AT&T Advance Data Sheet February 1993 M icroelectronics Optimized Reconfigurable Cell Array (ORCA) Series Field-Programmable Gate Arrays Features The PLCs and PICs also contain routing resources
|
OCR Scan
|
QDS002fci
16-bit
84-Pln
132-Pin
208-Pin
240-Pin
304-PJn
225-Pm
280-Pin
364-Pin
T3168
ATT ORCA fpga
gc 5.5V .22f
207 525s
ATT1C05
op3120
D1313
oa259
ATT ORCA fpga architecture
OA154
|
PDF
|