P0U1031 Search Results

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Catalog Datasheet	MFG & Type	PDF	Document Tags
at powersupply schematic Abstract: LMH0040 P0D30 C1649 Text: 1 2 3 4 5 6 VDD33_5 VDD25_5 P0R1102 SMBus U1 GND J2 C 5 P0U105 RSVD 30 P0U1030 RESET/ 6 P0U106 DVB_ASI 9 P0U109 GND 31 P0U1031 LOCK/ 10P0U1010 GND 34 P0U1034 SMB_CS 3 P0U103 GPIO0 4 P0U104 GPIO1 11 P0U1011 GPIO2 8 P0U108 GND 29P0U1029 GND 13P0U1013 GND 2 P0U102	Original	PDF	P0R1102 P0U105 P0U1030 P0U106 P0U109 P0U1031 10P0U1010 P0U1034 P0U103 P0U104 at powersupply schematic LMH0040 P0D30 C1649
LFB215G78SG8A170 Abstract: 022-uF P0C3302 ML5805 P0S101 0.22UF R2381 P0C3301 P0C2202 Text: RSSI C1 AOUT P0C101P0C102 DOUT GND 31 S1 FMS2031-001 RFMD 27 C10 0.22uF P0C1002 P0C1001 C13 0.22uF P0C1302 P0C1301 C11 1.2pF P0C1401 P0C1402 VCC C12 2.0uF C14 1.2pF C27 1 2 P0S102 P0S103 3 E1 GND GND C30 GND 1.2pF GND C34 1.2pF 2.0 uF GND 220pF P0R701 P0C3901	Original	PDF	P0C101P0C102 FMS2031-001 P0C1001 P0C1002 P0C1302 P0C1301 P0C1401 P0C1402 P0S102 P0S103 LFB215G78SG8A170 022-uF P0C3302 ML5805 P0S101 0.22UF R2381 P0C3301 P0C2202
Untitled Abstract: No abstract text available Text: XRP9710EVB-DEMO-1 Dual Output Digital PWM/PFM Demo Board Programmable Power Management System December 2013 Rev. 1.0.0 GENERAL DESCRIPTION EVALUATION BOARD MANUAL The XRP779710EVB-DEMO-1 board is a complete, two channel power system. The default configuration provides 1.8V and 2.5V	Original	PDF	XRP9710EVB-DEMO-1 XRP779710EVB-DEMO-1
SIR474 Abstract: grm32er7ya106ka XRP7724 Text: XRP7720/7724/7725EVB-DEMO-1 Quad Channel Digital PWM/PFM Demo Board Programmable Power Management System January 2014 GENERAL DESCRIPTION The XRP7720/7724/7725EVB-DEMO-1 board is a complete, four channel, power system. It provides 3.3V, 2.5V 1.5V and 1V at a	Original	PDF	XRP7720/7724/7725EVB-DEMO-1 XRP7720/7724/7725EVB-DEMO-1 SIR474 grm32er7ya106ka XRP7724
MB91F465P Abstract: 680r P0C62 PPG24 PIN76 r40a Text: 1 2 3 4 5 6 7 8 J5A DB7 DB6 DB5 DB4 Pin[1.176] J3 P0J1029 P0J1030 P0J1031 P0J1032 P0J1033 P0J1034 P0J1035 P0J1036 P0J1037 P0J1038 P0J1039 P0J1040 P0J1041 P0J1042 P0J1043 P0J1044 CON44 J2 C P0J202 P0J203 P0J204 P0J205 P0J206 P0J207 P0J208 P0J209 P0J2010 P0J2011	Original	PDF	P0J1029 P0J1030 P0J1031 P0J1032 P0J1033 P0J1034 P0J1035 P0J1036 P0J1037 P0J1038 MB91F465P 680r P0C62 PPG24 PIN76 r40a
lcd color monitor p15-1 Abstract: R40B PPG30 PPG26 r40a mb91f465 p0c69 RC41C P0C3302 P0D2202 Text: 1 2 3 4 5 6 7 8 J5A DB7 DB6 DB5 DB4 Pin[1.176] J3 P0J1029 P0J1030 P0J1031 P0J1032 P0J1033 P0J1034 P0J1035 P0J1036 P0J1037 P0J1038 P0J1039 P0J1040 P0J1041 P0J1042 P0J1043 P0J1044 CON44 J2 C P0J202 P0J203 P0J204 P0J205 P0J206 P0J207 P0J208 P0J209 P0J2010 P0J2011	Original	PDF	P0J1029 P0J1030 P0J1031 P0J1032 P0J1033 P0J1034 P0J1035 P0J1036 P0J1037 P0J1038 lcd color monitor p15-1 R40B PPG30 PPG26 r40a mb91f465 p0c69 RC41C P0C3302 P0D2202
J34-J35 Abstract: B 342 Dc ml2020 panasonic battery capasitor QFN40P500X500X80-40N LP3971 ml2020 HEADER 8 PIN OSC-SMT DVM panel Text: 1.0 Design Description The LP3971 Smart Power Board provides a complete, multirail solution for FPGAs, Microprocessors, or any other systems requiring multiple voltages, special power sequencing, and boot management. This solution utilizes the National Semiconductor LP3971 Power Management Unit and an 8 bit	Original	PDF	LP3971 RS-232 CSP-9-111S2) CSP-9-111S2. LP3971 J34-J35 B 342 Dc ml2020 panasonic battery capasitor QFN40P500X500X80-40N ml2020 HEADER 8 PIN OSC-SMT DVM panel
VDD33 Abstract: P0C2102 VDD25 N0FPGA0VDD2505 Text: 2 3 R5 P0R3302 0.1uF P0D40A C16 LED D4 3.3V PowerSupply 10uF Ceramic 0805 VDD25_5 N0FPGA0VDD2505 FPGA_VDD25_5 C17 0.1uF P0C1702 P0C1701 LED C15 VDD25_5 P0R602 P0C1602 P0C1601 P0R3202 C14 D3 P0R601 P0C1502 P0C1501 R32 P0R3201 2.2K R33 P0R3301 2.2K 2.2K 2.2K	Original	PDF	P0R3302 P0D40A N0FPGA0VDD2505 P0C1702 P0C1701 P0R602 P0C1602 P0C1601 P0R3202 P0R601 VDD33 P0C2102 VDD25 N0FPGA0VDD2505
HEADER-20X2 Abstract: HEADER20x2 142-0711-821 miniSMDC020 atmel 9942 P0X102 REF1TOP Text: P0X10201 P0X101 P0X10202 X1 G2 P0C301 P0R302 P0U1017 P0U108 P0U1018 P0U1019 P0U107 P0U106 P0U1020 P0U105 P0U1033 P0U1021 P0U104 P0U1022 P0U103 P0C201 P0U1023 P0U1024 P0U102 P0U101 P0B101 P0B106 P0B102 P0B105 P0B103 P0B104 B1 P0C102 P0C202 C1 P0C101C2 U1 RF1	Original	PDF	P0X10201 P0X101 P0X10202 P0C301 P0R302 P0U1017 P0U108 P0U1018 P0U107 P0U1019 HEADER-20X2 HEADER20x2 142-0711-821 miniSMDC020 atmel 9942 P0X102 REF1TOP
EP2S60F672I3 Abstract: CB3LV-3C-50M0000-T CTX283LVCT-ND IRLML2502TRPBF BGA100P26X26-672 1N4148W-TP m21 sot23 transistor SOD-123 a19 osc_50mhz 1588 switch Text: National Semiconductor DP83849I Richard Levin March 2007 1.0 Design Specifications Description Parameter Value Support for IEEE 1588 version 1 and version 2 transparent E2E and P2P clock sequencing - Full Featured 10/100Mbps Ethernet MACs compliant with the IEEE802.3-2002	Original	PDF	DP83849I 10/100Mbps IEEE802 32-bit IEEE1588 CSP-9-111S2) CSP-9-111S2. EP2S60F672I3 CB3LV-3C-50M0000-T CTX283LVCT-ND IRLML2502TRPBF BGA100P26X26-672 1N4148W-TP m21 sot23 transistor SOD-123 a19 osc_50mhz 1588 switch