OUT11B Search Results

8051 opcode

Abstract: AN2131QC cypress ez-usb AN2131QC interrupt 8051 AN2135 8051 examples AN2131, datasheet AN2131Q AN2135SC 8051
Contextual Info: EZ-USB Technical Reference Manual Cypress Semiconductor 3901 North First Street San Jose, CA 95134 Tel.: 800 858-1810 (toll-free in the U.S.) (408) 943-2600 www.cypress.com Cypress Disclaimer Agreement The information in this document is subject to change without notice and should not be construed as a commitment by Cypress Semiconductor Corporation Incorporated. While

40 pin lvds converter

Abstract: ADCLK854 cmos fan-out ADCLK854BCPZ JESD51-2 OUT10A CP-48-6 39 pin lvds converter
Contextual Info: 1.8 V, 12-LVDS/24-CMOS Output, Low Power Clock Fanout Buffer ADCLK854 FEATURES FUNCTIONAL BLOCK DIAGRAM 2 selectable differential inputs Selectable LVDS/CMOS outputs Up to 12 LVDS 1.2 GHz or 24 CMOS (250 MHz) outputs <12 mW per channel (100 MHz operation)

Contextual Info: APPLICATIONS Low jitter, low phase noise clock distribution Clock generation and translation for SONET, 10Ge, 10G FC, and other 10 Gbps protocols Forward error correction G.710 Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs High performance wireless transceivers

ic74lvc541apw

Abstract: INDL0805 CNHEC0470-01-630 AD9522 HC49SD R92 vs R94 R5562
Contextual Info: 1 2 3 4 REVISIONS SOME TERMINATION COMPONENTS ARE OPTIONAL ONLY. REFER TO BOM S FOR TYPICALCOMPONENT INSTALLATION INFORMATION. OUT1 C6 VS C56 .1UF C58 .1UF C59 .1UF C67 .1UF .1UF C65 C75 C70 .1UF A C14 0.1UF .1UF .1UF R80 C5 .1UF INITIAL RELEASE R83 C92 200

tda 7840

Abstract: tda 7830 tda 7852 TDA 7851 A tda 7833 tda 7851 tda 7836 TDA 7848 IC 7809 pin diagram tda 7834
Contextual Info: 4601/603/61 CY7C64601/603/613 CY7C64601/603/613 EZ-USB FX USB Microcontroller Data Sheet Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 January 11, 2001 CY7C64601/603/613 TABLE OF CONTENTS 1.0 INTRODUCTION . 3

CP-64-4

Contextual Info: APPLICATIONS Low jitter, low phase noise clock distribution Clock generation and translation for SONET, 10Ge, 10G FC, and other 10 Gbps protocols Forward error correction G.710 Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs High performance wireless transceivers

din 867

Abstract: TPS65520
Contextual Info: TPS65520 www.ti.com SLVS557A – MARCH 2005 – REVISED JUNE 2005 POWER MANAGEMENT IC FOR DIGITAL STILL CAMERA FEATURES APPLICATIONS • • • • • • • • • • • Highly Efficient, 8-Channel Power Management IC Fully Integrated Power MOSFETs

Gore LVDS Cable

Abstract: IEC 1754-7 LVDS 51 connector F109 HZ0805E601R LVDS out connector 26 pin LVDS output connector 26 pin
Contextual Info: TM nLIGHTEN PARALLEL FIBER OPTIC DATA LINK W . L . G O R E & A S S O C I A T E S , I N C . • E L E C T R O N I C P R O D U C T S D I V I S I O N Executive Summary W. L. Gore & Associates, Inc. is completing the development of a versatile family of multichannel optical transmitters and receivers targeted at intrasystem and short reach inter-system high data rate communication links.

Contextual Info: TPS65520A www.ti.com SLVS657 – JUNE 2006 POWER MANAGEMENT IC FOR DIGITAL STILL CAMERA FEATURES APPLICATIONS • • • • • • • • • • • Highly Efficient, 8-Channel Power Management IC Fully Integrated Power MOSFETs Except CH-7 Minimal External Components

TPS65520

Contextual Info: TPS65520 www.ti.com SLVS557A – MARCH 2005 – REVISED JUNE 2005 POWER MANAGEMENT IC FOR DIGITAL STILL CAMERA FEATURES APPLICATIONS • • • • • • • • • • • Highly Efficient, 8-Channel Power Management IC Fully Integrated Power MOSFETs

TPS65520

Abstract: CH748 JESD22-A114 CHN 455
Contextual Info: TPS65520 www.ti.com SLVS557A – MARCH 2005 – REVISED MARCH 2005 POWER MANAGEMENT IC FOR DIGITAL STILL CAMERA FEATURES APPLICATIONS • • • • • • • • • • • Highly Efficient, 8-Channel Power Management IC Fully Integrated Power MOSFETs

10UF

Abstract: C3602 q5b15 12R09
Contextual Info: 8 6 7 2 3 4 5 1 REVISIONS REV OUT2 R07 R12 CLK1B GND GND 50 OHMS .1UF VEE VCC Q11B Q10B Q9B Q8B VCC Q11 Q10 Q9 Q8 VCC VCC VEE VEE R8 1 2 1 100 GND 1 1 1 GND R48 R47 R46 .1UF .1UF C40 .1UF C39 .1UF C37 .1UF C35 .1UF C34 OUT5B 50 OHMS 10UF 10UF C5 1 2 OUT7 GND

CY7C64603-80NC

Abstract: cy7c64613-52nc anchor CY7C64601-52NC CY7C64603-128NC CY7C64603-52NC CY7C64613-128NC CY7C64613-52NC CY7C64613-80NC ANCHOR CHIPS LA 7840 DIAGRAM
Contextual Info: EZ-USB FX Technical Reference Manual • Cypress Semiconductor • Interface Products Division • • 15050 Avenue of Science • Suite 200 • San Diego, CA 92128 • Cypress Disclaimer Agreement The information in this document is subject to change without notice and should not be construed as a commitment by Cypress Semiconductor Corporation Incorporated. While

Sine Wave Generator stp 2740

Contextual Info: FUNCTIONAL BLOCK DIAGRAM APPLICATIONS Low jitter, low phase noise clock distribution Clock generation and translation for SONET, 10Ge, 10G FC, and other 10 Gbps protocols Forward error correction G.710 Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs

Contextual Info: Data Sheet 12 LVPECL/24 CMOS Output Clock Generator with Integrated 1.6 GHz VCO AD9520-4 FUNCTIONAL BLOCK DIAGRAM APPLICATIONS Low jitter, low phase noise clock distribution Clock generation and translation for SONET, 10Ge, 10GFC, Synchronous Ethernet, OTU2/3/4

Contextual Info: TPS65520 www.ti.com SLVS557A – MARCH 2005 – REVISED JUNE 2005 POWER MANAGEMENT IC FOR DIGITAL STILL CAMERA FEATURES APPLICATIONS • • • • • • • • • • • Highly Efficient, 8-Channel Power Management IC Fully Integrated Power MOSFETs

Contextual Info: Data Sheet 12 LVPECL/24 CMOS Output Clock Generator with Integrated 2.8 GHz VCO AD9520-0 FUNCTIONAL BLOCK DIAGRAM APPLICATIONS Low jitter, low phase noise clock distribution Clock generation and translation for SONET, 10Ge, 10GFC, Synchronous Ethernet, OTU2/3/4

tda 7852

Abstract: TDA 7804 Pin Diagrams 7809 ua 7809 tda 7833 tda 7840 tda 7851 L iso 7812 N80A pin out of 7812
Contextual Info: CY7C64613 EZ-USB FX USB Microcontroller Cypress Semiconductor Corporation Document #: 38-08005 Rev. *B • 3901 North First Street • San Jose, CA 95134 • 408-943-2600 Revised April 22, 2003 CY7C64613 TABLE OF CONTENTS 1.0 FEATURES . 4

Contextual Info: TPS65520A www.ti.com SLVS657 – JUNE 2006 POWER MANAGEMENT IC FOR DIGITAL STILL CAMERA FEATURES APPLICATIONS • • • • • • • • • • • Highly Efficient, 8-Channel Power Management IC Fully Integrated Power MOSFETs Except CH-7 Minimal External Components

tda 7833

Abstract: tda 7852 TDA 7845 tda 7836 TDA 7848 tda 7837 tda 7835 TDA 7838 tda 7834 tda 7851
Contextual Info: 03/61 CY7C64601/603/613 PRELIMINARY CY7C64601/603/613 EZ-USB FX USB Microcontroller Data Sheet Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 April 7, 2000 PRELIMINARY CY7C64601/603/613 TABLE OF CONTENTS

TD6 THERMISTOR

Abstract: k 3366 57 CH8 A1 4A 3G Telephony
Contextual Info: TPS65520 www.ti.com SLVS557A – MARCH 2005 – REVISED JUNE 2005 POWER MANAGEMENT IC FOR DIGITAL STILL CAMERA FEATURES APPLICATIONS • • • • • • • • • • • Highly Efficient, 8-Channel Power Management IC Fully Integrated Power MOSFETs

tda 7840

Abstract: tda 7852 ua 7809 784B OUT14BCL tda 7833 tda 7851 CY3671 tda 7851 L TDA 7851 A
Contextual Info: THIS SPEC IS OBSOLETE Spec No: 38-08005 Spec Title: CY7C64613 EZ USB FX TM USB MICROCONTROLLER Sunset Owner: Keith Klepin (KKU) Replaced by: None CY7C64613 EZ-USB FX USB Microcontroller Cypress Semiconductor Corporation Document #: 38-08005 Rev. *C •

Contextual Info: 12 LVPECL/24 CMOS Output Clock Generator AD9520-5 FUNCTIONAL BLOCK DIAGRAM FEATURES APPLICATIONS Low jitter, low phase noise clock distribution Clock generation and translation for SONET, 10Ge, 10G FC, and other 10 Gbps protocols Forward error correction G.710

Contextual Info: 12 LVPECL/24 CMOS Output Clock Generator with Integrated 2 GHz VCO AD9520-3 FUNCTIONAL BLOCK DIAGRAM APPLICATIONS Low jitter, low phase noise clock distribution Clock generation and translation for SONET, 10Ge, 10G FC, and other 10 Gbps protocols Forward error correction G.710