NS PACKAGE NUMBER VJD100A Search Results

NS PACKAGE NUMBER VJD100A Result Highlights (5)

Part	Manufacturer	Description
TPH9R00CQH	Toshiba Electronic Devices & Storage Corporation	MOSFET, N-ch, 150 V, 64 A, 0.009 Ohm@10V, SOP Advance / SOP Advance(N)
TPH9R00CQ5	Toshiba Electronic Devices & Storage Corporation	N-ch MOSFET, 150 V, 64 A, 0.009 Ω@10 V, High-speed diode, SOP Advance / SOP Advance(N)
TPH1R306PL	Toshiba Electronic Devices & Storage Corporation	N-ch MOSFET, 60 V, 100 A, 0.00134 Ω@10 V, SOP Advance / SOP Advance(N)
TPHR8504PL	Toshiba Electronic Devices & Storage Corporation	N-ch MOSFET, 40 V, 150 A, 0.00085 Ω@10 V, SOP Advance / SOP Advance(N)
TPHR7404PU	Toshiba Electronic Devices & Storage Corporation	N-ch MOSFET, 40 V, 0.00074 Ω@10V, SOP Advance, U-MOSⅨ-H

NS PACKAGE NUMBER VJD100A Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
VBH48A Abstract: VPC176A PQFP 176 pqfp144 VQZ120A PLASTIC FLAT PACKAGE VBG48A VEF44A VEJ44A VGB52A Contextual Info: Plastic Quad Flat Package PQFP 32 Lead Molded Plastic Quad Flat Package NS Package Number VBE32A 2000 National Semiconductor Corporation MS101167 www.national.com Plastic Quad Flat Package (PQFP) May 1999 Plastic Quad Flat Package (PQFP) 44 Lead (10mm x 10mm) Molded Plastic Quad Flat Package, EIAJ	Original	VBE32A MS101167 VEF44A VEJ44A VEK44A VGZ44A VBH48A VPC176A PQFP 176 pqfp144 VQZ120A PLASTIC FLAT PACKAGE VBG48A VEF44A VEJ44A VGB52A	PDF
Contextual Info: DS90CR483 / DS90CR484 48-Bit LVDS Channel Link Serializer/Deserializer General Description The DS90CR483 transmitter converts 48 bits of CMOS/TTL data into eight LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in	Original	DS90CR483/DS90CR484 48-Bit DS90CR483 DS90CR484 112MHz, 672Mbps 112MHz	PDF
Contextual Info: DS90CR486 www.ti.com SNLS149C – FEBRUARY 2003 – REVISED MARCH 2013 DS90CR486 133MHz 48-Bit Channel Link Deserializer 6.384 Gbps Check for Samples: DS90CR486 FEATURES 1 • • • • • • 2 • • • • • Up to 6.384 Gbps Throughput 66MHz to 133MHz Input Clock Support	Original	DS90CR486 SNLS149C DS90CR486 133MHz 48-Bit 66MHz 100-pin	PDF
Contextual Info: DS90CR486 www.ti.com SNLS149C – FEBRUARY 2003 – REVISED MARCH 2013 DS90CR486 133MHz 48-Bit Channel Link Deserializer 6.384 Gbps Check for Samples: DS90CR486 FEATURES 1 • • • • • • 2 • • • • • Up to 6.384 Gbps Throughput 66MHz to 133MHz Input Clock Support	Original	DS90CR486 SNLS149C DS90CR486 133MHz 48-Bit 66MHz 133MHz 100-pin	PDF
Contextual Info: DS90CR486 www.ti.com SNLS149C – FEBRUARY 2003 – REVISED MARCH 2013 DS90CR486 133MHz 48-Bit Channel Link Deserializer 6.384 Gbps Check for Samples: DS90CR486 FEATURES 1 • • • • • • 2 • • • • • Up to 6.384 Gbps Throughput 66MHz to 133MHz Input Clock Support	Original	DS90CR486 SNLS149C DS90CR486 133MHz 48-Bit 66MHz 133MHz 100-pin	PDF
Contextual Info: DS90CR486 www.ti.com SNLS149C – FEBRUARY 2003 – REVISED MARCH 2013 DS90CR486 133MHz 48-Bit Channel Link Deserializer 6.384 Gbps Check for Samples: DS90CR486 FEATURES 1 • • • • • • 2 • • • • • Up to 6.384 Gbps Throughput 66MHz to 133MHz Input Clock Support	Original	DS90CR486 SNLS149C DS90CR486 133MHz 48-Bit 66MHz 133MHz 100-pin	PDF
AN-1163 Abstract: to112MHz Contextual Info: November 2000 DS90C387/DS90CF388 Dual Pixel LVDS Display Interface LDI -SVGA/QXGA General Description Features The DS90C387/DS90CF388 transmitter/receiver pair is designed to support dual pixel data transmission between Host and Flat Panel Display up to QXGA resolutions. The transmitter converts 48 bits (Dual Pixel 24-bit color) of CMOS/TTL	Original	DS90C387/DS90CF388 24-bit 112MHz, 672Mbps, 38Gbps 14-Sep- 18-Feb- 5-Dec-2000] AN-1163 to112MHz	PDF
marking G15 Contextual Info: July 2000 DS90C387/DS90CF388 Dual Pixel LVDS Display Interface LDI -SVGA/QXGA General Description The DS90C387/DS90CF388 transmitter/receiver pair is designed to support dual pixel data transmission between Host and Flat Panel Display up to QXGA resolutions. The transmitter converts 48 bits (Dual Pixel 24-bit color) of CMOS/TTL	Original	DS90C387/DS90CF388 24-bit 112MHz, 672Mbps, 38Gbps AN-1163: 2-Sep-2000] 14-Sep- marking G15	PDF
Contextual Info: DS90CR483 / DS90CR484 48-Bit LVDS Channel Link Serializer/Deserializer General Description The DS90CR483 transmitter converts 48 bits of CMOS/TTL data into eight LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in	Original	DS90CR483/DS90CR484 48-Bit DS90CR483 DS90CR484 112MHz, 672Mbps 112MHz	PDF
100L Abstract: DS90CR483 DS90CR483VJD DS90CR484 DS90CR484VJD VJD100A Contextual Info: DS90CR483 / DS90CR484 48-Bit LVDS Channel Link SER/DES — 33 - 112 MHz General Description The DS90CR483 transmitter converts 48 bits of CMOS/TTL data into eight LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in	Original	DS90CR483 DS90CR484 48-Bit DS90CR484 112MHz, 672Mbps 112MHz 38Gbit/s 672Mbytes/s) 100L DS90CR483VJD DS90CR484VJD VJD100A	PDF
Contextual Info: DS90CR483A, DS90CR484A www.ti.com SNLS291A – APRIL 2008 – REVISED APRIL 2013 DS90CR483A / DS90CR484A 48-Bit LVDS Channel Link SER/DES – 33 - 112 MHz Check for Samples: DS90CR483A, DS90CR484A FEATURES 1 • • • 2 • • • • • • • • •	Original	DS90CR483A, DS90CR484A SNLS291A DS90CR483A DS90CR484A 48-Bit	PDF
Contextual Info: DS90CR483A, DS90CR484A www.ti.com SNLS291A – APRIL 2008 – REVISED APRIL 2013 DS90CR483A / DS90CR484A 48-Bit LVDS Channel Link SER/DES – 33 - 112 MHz Check for Samples: DS90CR483A, DS90CR484A FEATURES 1 • • • 2 • • • • • • • • •	Original	DS90CR483A, DS90CR484A SNLS291A DS90CR483A DS90CR484A 48-Bit ANSI/TIA/EIA-644-1995	PDF
Contextual Info: DS90C387, DS90CF388 www.ti.com SNLS012H – MAY 2000 – REVISED APRIL 2013 DS90C387, DS90CF388 Dual Pixel LVDS Display Interface LDI -SVGA/QXGA Check for Samples: DS90C387, DS90CF388 FEATURES DESCRIPTION • The DS90C387/DS90CF388 transmitter/receiver pair	Original	DS90C387, DS90CF388 SNLS012H DS90CF388 DS90C387/DS90CF388 24-bit 112MHz,	PDF
Contextual Info: DS90C387, DS90CF388 www.ti.com SNLS012H – MAY 2000 – REVISED APRIL 2013 DS90C387, DS90CF388 Dual Pixel LVDS Display Interface LDI -SVGA/QXGA Check for Samples: DS90C387, DS90CF388 FEATURES DESCRIPTION • The DS90C387/DS90CF388 transmitter/receiver pair	Original	DS90C387, DS90CF388 SNLS012H DS90CF388 112/170MHz 112MHz	PDF

SNLS012H Contextual Info: DS90C387, DS90CF388 www.ti.com SNLS012H – MAY 2000 – REVISED APRIL 2013 DS90C387, DS90CF388 Dual Pixel LVDS Display Interface LDI -SVGA/QXGA Check for Samples: DS90C387, DS90CF388 FEATURES DESCRIPTION • The DS90C387/DS90CF388 transmitter/receiver pair	Original	DS90C387, DS90CF388 SNLS012H DS90CF388 DS90C387/DS90CF388 24-bit 112MHz, SNLS012H	PDF
DS90CR483 Abstract: DS90CR484 Contextual Info: DS90CR483 / DS90CR484 48-Bit LVDS Channel Link Serializer/Deserializer General Description The DS90CR483 transmitter converts 48 bits of CMOS/TTL data into eight LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in	Original	DS90CR483 DS90CR484 48-Bit DS90CR484 112MHz, 672Mbps 112MHz 38Gbit/s 672Mbytes/s)	PDF
DS90CR483 Abstract: DS90CR484 LVDS out connector cable 20 pins Contextual Info: June 1999 DS90CR483 / DS90CR484 48-Bit LVDS Channel Link Serializer/Deserializer General Description The DS90CR483 transmitter converts 48 bits of CMOS/TTL data into eight LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in	Original	DS90CR483 DS90CR484 48-Bit DS90CR484 112MHz, 672Mbps 112MHz 38Gbit/s 672Mbytes/s) LVDS out connector cable 20 pins	PDF
notebook flat cable connector lvds 30 pin Abstract: AN-1059 DS90C387 DS90C387A DS90CF384A DS90CF388 DS90CF388A Contextual Info: DS90C387A/DS90CF388A Dual Pixel LVDS Display Interface / FPD-Link General Description The DS90C387A/DS90CF388A transmitter/receiver pair is designed to support dual pixel data transmission between Host and Flat Panel Display up to QXGA resolutions. The transmitter converts 48 bits Dual Pixel 24-bit color of	Original	DS90C387A/DS90CF388A DS90C387A/DS90CF388A 24-bit 112MHz, 784Mbps, CSP-9-111S2. notebook flat cable connector lvds 30 pin AN-1059 DS90C387 DS90C387A DS90CF384A DS90CF388 DS90CF388A	PDF
MDR 26 pin MINI D ribbon Abstract: lvds 40 pin pinout pin connection lvds cable MDR 20 pin MINI D ribbon MDR 26 pin lvds connector 40 pin LVDS 30 pin connector cable cable tie LVDS connector 26 pin LVDS connector 40 pins Contextual Info: DS90CR483A / DS90CR484A 48-Bit LVDS Channel Link SER/DES – 33 - 112 MHz General Description The DS90CR483A transmitter converts 48 bits of CMOS/TTL data into eight LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a ninth LVDS link. Every cycle	Original	DS90CR483A DS90CR484A 48-Bit DS90CR484A 112MHz, 672Mbps 112MHz 38Gbit/s 672Mbytes/s) MDR 26 pin MINI D ribbon lvds 40 pin pinout pin connection lvds cable MDR 20 pin MINI D ribbon MDR 26 pin lvds connector 40 pin LVDS 30 pin connector cable cable tie LVDS connector 26 pin LVDS connector 40 pins	PDF
AN-1059 Abstract: DS90C387 DS90C387A DS90CF384A DS90CF388 DS90CF388A Contextual Info: DS90C387A/DS90CF388A Dual Pixel LVDS Display Interface / FPD-Link General Description The DS90C387A/DS90CF388A transmitter/receiver pair is designed to support dual pixel data transmission between Host and Flat Panel Display up to QXGA resolutions. The transmitter converts 48 bits Dual Pixel 24-bit color of	Original	DS90C387A/DS90CF388A DS90C387A/DS90CF388A 24-bit 112MHz, 784Mbps, AN-1059 DS90C387 DS90C387A DS90CF384A DS90CF388 DS90CF388A	PDF
HSYNC, VSYNC, DE Abstract: AN-1059 DS90C387 DS90C387A DS90CF384A DS90CF388 DS90CF388A 101-32016 101-32013 CMOS QXGA Contextual Info: DS90C387A/DS90CF388A Dual Pixel LVDS Display Interface / FPD-Link General Description The DS90C387A/DS90CF388A transmitter/receiver pair is designed to support dual pixel data transmission between Host and Flat Panel Display up to QXGA resolutions. The transmitter converts 48 bits Dual Pixel 24-bit color of	Original	DS90C387A/DS90CF388A DS90C387A/DS90CF388A 24-bit 112MHz, 784Mbps, CSP-9-111S2. HSYNC, VSYNC, DE AN-1059 DS90C387 DS90C387A DS90CF384A DS90CF388 DS90CF388A 101-32016 101-32013 CMOS QXGA	PDF
DS90CR483 Abstract: DS90CR484 Contextual Info: DS90CR483 / DS90CR484 48-Bit LVDS Channel Link Serializer/Deserializer General Description The DS90CR483 transmitter converts 48 bits of CMOS/TTL data into eight LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in	Original	DS90CR483 DS90CR484 48-Bit DS90CR484 112MHz, 672Mbps 112MHz 38Gbit/s 672Mbytes/s)	PDF
LVDS 8BIT Tx. 2002 DIGITAL VIEW LTD Contextual Info: DS90CR483 / DS90CR484 48-Bit LVDS Channel Link Serializer/Deserializer General Description The DS90CR483 transmitter converts 48 bits of CMOS/TTL data into eight LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in	Original	DS90CR483/DS90CR484 48-Bit DS90CR483 DS90CR484 112MHz, 672Mbps 112MHz LVDS 8BIT Tx. 2002 DIGITAL VIEW LTD	PDF
dual pixel lvds Abstract: CMOS QXGA Contextual Info: DS90C387A,DS90CF388A DS90C387A/DS90CF388A Dual Pixel LVDS Display Interface / FPD-Link Literature Number: SNLS065D DS90C387A/DS90CF388A Dual Pixel LVDS Display Interface / FPD-Link General Description The DS90C387A/DS90CF388A transmitter/receiver pair is designed to support dual pixel data transmission between	Original	DS90C387A DS90CF388A DS90C387A/DS90CF388A SNLS065D 24-bit 112MHz, 784Mbps, dual pixel lvds CMOS QXGA	PDF

NS PACKAGE NUMBER VJD100A Search Results

NS PACKAGE NUMBER VJD100A Result Highlights (5)

NS PACKAGE NUMBER VJD100A Datasheets Context Search

VBH48A

AN-1163

marking G15

100L

SNLS012H

DS90CR483

DS90CR483

notebook flat cable connector lvds 30 pin

MDR 26 pin MINI D ribbon

AN-1059

HSYNC, VSYNC, DE

DS90CR483

LVDS 8BIT Tx. 2002 DIGITAL VIEW LTD

dual pixel lvds