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NPB1 Price and Stock
Sumida Corporation UU9LFNP-B103CMC 10MH 200MA 2LN TH |
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Mean Well NPB-120-48AD1BATT CHRGR DESKTOP 42V-60.8V 2A |
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Mean Well NPB-120-24XLRBATT CHRGR DESKTOP 21V-30.4V 4A |
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Mean Well NPB-120-12AD1BATT CHG DESKTOP 10.5V15.2V |
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Mean Well NPB-120-48XLRBATT CHRGR DESKTOP 42V-60.8V 2A |
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NPB1 Datasheets (1)
Part | ECAD Model | Manufacturer | Description | Curated | Datasheet Type | |
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NPB-101 |
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SENSOR ALTIMETER I2C 8-HCLGA | Original |
NPB1 Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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8a5cContextual Info: I íiPB100484 4,096 X 4-Bit 100 K ECL ra m NEC Electronics Inc. Description Pin Configurations The nPB100484 is a very high-speed 100K interface ECL RAM organized as 4,096 words by 4 bits with openemitter outputs noninverted . It is available in 28-pin cerdip or flatpack packages. |
OCR Scan |
uPB100484 nPB100484 28-pin 096-word PB100484 83IH-5948B 8a5c | |
Contextual Info: {JPB100474E 1024 X 4-Bit 100K E C L RAM NEC Electronics Inc. Description Pin Configurations The /nPB100474E is a very-high-speed 100K interface ECL RAM organized as 1024 words by 4 bits and designed with noninverted, open-emitter outputs and low power consumption. |
OCR Scan |
JPB100474E /nPB100474E 24-Pin iPB100474E 1024-word fjPB100474E PB100474E 83IH4144B pPB100474E | |
ISO10173
Abstract: aui rj45 NPB1FC1865NPB1 G723.1 acelp DA128 fxs 100 10 ISO8877 lrx2030
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EW4100 EW4100 64Kbps EW4100VoIP EW4150 ISO10173 aui rj45 NPB1FC1865NPB1 G723.1 acelp DA128 fxs 100 10 ISO8877 lrx2030 | |
Contextual Info: PRELIMINARY Integrated Circuit Systems, Inc. ICS843002-31 700MHZ FEMTOCLOCKS VCXO BASED FREQUENCY TRANSLATOR AND JITTER ATTENUATOR GENERAL DESCRIPTION FEATURES The ICS843002-31 is a member of the HiperClockS™ family of high performance clock HiPerClockS™ |
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ICS843002-31 700MHZ 700MHz 13-bit 560MHz 843002CY-31 | |
Z-44 MOSFET
Abstract: mosfet z-44 mosfet Z-44 datasheet VHDL audio codec yu 153 PL110 z-44 C-15 Mictor pinout CT926 Future scope of UART using Verilog
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0216B Z-44 MOSFET mosfet z-44 mosfet Z-44 datasheet VHDL audio codec yu 153 PL110 z-44 C-15 Mictor pinout CT926 Future scope of UART using Verilog | |
CERAMIC FLATPACK 20pin
Abstract: W468
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uPB100480 20-Pin /I/PB100480 fPB100480 300-mil, 384-word /iPB100480 63IH-W468 CERAMIC FLATPACK 20pin W468 | |
63IH-S947BContextual Info: NEC NEC Electronics Inc. pPB10484 4,096 X 4-Bit 10K ECL RAM Description Pin Configurations The /JPB10484 is a very high-speed 10K interface ECL RAM organized as 4,096 words by 4 bits and designed with noninverted, open-emitter outputs and low power consumption. Two versions with access times of 10 |
OCR Scan |
uPB10484 PB10484 400-mil, 28-pin pPB10484 -6169A 096-word pPB10484 63IH-S947B | |
TGCL-153P
Abstract: ADPD703HW4
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CRD1615A-8W CS1615A CRD1615A-8W CS1615A 250mA CS1615. A19-type, 108VAC TGCL-153P ADPD703HW4 | |
Contextual Info: SEC JUPB10476LL 1024 x 4-Bit 10K ECL Synchronous RAM NEC Electronics Inc. Preliminary Information Description Pin Configuration The//PB10476LL is a very-high-speed 10K interface ECL RAM organized as 1024 words by 4 bits and designed with noninverted, open-em itter outputs and low power |
OCR Scan |
uPB10476LL 28-Pin jiPB10476LL The//PB10476LL 1024-woes: pPB10476LL JUPB10476LL fiPB10476LL | |
IH-5972BContextual Info: /XPB100422 256 X 4-Bit 100K ECL RAM J C /W NEC Electronics Inc. Description Pin Configurations The /iPB100422 is a very high-speed 100K interface ECL RAM organized as 256 words by 4 bits and designed with noninverted, open-emitter outputs and low power con |
OCR Scan |
uPB100422 256x4-Bit /iPB100422 24-pin 256-word 400-mil, pPB100422 IH-5972B | |
ICS843002-31
Abstract: ITU-R601
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ICS843002-31 700MHZ ICS843002-31 843002CY-31 ITU-R601 | |
Contextual Info: PRELIMINARY ICS843002-31 FEMTOCLOCKS VCXO BASED FREQUENCY TRANSLATOR/JITTER ATTENUATOR GENERAL DESCRIPTION FEATURES The ICS843002-31 is a member of the ICS HiperClockS™ family of high performance clock HiPerClockS™ solutions from IDT. This monolithic device is a highperfor mance, PLL-based synchronous clock |
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ICS843002-31 ICS843002-31 199707558G | |
Contextual Info: NEC pPB10480 16,384 X 1-Bit 10K ECL RAM NEC Electronics Inc. Description Pin Configurations The ^PB10480 is a very high-speed 10K interface EC L RAM organized as 16,384 words by 1 bit and designed with noninverted, open-emitter outputs and low power consum ption. Two versions with fast access tim es of |
OCR Scan |
uPB10480 PB10480 300-mil, 20-pin 384-word pPB10480 | |
345 attenuator
Abstract: C.E.L.P 24 v VCXO 17,5 MHZ VCXO 27MHZ ICS843002-31 ITU-R601 10-250Hz
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ICS843002-31 ICS843002-31 199707558G 345 attenuator C.E.L.P 24 v VCXO 17,5 MHZ VCXO 27MHZ ITU-R601 10-250Hz | |
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ICS843002-31
Abstract: ITU-R601 s83002
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ICS843002-31 ICS843002-31 199707558G ITU-R601 s83002 | |
transistor cross reference
Abstract: MPT3N40 Westinghouse SCR handbook LT 8224 ZENER DIODE sje389 N9602N npn transistor RCA 467 TFK 7 segment displays PUT 2N6027 delco 466
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ITU-R601
Abstract: ICS843002-31 154t1
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ICS843002-31 700MHZ ICS843002-31 843002BY-31 ITU-R601 154t1 | |
Contextual Info: PRELIMINARY ICS843002-31 FEMTOCLOCKS VCXO BASED FREQUENCY TRANSLATOR/JITTER ATTENUATOR GENERAL DESCRIPTION FEATURES The ICS843002-31 is a member of the ICS HiperClockS™ family of high performance clock HiPerClockS™ solutions from IDT. This monolithic device is a highperfor mance, PLL-based synchronous clock |
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ICS843002-31 ICS843002-31 199707558G | |
transistor C3866
Abstract: Zener PH SEC E13009 ups circuit schematic diagram 1000w E13007 2 E13007 C3866 power transistor texas ttl 74L505 Transistor C3246
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Contextual Info: Ik A J G Y * jiPB10484A 4,096 X 4-BIT 10K ECL RAM NEC Electronics Inc. Description Pin Configurations The fiPBl0484A is a very high-speed 10K interface ECL RAM. It is organized as 4,096 words by 4 bits and designed with noninverted, open-emitter outputs and |
OCR Scan |
jiPB10484A fiPBl0484A tPB10484A 400-mil, 28-pin 28-pin 096-word | |
Contextual Info: DATA SHEET PRELIMINARY Integrated ICS843002-31 700MHZ FEMTOCLOCKS VCXO BASED FREQUENCYICS843002-31 Circuit 700MH Z FEMTOCLOCKS™ VCXO BASED TRANSLATORSystems, ANDInc. JITTER ATTENUATOR FREQUENCY TRANSLATOR AND JITTER ATTENUATOR GENERAL DESCRIPTION FEATURES |
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ICS843002-31 700MHZ 700MH 700MHz 13-bit 560MHz 199707558G | |
TQFP-EPAD-64
Abstract: tqfp 64 pcb land pattern 4051N ICS843002BY-31
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ICS843002-31 20MHz 13document TQFP-EPAD-64 tqfp 64 pcb land pattern 4051N ICS843002BY-31 | |
Contextual Info: NEC /iPB100484A 4,096 X 4-BIT 100K ECL RAM NEC Electronics Inc. Description Pin Configurations The ¿¿PB100484A is a very high-speed 100K interface ECL RAM. It is organized as 4,096 words by 4 bits with noninverted, open-emitter outputs and low power con |
OCR Scan |
uPB100484A 28-Pin PB100484A 00484A 400-mil, 096-word MPB100484A pPB100484A |