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NCACHE Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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AXP 188 ba
Abstract: 21071-DA 2mb1100 AXP 188 IC 5188b RSAD 5111 1M 21071-BA 82378IB 21071AA d327c
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21071-AA, 1072-A 128-bit cache/64-bit 21072-AA: cache/128-bit 32-bit parity/32-bit 21072-AA AXP 188 ba 21071-DA 2mb1100 AXP 188 IC 5188b RSAD 5111 1M 21071-BA 82378IB 21071AA d327c | |
R3051
Abstract: R3001
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IDT79R3051/3051E/3052/3052E IDT79R3051 79R3051â 79R3051E 79R3052â 79R3052E R3720/21/22 84-pin 79R3051 3051E R3051 R3001 | |
Contextual Info: i:WNp J READ INTERFACE CHAPTER 8 d t I n t e g r a t e d D € v iz e T e c h n o lo g y , l i e . INTRODUCTION The R3041 read protocol h a s b een designed to interface to a wide variety of m em ory a n d I/O devices. P articu lar care h a s b e e n ta k e n in th e definition of |
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R3041 | |
Contextual Info: MB86833 SPARCIite SERIES 32-BIT RISC EMBEDDED PROCESSOR FUJITSU DATASHEET MARCH 1998 FEATURES Programmable address decoder and wait-state genera tor Single vector trapping • 66 M Hz CPU with on-chip clock multiplier 0.35 micron gate, 2-level metal CMOS technology, |
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MB86833 32-BIT B86833 MB8683X FPT-144P-M08) 144-LEAD | |
R3000-TContextual Info: i :Sï¥NN^ | IDT79R3071 IDT79R3071E IDT79R3071 RISController™ d t In tegrated Devize T echnology, Inc. FEATURES Large on-chip caches with user configurability — 16kB Instruction Cache, 4kB Data Cache — Dynamically configurable to 8kB Instruction |
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IDT79R3071TM IDT79R3071 IDT79R3071E 84-pin R3000-T | |
eerl
Abstract: ym oca QQ11
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0D112fa7 IDT79R3081 79R3081TM, 79R3081E 79R3081L, 79R3081LE R301OA 84-Pln 84-Pin 79R3081 eerl ym oca QQ11 | |
C 5271 manualContextual Info: QED RISCMark RM5271™ 64-Bit Superscalar Microprocessor FEATURES: • Dual Issue su p e rsca la r m icro p ro ce sso r - can issue one integer and one floa ting -point in stru ction pe r cycle — 200, 225, 250, 266 M H z op era ting frequ en cies — 345 D hrystone, 2.1 M IP S m axim um |
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RM5271TM 64-Bit R4600, R4700 R5000 10OOMBps 64-bitm DS-5271, C 5271 manual | |
21064A-200
Abstract: 21064A-233 21064A-275 21064A-275-PC 21064A-300 pfn 109 06f irf 4110 M23VDD gh11
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1064A N0301 N0107 N0567 21064A-200 21064A-233 21064A-275 21064A-275-PC 21064A-300 pfn 109 06f irf 4110 M23VDD gh11 | |
AMD K6Contextual Info: Preliminary Information AMDB AMD-K6-2E Embedded Processor Data Sheet Publication # 22529 Issue Date: Jan 2000 Rev: B Amendment/0 2000 Advanced Micro Devices, Inc. All rights reserved. T h e c o n te n ts of th is d o c u m e n t a r e p ro v id e d in co n n e c tio n w ith A d v a n c e d M icro |
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AMD-K6-2E/350AFR 321-pin AMD-K6-2E/333AFR AMD-K6-2E/300AFR AMD-K6-2E/266AFR AMD-K6-2E/233AFR AMD K6 | |
82C801
Abstract: 486DLC/IBM opti 486 chipset
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82C802GP 80486SX, 486DX, 50MHz 33MHz 82C801 486DLC/IBM opti 486 chipset | |
MN871107
Abstract: 04A05 MN5520A
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MN5520A MN5521 MN871107 MN5520A 486SX/DX/ 04A05 | |
9042h
Abstract: DRB102
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SLC90E42 SLC90E42 64Mbit 9042h DRB102 | |
supersparc
Abstract: HY 1021A Sun STP1021 3AR3 cap 220 htz ADA33
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STP1021A STP1020N, STP1020 STP1021) cl277 data12 STP1021APGA-85 STP1021APGA-75 supersparc HY 1021A Sun STP1021 3AR3 cap 220 htz ADA33 | |
0257S2Contextual Info: AMD-K6-III Processor Data Sheet AMD Z\ D i 02575E5 QDLBE72 41fl B 1999 Advanced Micro Devices, Inc. A ll rig h ts reserv ed . The contents of this docum ent are provided in connection w ith A dvanced Micro D evices, Inc. "AMD" products. AMD m akes no representations or w arranties w ith |
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02575E5 QDLBE72 D257525 21918B/0-October 00bfl5li7 0257S2 | |
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MIPS R3051Contextual Info: Integrated Device Technology, Inc. Single, double-frequency clock input 16.67MHz, 20MHz, 25MHz and 33MHz operation 20MIPS at 25MHz Low cost 84-pin PLCC packaging On-chip 4-deep write buffer eliminates memory write stalls On-chip 4-word read buffer supports burst or simple block |
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67MHz, 20MHz, 25MHz 33MHz 20MIPS 25MHz 84-pin 24-bit 16-bit, 32-bit MIPS R3051 | |
Contextual Info: 6. ELECTRICAL SPECIFICATIONS Thermal forced is condition: In terms of air cooling is resumed. required under pertinent temperature Forced air, the worst conditions. characteristics, of at least 1.5m/s, This ma y depend on the conditions. Ab s o l u t e maximum ratings |
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Contextual Info: SLC90E42 ADVANCE INFORMATION STANDARD MICROSYSTEMS CORPORATION SLC90E42 NorthBridge Member of High Performance TeXas Chipset FEATURES 324 Pin BGA North Bridge Chip Supports the Pentium C om patible Processor with Host Bus from 60 MHz to 75 MHz at 3.3V and |
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SLC90E42 SLC90E42 | |
5650300
Abstract: XXXW
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RM5231TM 64-Bit DS-5231, 5650300 XXXW | |
RM5260Contextual Info: QED RISCMark RM5260™ 64-Bit Superscalar Microprocessor FEATURES: • Dual Issue su p e rsca la r m icro p ro ce sso r - can issue one integer and one floa ting -point in stru ction pe r cycle — 133, 150, 175 and 200 M Hz opera ting fre q u e n cy — 260 Dhrystone2.1 M IPS |
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RM5260TM 64-Bit R4600, R4700 R5000 S-5260, RM5260 | |
40XX
Abstract: V4700TM
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64-BIT IDT79R V4700TM 200MHz 40XX V4700TM | |
21071-AA
Abstract: ysd 2-11 invr 054
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21071-AA, 21072-AA 1072-A 21071-AA: 128-bit cache/64-bit 21072-AA: cache/128-bit 21071-AA ysd 2-11 invr 054 | |
STR 6252 equivalentContextual Info: ARM610 Data Sheet ARM610 RISC Processor ARM610 is a general purpose 32-bit microprocessor with 4kByte cache, W rite Buffer and Memory M anagement Unit MMU combined in a single chip. The ARM610 offers a high level of RISC performance yet it's fully static design ensures minimal pow er consumption - m aking it ideal for portable, battery |
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ARM610 32-bit P610ARM STR 6252 equivalent | |
Contextual Info: C h apter 3 MB86831 Bus Interface Unit 3.1 Overview of Bus Interface Unit The BIU on the MB86831 offers the following features: • Option to run core at multiplied frequency of the Bus Interface Unit, xl, x2, x3, x4. • Four-word burst mode for instruction fetches and data loads, |
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MB86831 MB86831 | |
ARM9TDMI
Abstract: ARM922T 141 mrc basic architecture of ARM Processors B-30 CP15
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ARM922T 0184B ARM9TDMI ARM922T 141 mrc basic architecture of ARM Processors B-30 CP15 |