Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    N 74LS 76 B Search Results

    N 74LS 76 B Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74LS491ANS Rochester Electronics LLC 74LS491 - 10-Bit Counter Visit Rochester Electronics LLC Buy
    74LS626N Rochester Electronics LLC 74LS626 - Voltage Controlled Oscillator Visit Rochester Electronics LLC Buy
    74LS190N Rochester Electronics LLC 74LS190 - Decade Counter, Synchronous, Bidirectional, TTL, PDIP16 Visit Rochester Electronics LLC Buy
    74LS468N Rochester Electronics LLC 74LS468 - Buffer/Driver Visit Rochester Electronics LLC Buy
    74LS469ANS Rochester Electronics LLC 74LS469A - 8-Bit Up/Down Counter Visit Rochester Electronics LLC Buy

    N 74LS 76 B Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    nokia mobile jumper setting

    Abstract: star delta wiring diagram Allen-Bradley micrologix cable pin Allen Bradley PLC micrologix 1200 Allen-Bradley 1756 DIGITAL INPUT cards Allen Bradley PLC micrologix 1200 wiring diagram power and battery cabinet ericsson delta plc cable pin diagram RS-485 nokia 1200 circuit diagram Allen-Bradley micrologix 1200
    Text: SNAP PAC SYSTEM SPECIFICATION GUIDE Form 1696-101018—October 2010 43044 Business Park Drive • Temecula • CA 92590-3614 Phone: 800-321-OPTO 6786 or 951-695-3000 Fax: 800-832-OPTO (6786) or 951-695-2712 www.opto22.com Product Support Services 800-TEK-OPTO (835-6786) or 951-695-3080


    Original     		1696-101018--October 800-321-OPTO 800-832-OPTO opto22 800-TEK-OPTO nokia mobile jumper setting star delta wiring diagram Allen-Bradley micrologix cable pin Allen Bradley PLC micrologix 1200 Allen-Bradley 1756 DIGITAL INPUT cards Allen Bradley PLC micrologix 1200 wiring diagram power and battery cabinet ericsson delta plc cable pin diagram RS-485 nokia 1200 circuit diagram Allen-Bradley micrologix 1200 PDF

    970T

    Abstract: 10MHZ 74LS ADS-945 ADS-945EX LT1016 0237E C2362
    Text: ® ADS-945 14-Bit, 10MHz Sampling A/D Converters FEATURES • • • • • • • • • • • 14-bit resolution 10MHz minimum throughput Functionally complete No missing codes Low power, 4.2W Excellent dynamic performance Internally clamped input


    Original     		ADS-945 14-Bit, 10MHz 14-bit 10MHz ADS-945 970T 74LS ADS-945EX LT1016 0237E C2362 PDF

    74ls76 jk flip-flop logic symbol and truth table

    Abstract: 7476PC 7476 PIN DIAGRAM 7476 truth table 74LS76PC 74LS76 dual flip-flop pin diagram of 7476 74LS76D 74LS76DC Jk 74ls76 pin out
    Text: 76 CONNECTIO N DIAGRAM PINOUT A ^54/7476 OZZô/b> ^54H /74H 76 G f / c t l l/54LS/74LS76 DUAL JK FLIP-FLOP With Separate Sets, Clears and Clocks c p i [T DESCRIPTION — The ’76 and 'H76 are dual JK m aster/slave flip -flo p s with separate Direct Set, D irect Clear and Clock Pulse inputs fo r each flip -flop .


    OCR Scan     		54H/74H76 l/54LS/74LS76 54/74H 54/74LS CLS76) 74ls76 jk flip-flop logic symbol and truth table 7476PC 7476 PIN DIAGRAM 7476 truth table 74LS76PC 74LS76 dual flip-flop pin diagram of 7476 74LS76D 74LS76DC Jk 74ls76 pin out PDF

    logic ic 7476 pin diagram

    Abstract: and pin diagram of IC 7476 logic ic 7476 flip-flop pin diagram 7476 truth table pin diagram for IC 7476 pin configuration of 74LS76 IC IC 74LS76 logic ic 74LS76 pin diagram 74Ls76 truth table 74LS80
    Text: 54/7476 54H/74H76 54LS/74LS76 DESCRIPTION ORDERING CODE PACKAGES PIN CONF. 2 The 74LS76 is a negative edge triggered flip-flop. The J and K inputs must be stable only one setup time prior to the HIGH-toLOW Clock transition. The Set Sd and Reset (Rd ) are asynchro­


    OCR Scan     		54H/74H76 54LS/74LS76 74H76 74LS76 54H/74H 54S/74S 54LS/74LS logic ic 7476 pin diagram and pin diagram of IC 7476 logic ic 7476 flip-flop pin diagram 7476 truth table pin diagram for IC 7476 pin configuration of 74LS76 IC IC 74LS76 logic ic 74LS76 pin diagram 74Ls76 truth table 74LS80 PDF

    74ls86n

    Abstract: 74ls138n 74LS155N 74ls173n 74LS153N 74LS75N CD 8227 IC TTL 74LS153N 74LS158N 74LS161N
    Text: S ig n e tic s Integrated C ircuits - Low Power S chottky T T L R EFERENCE T A B L E TYPE NO. D E S C R IP T IO N STOCK NO. N 7 4LS 51N N 7 4LS 54N N74LS 55N N 7 4LS 73N N 7 4LS 74N D u a l 2 -W id e 2 - I n p u t A O I G a te 4 -W id e 2 - I n p u t A O I G ate


    OCR Scan     		n74ls51n 55673h n74ls54n 55674f n74ls55n 55675d n74ls73n 55676b n74ls74n 55677x 74ls86n 74ls138n 74LS155N 74ls173n 74LS153N 74LS75N CD 8227 IC TTL 74LS153N 74LS158N 74LS161N PDF

    74LS76P

    Abstract: 74LS76D IC 7476 pinout logic ic 7476 flip-flop pin diagram and pin diagram of IC 7476 logic ic 7476 pin diagram 7476PC 74H76 74LS76 pinout 74LS76 IC
    Text: 76 CO NNECTIO N DIAGRAM PINOUT A /54/7476 0 / / o / c^ ^S4H/74H76 Gf / ci 7 ^ 54LS/74LS76£ v / 6 / 6 DUAL JK FLIP-FLOP With Separate Sets, Clears and Clocks DESCRIPTION — The ’76 and 'H76 are dual JK m aster/slave flip -flo p s with separate Direct Set, D irect Clear and Clock Pulse inputs fo r each flip-flop.


    OCR Scan     		S4H/74H76 54LS/74LS76£ 54/74H 54/74LS CLS76) 74LS76P 74LS76D IC 7476 pinout logic ic 7476 flip-flop pin diagram and pin diagram of IC 7476 logic ic 7476 pin diagram 7476PC 74H76 74LS76 pinout 74LS76 IC PDF

    PIN CONFIGURATION 7476

    Abstract: pin diagram of 7476 7476 PIN DIAGRAM 7476 FUNCTION TABLE pin diagram of ttl 7476 7476 pin configuration LS 7476 7476 PIN DIAGRAM input and output 74LS76 J-K Flip-Flop 7476
    Text: 7476, LS76 Sjgnetics Flip-Flops Dual J-K Flip-Flop Product Specification Logic Products DESCRIPTION The '76 is a dual J-K flip-flop with individual J, K, Clock, Set and Reset inputs. The 7476 is positive pulse-trig­ gered. JK information is loaded into the


    OCR Scan     		74LS76 1N916, 1N3064, 500ns 500ns PIN CONFIGURATION 7476 pin diagram of 7476 7476 PIN DIAGRAM 7476 FUNCTION TABLE pin diagram of ttl 7476 7476 pin configuration LS 7476 7476 PIN DIAGRAM input and output J-K Flip-Flop 7476 PDF

    ic 74ls48 and 7 segment

    Abstract: 74LS48PC decoder 74LS48
    Text: 48 CO NNECTIO N DIAGRAM PINOUT A 54/7448y 54LS/74LS48^ ao[T BCD TO 7-SEGMENT DECODER DESCRIPTION — The '48 translates fo u r lines of BCD 8421 Input data into the 7-segment numeral code and provides seven corresponding outputs having pull-up resistors, as opposed to totem pole pull-ups. These outputs


    OCR Scan     		54/7448y 54LS/74LS48^ 54/74LS ic 74ls48 and 7 segment 74LS48PC decoder 74LS48 PDF

    74170PC

    Abstract: oc75 54170DM 54170FM 54LS170DM 74170DC 74170FC 74LS170DC 74LS170FC 74LS170PC
    Text: / — 7 Q - u / ~ u / _ CO NNECTIO N DIAGRAM PINOUT A 54/74170 54LS /74LS 170 4 X 4 REGISTER FILE Dz [T 16] V cc □3 [2 T |]D i W ith O p e n -C o lle c to r O utputs D 4 [I u ] W Ao [7 Ï5 ] W Ai RAi 12] WE RAo |T DESCRIPTION — T he ’170 contains 16 high speed, low power, transparent


    OCR Scan     		54LS/74LS170 54/74LS 74170PC oc75 54170DM 54170FM 54LS170DM 74170DC 74170FC 74LS170DC 74LS170FC 74LS170PC PDF

    information applikation

    Abstract: "Mikroelektronik" Heft mikroelektronik Heft CDB4151 mikroelektronik Heft 12 MH8475 MH7442 Mikroelektronik Information Applikation information applikation mikroelektronik CDB4153
    Text: ' 1 o lE h f c p o n ih Information Applikation s o c h a lH ü n o n il- c Information Applikation HEFT 25 I M P O R T - I S T E IL 1 Ivob Halbleiterwerk frankfurt/ader | b e trie b im m b kom binat m ikroelektronik ] KAMMER DER TECH N IK I Bezirksvorstand Frankfurt/O.


    OCR Scan     		PDF

    7448 bcd to seven segment decoder

    Abstract: 74LS48D 74LS48p 7448 BCD to Seven Segment truth table for 7448 T13A3 7448 PIN OUT 7 segment with 7448 74LS48PC LS248
    Text: 48 C O N N E C T IO N D IA G R A M P IN O U T A 5 4/7 4 48 y 5 4L S /74 L S 48 ^ a» BCD TO 7-SEGMENT DECODER |T 16] v c c A i [2 l t D E S C R IP T IO N — T he '48 tra n sla te s fo u r lines o f BC D 8421 in p u t data in to th e 7 -se g m e n t n u m eral co d e and p ro vid e s seven c o rre s p o n d in g o u tp u ts


    OCR Scan     		54LS/74LS48^ datashe/74LS 54/74LS 7448 bcd to seven segment decoder 74LS48D 74LS48p 7448 BCD to Seven Segment truth table for 7448 T13A3 7448 PIN OUT 7 segment with 7448 74LS48PC LS248 PDF

    0PIC

    Abstract: LS66 SN74L30 84LS 64LS 84ls AX-2016 MAX2719 hy74 L8128A SN7463
    Text: V 84 F A M IL Y S E R IE S 54 S E R IE S M L S S E R IE S B4S S E R IE S 74 S E R IE S 54H S E R IE S 74H S E R IE S 5 4 L 74 F A M IL Y S E R IE S 7 4 L S E R IE S 7 4 LS S E R IE S 74S *00. *04, *H 0 0 ,1404. *L00, 'U M , XSOO, *100, *S04, '10. *20, *30


    OCR Scan     		LS279 S3H31V1 -LS279 0PIC LS66 SN74L30 84LS 64LS 84ls AX-2016 MAX2719 hy74 L8128A SN7463 PDF

    DM74ALS2

    Abstract: 3bs3 DM74ALS244 dm74al
    Text: S E M IC O N D U C T O R tm DM74ALS244A/74ALS244B-1 Octal 3-STATE Bus Driver General Description Features This octal 3-STATE bus driver is designed to provide the d e ­ signer with flexib ility in im plem enting a bus interface with memory, m icroprocessor, o r com m unication system s. This


    OCR Scan     		DM74ALS244A/74ALS244B-1 64-extended DM74ALS2 3bs3 DM74ALS244 dm74al PDF

    Difference between LS, HC, HCT devices

    Abstract: TC4S69F Small Signal Zener Diod difference between 74ls and 74hc ic TC74HC04
    Text: C2MOS Logic TC74HC/HCT Series 9. Precautions in Designing Circuits 9-1 Input Processing 1 Processing of unused gate Inputs of CMOS IC have such a high impedance that the logic level becomes undefined under open conditions. If the input is at an intermediate level, the P-channel and Nchannel transistors both turn on, and excessive supply


    OCR Scan     		TC74HC/HCT TC74HC08 TC7S32F TC74HC32 TC7S02F TC7SU04F TC74HCU04 TC7S00F TC7S04F TC74HC00 Difference between LS, HC, HCT devices TC4S69F Small Signal Zener Diod difference between 74ls and 74hc ic TC74HC04 PDF

    74h541

    Abstract: 74LS series nand gates SN7423 4 input nor gate 7423 ic 7423 g 106IC
    Text: SCRIES 54/74. 54H/74H, 54L/74L, 54LS/74LS, 54S/74S THAHSISTOR-TRAKSISTOH 106IC PARAM ETER MEASUREMENT INFORM ATION TEST TABLE V CC O PEN C O LLEC TO R INPUT CONDITIONS NAND In p u t un d e r test a t V i l m ax, ail o th e rs at 4 .5 V >OH O UTPUTS IN P U T


    OCR Scan     		54H/74H, 54L/74L, 54LS/74LS, 54S/74S 106IC 74h541 74LS series nand gates SN7423 4 input nor gate 7423 ic 7423 g 106IC PDF

    74ls04 propagation delay

    Abstract: LC74HC04
    Text: SANYO SEMIC ON DUC TOR CORP LC74HG04 • 15E D I *0 ; _ - '* -, 4 . .3003A ^ ' TTOQTL. DDOSbOS 3 - C M O S H ig h -S p e e d S ta n d a rd L o g ic L C 7 4 H C S e r ie s Hex Inverter Buffered 1758C Features • The LC74HC04 consists of 6 identical buffered inverters.


    OCR Scan     		1758C LC74HC04 74LS04) 54LS/74LS 74ls04 propagation delay PDF

    54ls640

    Abstract: No abstract text available
    Text: SN54LS640 THRU SN54LS642, SN54LS644. SNS4LS645 SN74LS640 THRU SN74LS642, SN74LS644, SN74LS645 OCTAL BUS TRANSCEIVERS D2420, APRIL 1979-REV1SED MARCH 1988 SN54LS' . . . J PACKAGE SN 74LS' . . . DW OR N PACKAGE SN74LS04X-1 Versions Rated at I qj_ of 48 mA TOP VIEW


    OCR Scan     		SN54LS640 SN54LS642, SN54LS644. SNS4LS645 SN74LS640 SN74LS642, SN74LS644, SN74LS645 D2420, 1979-REV1SED 54ls640 PDF

    M74LS74AP

    Abstract: 20-PIN
    Text: M IT S U B IS H I LSTTLs M 7 4 L S 7 4 A P DUAL D -TY PE P O SIT IV E ED G E-TR IG G ER ED F LIP -FL O P S W ITH S E T AND R E S E T DESCRIPTION The M 7 4L S 74 A P is a semiconductor intergrated circuit PIN CONFIGURATION TOP VIEW containing 2 D-type positive edge-triggered flip -flo p circuits


    OCR Scan     		M74LS74AP M74LS74AP 16-PIN 20-PIN PDF

    Untitled

    Abstract: No abstract text available
    Text: & E 3 A ADS-945 T E L 14-Bit, 10MHz Sampling A/D Converters IN N O V A T IO N a n d E X C E L L E N C E FEATURES • • • • • • • • • • • 14-Bit resolution 10MHz m inimum throughput Functionally com plete No m issing codes Low power, 4.2W


    OCR Scan     		ADS-945 14-Bit, 10MHz 14-Bit 10MHz ADS-945 S-945 S-945E PDF

    TMS47256

    Abstract: S124C 47256
    Text: TMS47256 32,768-WORD BY 8-BIT READ-ONLY MEMORY JUNE 1 9 8 3 - N PACKAGE 3 2 ,7 6 8 X 8 Organization [TOP VIEW Fully Static No Clocks, No Refresh) NCC 1 W 2 8 27 A12C 2 26 A7 C 3 25 A6 C 4 24 A5 C 5 23 A4 C 6 22 A3 C 7 21 A2 C 8 20 A lC 9 AO C 10 19 Q l C 11 18


    OCR Scan     		TMS47256 768-WORD 27C256 S124C 47256 PDF

    2332 eprom

    Abstract: PIN-20 IC DIAGRAM 2332 rom 2732A eprom
    Text: TMS2332 4096-WORD BY 8-BIT READ-ONLY MEMORY SEPTEMBER 1984 - REVISED NOVEMBER 1985 4 0 9 6 X 8 Organization N PACKAGE All Inputs and Outputs TTL Compatible TOP VIEW A 7 C 1 ^ 2 4 3 v Cc A6£ 2 23 3 A 8 A5 £ 3 22 > 9 Fully Static (No Clocks. No Refresh)


    OCR Scan     		TMS2332 4096-WORD 2332 eprom PIN-20 IC DIAGRAM 2332 rom 2732A eprom PDF

    74ls

    Abstract: N74LS764N
    Text: Signelics 74LS764 DRAM Controller DRAM Dual-Ported Controller Product Specification Logic Products FEATURES • Allows two microprocessors to access the same bank of DRAM TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL • Replaces 25 TTL devices to


    OCR Scan     		74LS764 18-bit 30MHz 215mA PLCC-44 N74LS764N N74LS764A 500ns 74ls PDF

    Untitled

    Abstract: No abstract text available
    Text: S E M IC O N D U C T O R tm DM74LS273 8-Bit Register with Clear General Description Features The ’LS273 is a high speed 8-bit register, consisting of eight D-type flip-flops with a com m on C lock and an asynchronous active LOW M aster Reset. This device is supplied in a 20-pin


    OCR Scan     		DM74LS273 LS273 20-pin DS009825-1 DM54LS273E, DM54ericas PDF

    circuit diagram with IC 7476

    Abstract: 74LS76A logic diagram of ic 7476 IC 7476 JK
    Text: SN5476, SN54LS76A, SN7476, SN74LS76A DUAL J K FLIP FLOPS WITH PRESET AND CLEAR DECEMBER 1 9 8 3 • Package Options Include Plastic and Ceramic OIPs and Ceramic Flat Packages • Dependable Texas Instruments Quality and Reliability SN 5476. SN 54LS76A . . . J PACKAGE


    OCR Scan     		SN5476, SN54LS76A, SN7476, SN74LS76A 54LS76A 74LS76A circuit diagram with IC 7476 74LS76A logic diagram of ic 7476 IC 7476 JK PDF