MEMORY DEPTH EXPANSION Search Results

LF44xx

Abstract: LF4460 full hd video processor LF4415 "Frame rate conversion"
Contextual Info: LF4460 LF4430 LF4415 PRELIMINARY Video Memory / FIFO FRAME MEMORY Features Selectable I/O VDD = 1.8V, 2.5V, 3.3V Selectable Core VDD = 1.8V, 2.5V, 3.3V 172 ball FBGA package 15 x 15 x 1.4mm Depth expansion is supported for Multi-frame HDTV, Multiframe SDTV, and other formats:

KRL Electronics

Contextual Info: KM75C03A CMOS FIFO First-in First-out FIFO 2048x9 CMOS Memory FEATURES DESCRIPTION • First-in, First-out dual port memory — 2048 x 9 organization • Very high speed independent of depth/width — 20ns cycle times • Asynchronous and simultaneous read and write

Contextual Info: AC725 • ACT725 54AC/74AC725 • 54ACT/74ACT725 512 x 9 First-In, First-Out Memory FIFO D escription The 512 x 9 FIFO is a first-in, first-out dual port memory capable of asynchronous, simultaneous read and write. Other important features are: expansion capability in both the word depth and

Contextual Info: KM75C02A CMOS FIFO First-in First-out FIFOj 1024 x 9 CMOS Memory FEATURES DESCRIPTION • First-in, First-out dual port memory — 1024 x 9 organization • Very high speed independent of depth/width — 25ns cycle times • Asynchronous and simultaneous read and write

Contextual Info: SAMSUNG ELECTRONICS INC bME D • T'ìbMlMa Q0142ß7 G3T PRELIMINARY KM75C04A CMOS FIFO First-in First-out FIFO 4 K x 9 CMOS Memory FEATURES DESCRIPTION • First-in, First-out dual port memory — 4K x 9 organization • Very high speed independent of depth/width

Contextual Info: PRELIMINARY KM75C04A CMOS FIFO First-in First-out FIFO 4 K x 9 CMOS Memory FEATURES DESCRIPTION • First-in, First-out dual port memory — 4K x 9 organization • Very high speed independent of depth/width — 25ns cycle times • Asynchronous and simultaneous read and write

KM75C01

Contextual Info: KM75C01A CMOS FIFO First-in First-out FIFO 5 1 2 x 9 CMOS Memory FEATURES DESCRIPTION • First-in, First-out dual port memory — 512 x 9 organization • Very high speed independent of depth/width 25ns cycle times • Asynchronous and simultaneous read and write

Contextual Info: CMOS FIFO KM75C03A First-in First-out FIFO 2 0 4 8 x 9 CMOS Memory FEATURES DESCRIPTION • First-in, First-out dual port memory — 2048 x 9 organization • Very high speed independent of depth/width — 25ns cycle times • Asynchronous and simultaneous read and write

C26K

Contextual Info: KM75C03A CMOS FIFO First-in First-out FIFO 2 0 4 8 x 9 CMOS Memory FEATURES DESCRIPTION • First-in, First-out dual port memory — 2048 x 9 organization • Very high speed independent o f depth/width — 20ns cycle times • Asynchronous and simultaneous read and write

MK4501N-80

Abstract: MK4501-15 MK4501N-12 MK4501N-15 mostek 4501 4501 d 9l reset MK4501N-65 Scans-004797 MK4501N-10
Contextual Info: 512 x 9 C M O S B iP O R T FIFO MEMORY COMPONENTS FEATURES □ First-In, First-Out Memory Based Architecture □ Flexible 512 x 9 organization □ Low Power HCMOS technology □ Asynchronous and simultaneous read/write □ Bidirectional applications □ Fully expandable by word width or depth

Contextual Info: KM75C01A CMOS FIFO First-in First-out FIFO 5 1 2 x 9 CMOS Memory FEATURES DESCRIPTION • First-in, First-out dual port memory — 5 1 2 x 9 organization • Very high speed independent of depth/width — 25ns cycle tim es • Asynchronous and simultaneous read and_ write

4AC17

Abstract: texas instruments fifo cascaded SN74ACT7808
Contextual Info: SN74ACT7808 2048 x 9 STROBED FIRST-IN, FIRST-OUT MEMORY _SCAS205B - FEBRUARY 1991 - REVISED SEPTEMBER 1995 Load Clocks and Unload Clocks Can Be Asynchronous or Coincident * 2048 Words by 9 Bits • Expansion Logic for Depth Cascading 9 Empty, Full, and Half-Full Flags

BY127

Contextual Info: 67C4500-35/50/65/80 a Deep First-in First-out FIFO 256x9 CMOS Memory O) » 01 DISTINCTIVE CHARACTERISTICS Retransmit capability Expandable in both width and depth Increased noise immunity for XI - CMOS threshold Functional and pin compatible with industry

Contextual Info: CY7C420, CY7C421 CY7C424, CY7C425 CY7C428, CY7C429 W" ‘ *K- CYPRESS SEMICONDUCTOR Features • 512 x 9,1,024 x 9,2,048 x 9 FIFO buffer memory • Dual-port RAM cell • Asynchronous read/write • High-speed 33.3-MHz read/write independent of depth/width

AM7202A

Abstract: PDW028
Contextual Info: Am7202A Advanced Micro Devices High Density First-In First-Out FIFO 1024 x 9-Bit CMOS Memory DISTINCTIVE CHARACTERISTICS • ■ ■ ■ ■ ■ Status flags—full, half-full, empty Retransmit capability Expandable In both width and depth Increased noise immunity for xF—CMOS

Contextual Info: KM75C103A CMOS PROGRAMMABLE FLAG FIFO Programmable-Flag$, 2 K X 9 FIFO FEATURES DESCRIPTION • FirsMn-Flrst-Out Dual Port Memory —2K x 9 Organization • Vary High Speed independent of depth/width —30ns Cycle Time • Two Fully configurable Almost Full and Almost

t-1549

Abstract: AM7202A PDW028
Contextual Info: Am7202A Advanced Micro Devices High Density First-In First-Out FIFO 1024 x 9-Bit CMOS Memory DISTINCTIVE CHARACTERISTICS • ■ ■ ■ ■ ■ Status flags—full, half-full, empty Retransmit capability Expandable In both width and depth Increased noise immunity for xF—CMOS

Contextual Info: KM75C102A CMOS PROGRAMMABLE FLAG FIFO Programmable-Flags, 1 KX9 FIFO FEATURES DESCRIPTION • First-In-First-Out Dual Port Memory — 1K x 9 Organization • Very High Speed independent of depth/width —30ns Cycle Time • Two Fully configurable Almost Full and Almost

a7w 511

Abstract: A7W 19 a7w 3 PIN a7w 16 AM7201 AM7201-25 AM7201-35 AM7201-50 PDW028 75G-14
Contextual Info: a Am7201 Advanced Micro Devices High Density First-In First-Out FIFO 512 x 9-Bit CMOS Memory DISTINCTIVE CHARACTERISTICS • ■ ■ ■ ■ Status flags—full, half-full, empty Retransmit capability Expandable In both width and depth Increased noise Immunity forXF—CMOS

2388

Abstract: 8051 microcontroller pdf free download MSU2031 MSU2051 U2031
Contextual Info: MOSEL VITELIC MOSEL VITELIC INC. MSU2031 Preliminary October 1996 8 - Bit Microcontroller Features General 8051 family compatible 64 K byte External Memory 8 bit bus I/O ports ROM less for U2031 128 byte RAM Two 16 bit Timers Event Counters 128 byte depth stack

C451

Abstract: C4517 CY7C451 CY7C453
Contextual Info: CY7C451 CY7C453 512 x 9 Cascadable Clocked and 2K x 9 Cascadable Clocked FIFOs with Programmable Flags Features D Functional Description 512 x 9 CY7C451 and 2,048 x 9 (CY7C453) FIFO buffer memory D D Expandable in width and depth HighĆspeed 70ĆMHz standalone;

D8203

Contextual Info: KM75C101A CMOS PROGRAMMABLE FLAG FIFO Programmable-Flags, 5 1 2 X 9 FIFO FEATURES DESCRIPTION • First-ln-First-Out Dual Port Memory —512x9 Organization • Very High Speed independent of depth/width —30ns Cycle Time • Two Fully configurable Almost Full and Almost

Contextual Info: CY7C451 CY7C453 m r cypress Functional Description Features • 512 x 9 CY7C451 and 2,048 x 9 (CY7C453) FIFO buffer memory • Expandable in width and depth • High-speed 70-MHz standalone; 50-MHz cascaded • Supports free-running 50% duly cycle clock inputs

M7202A

Contextual Info: Am7202A Advanced Micro Devices High Density First-In First-Out FIFO 1024 x 9-Bit CMOS Memory DISTINCTIVE CHARACTERISTICS • ■ ■ ■ ■ ■ Status flags—full, half-full, empty Retransmit capability Expandable In both width and depth Increased noise immunity for xF—CMOS