K4004
Abstract: SN75361* equivalent SN75361A SN75107 SN55109A
Text: SN75207B DUAL SENSE AMPLIFIER FOR MOS MEMORIES OR DUAL HIGH-SENSITIVITY LINE RECEIVERS SLLS096C – JULY 1973 – REVISED MARCH 1997 D D D D D D D D D D D Plug-In Replacement for SN75107A and SN75107B With Improved Characteristics ± 10-mV Input Sensitivity
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SN75207B
SLLS096C
SN75107A
SN75107B
10-mV
SN7520S
SLYT012A
SLYT010A
SLLA067
K4004
SN75361* equivalent
SN75361A
SN75107
SN55109A
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66C367PE
Abstract: No abstract text available
Text: SLE 66C367PE 8/16-Bit Security Controller with enhanced instruction set for large memories in 0.22 µm CMOS Technology 196-Kbytes ROM,4352 bytes RAM, 36-Kbytes EEPROM Dual Key Triple DES Sho rt Pro duc t O ve r vi e w May 2011 Chi p C ard & Sec u ri t y SLE 66C367PE
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66C367PE
8/16-Bit
196-Kbytes
36-Kbytes
66C367PE
196kByte
36kByte
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AT91SAM3U4
Abstract: at91sam3 1N1308 MAR 735 REGULATOR IC 7912 pin identify AT91SAM3U4E SAM3u1 AT91SAM3U 3961 G.E 0x20180
Text: Features • Core • • • • • • – ARM Cortex®-M3 revision 2.0 running at up to 96 MHz – Memory Protection Unit MPU – Thumb®-2 instruction set Memories – From 64 to 256 Kbytes embedded Flash, 128-bit wide access, memory accelerator,
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128-bit
6430F
21-Feb-12
AT91SAM3U4
at91sam3
1N1308
MAR 735
REGULATOR IC 7912 pin identify
AT91SAM3U4E
SAM3u1
AT91SAM3U
3961 G.E
0x20180
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atxmega128B
Abstract: 141-003 0x0D00 XMEGA Application Notes
Text: 8/16-bit Atmel XMEGA B1 Microcontroller ATxmega128B1; ATxmega64B1 Features High-performance, low-power Atmel AVR® XMEGA® 8/16-bit Microcontroller Nonvolatile program and data memories 64K - 128KBytes of in-system self-programmable flash
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8/16-bit
ATxmega128B1;
ATxmega64B1
128KBytes
16-bit
atxmega128B
141-003
0x0D00
XMEGA Application Notes
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sn75361
Abstract: SN55109A
Text: SN75207B DUAL SENSE AMPLIFIER FOR MOS MEMORIES OR DUAL HIGH-SENSITIVITY LINE RECEIVERS SLLS096C – JULY 1973 – REVISED MARCH 1997 D D D D D D D D D D D Plug-In Replacement for SN75107A and SN75107B With Improved Characteristics ± 10-mV Input Sensitivity
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SN75207B
SLLS096C
SN75107A
SN75107B
10-mV
SN7520i
sn75361
SN55109A
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Untitled
Abstract: No abstract text available
Text: SN74V3640, SN74V3650, SN74V3660, SN74V3670, SN74V3680, SN74V3690 1024 x 36, 2048 × 36, 4096 × 36, 8192 × 36, 16384 × 36, 32768 × 36 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES SCAS668A – NOVEMBER 2001 – REVISED MARCH 2003 D D D D D D D D D Choice of Memory Organizations
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SN74V3640,
SN74V3650,
SN74V3660,
SN74V3670,
SN74V3680,
SN74V3690
SCAS668A
SN74V3640
SN74V3650
SN74V3660
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123401
Abstract: No abstract text available
Text: AVED MEMORY PRODUCTS Where Quality & Memory Merge AVEF29LV065U32SJ08-XX 32MB FLASH SIMM, based on AMD Am29LV065D Uniform Sector Flash Memory DESCRIPTION PIN CONFIGURATIONS AVED Memory Products AVEF29LV065U32SJ08-XX is a Flash Memory SIMM, composed of four 64Mbit CMOS flash memories, each organized as 8M X 8 bits mounted on a substrate
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AVEF29LV065U32SJ08-XX
Am29LV065D
AVEF29LV065U32SJ08-XX
64Mbit
80-pin
120ns
123401
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tr8c
Abstract: TMS28F200
Text: TMS28F20ÛBZT, TMS28F200BZB 262144 BY 8-BIT/131072 BY 16-BIT BOOT-BLOCK FLASH MEMORIES SWS2dOO - JUNE 1 9 9 4 - REVISED SEPTEMBER 1997 • ■ I I I • • • • • • • • • • Organization . . . 262144 by 8 bits 131072 by 16 bits Array-Blocking Architecture
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TMS28F20
TMS28F200BZB
8-BIT/131072
16-BIT
96K-Byte
128K-Byte
16K-Byte
28F200B2x70
28F200BZX80
28F200BZX90
tr8c
TMS28F200
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A1051
Abstract: No abstract text available
Text: TMS27C291, TMS27C292 16.384-BIT UV ERASABLE PROGRAMMABLE READ-ONLY MEMORIES TMS27PC291 16,384-BIT PROGRAMMABLE READ-ONLY MEMORY SEPTEM BER 1986 —REVISED APRIL 1988 Organization . . . 2K x 8 J AND N PA C KA G E Pin Compatible with Existing 2K x 8 Bipolar/High-Speed CM OS EPROMs
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TMS27C291,
TMS27C292
384-BIT
TMS27PC291
27C/PC291-3
27C/PC291
27C/PC291-5
27C/PC291-35
27C/PC291-45
A1051
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Untitled
Abstract: No abstract text available
Text: S N 5 4 A LS 2 2 9 A , S N 7 4 A LS 2 2 9 A 1 6 x 5 ASYNCHRONOUS FIRST-IN FIRST-OUT MEMORIES D 2 8 7 6 . M A R C H 1 9 8 6 -R E V IS E D M A Y 1 9 8 6 • Independent Asychronous Inputs and Outputs • 16 Words by 5 Bits Each • Data Rates from 0 to 30 MHz
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LS229A
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CT 2048
Abstract: D8228
Text: SN74ACT7203L, SN74ACT7204L, SN74ACT7205L, SN74ACT7206L 2048 x 9,4096 x 9,8192 x 9,16384 x9 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORIES SCAS226A - FEBRUARY 1993 - REVISED SEPTEMBER 1995 Reads and Writes Can Be Asynchronous or Coincident Organization: - SN74ACT7203L - 2048 x 9
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SN74ACT7203L,
SN74ACT7204L,
SN74ACT7205L,
SN74ACT7206L
SCAS226A
SN74ACT7203L
SN74ACT7204L
SN74ACT7205L
IDT7203/7204
CT 2048
D8228
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74ALS233
Abstract: No abstract text available
Text: S N 5 4 A LS 2 3 3 A , S N 7 4 A LS 2 3 3 A 1 6 x 5 ASYNCHRONOUS FIRST-IN FIRST-OUT MEMORIES D 2 8 7 6 . JA N U A R Y 1 9 8 6 - Package Options Include Plastic "Small Outline" Packages. Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs S N 54A LS 233A . . . J PACKAGE
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300-mil
ALS233A
74ALS233
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TID136
Abstract: TID139 N6040
Text: TYPES TID135, TID136, TID139 THRU TID144 SILICON DIODE ARRAYS B U L L E T IN N O . D L -S 7 3 11 7 0 7, A P R IL 1 9 7 2 - R E V IS E D M A R C H 1973 L O G IC A N D C O R E -D R IV E R D IO D E A R R A Y S For Application With Magnetic Cores • Plated-Wire Memories
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TID135,
TID136,
TID139
TID144
TID136
N6040
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TCD120AC
Abstract: No abstract text available
Text: TCD120AC The TCD120AC is a contact type CCD linear image sensor. The device is consist of 5 staggered high sensitivity CCD chips. The device contains a row of 4800 photodiodes which provide a A00 dots/inch resolution across an A3 size paper. By the aid of analog line memories fabricated
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TCD120AC
TCD120AC
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Untitled
Abstract: No abstract text available
Text: SN54ALS232A, SN74ALS232A 16 X ASYNCHRONOUS FIRST-IN FIRST-OUT MEMORIES D 2 8 7 6 , OCTOBER 1 9 8 5 - • Independent A sy n c h ro n o u s Inputs and O u tp u ts • Package O ption s Include P lastic "S m a ll O u tlin e " Packages, C eram ic C hip Carriers,
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SN54ALS232A,
SN74ALS232A
LS232A
LS232A
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tms jl 27C256-15
Abstract: tms jl 27c256-12 tms jl 27C256-10 TMS JL 27C256-20 TMS JE 27C256-15
Text: TMS27C256 32768 BY 8-BIT UV ERASABLE TMS27PC256 32768 BY 8-BIT PROGRAMMABLE READ-ONLY MEMORIES _ SMLS25BH- SEPTEMBER 1964 - REVISED NOVEMSER 1997 Organization . . . 32768 by 8 Bits J PACKAGE TO P VIEW Single 5-V Power Supply Pin Compatible With Existing 256K MOS
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TMS27C256
TMS27PC256
SMLS25BH-
27C/PC256-10
27C/PC256-12
27C/PC256-15
27C/PC256-17
27C/PC256-20
27C/PC256-25
400-mV
tms jl 27C256-15
tms jl 27c256-12
tms jl 27C256-10
TMS JL 27C256-20
TMS JE 27C256-15
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Untitled
Abstract: No abstract text available
Text: T E X A S I N S T R -[ A S I C / N E M O R Y > 7 D D E | A T b l 7 2 S □ □ 3 S 7 E 0 T T -Hb-13-3-5 PRODUCT PREVIEW TBP38SA165, TBP38SA166, TBP38SA16X 16,384-BIT 2048 WORDS BY 8 BITS STANDARD PROGRAMMABLE READ-ONLY MEMORIES JAN UARY 1985 —REVISED APRIL 1985
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-Hb-13-3-5
TBP38SA165,
TBP38SA166,
TBP38SA16X
384-BIT
TBP38SA
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Ks-7b
Abstract: No abstract text available
Text: TMS417800, TMS417800P 2 097152 WORD BY 8-BIT DYNAMIC RANDOM-ACCESS MEMORIES S M K S 7 8 0 -D E C E M B E R 1992 x 8 DE P AC K A G E t DZ P A C K AG E t TOP VIEW (TOP VIEW) * Performance Ranges: vcc[ 1o D Q 0[ 2 ACCESS ACCESS ACCESS READ TIME TIME TIME OR WRITE
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TMS417800,
TMS417800P
417800/P-60
417800/P-70
417800/P-80
TMS417800
Ks-7b
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44-800-p
Abstract: 44800P PIN DIAGRAM of IC AD 524 IN2045
Text: TMS44800, TMS44800P 524 288-WORD BY 8-BIT DYNAMIC RANDOM-ACCESS MEMORIES SMHS480B-AUGUST1992-REVISED DECEMBER 1992 This data sheet is applicable to all TMS44800/Ps symbolized with Revision“B" and subsequent revisions as described on page 22. * Organization . . . 524 288 x 8
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TMS44800,
TMS44800P
288-WORD
SMHS480B-AUGUST1992-REVISED
TMS44800/Ps
SMHS480B-AUQUST1992-REVISED
TMS44800J
44-800-p
44800P
PIN DIAGRAM of IC AD 524
IN2045
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SMOS182
Abstract: No abstract text available
Text: TMS626802, TMS636802 1048576-WORD BY 8-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES SMOS182 - FEBRUARY 1994 TM S626802 LVTTL DGE PACKAGE (TO P VIE W ) 3.3-V Power Supply (10% Tolerance) Two Banks for On-Chip Interleaving (Gapless Accesses) vcc [ 1
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TMS626802,
TMS636802
1048576-WORD
SMOS182
100-MHz
S626802
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TMPZ84CO
Abstract: Z80 zilog T6963C TMPZ84COOP TMPZ-80 z80 timing diagram
Text: TO SH IBA T6963C TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC T6963C DOT MATRIX LCD CONTROL LSI The T6963C is an LCD controller designed to be used w ith LCD control driver LSIs and data display memories. The device has an 8 -bit parallel data bus and control
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T6963C
T6963C
TMPZ-80.
128-word
QFP67-P-1420-0
TMPZ84CO
Z80 zilog
TMPZ84COOP
TMPZ-80
z80 timing diagram
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TID126
Abstract: TID121 TID129 TID126 application
Text: TYPES TID2IA THRU TID26A, TID29A, TID30A, TID121 THRU TID126, TID129 THRU TID134 SILICON DIOOE ARRAYS B U L L E T IN N O . D L -S 7 0 1 1 3 2 5 , M A R C H 1 9 7 0 C O R E -D R IV E R D IO D E A R R A Y S For Application With Magnetic Cores • Plated-Wire Memories
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TID26A,
TID29A,
TID30A,
TID121
TID126,
TID129
TID134
TID126
TID126 application
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27c eeprom
Abstract: 27C291 74TTL
Text: 0^1755 DG77HS TMS27C291, TMS27C292 16,384-BIT UV ERASABLE PROGRAMMABLE READ-ONLY MEMORIES TMS27PC291 16,384-BIT PROGRAMMABLE READ ONLY MEMORY SEPTEMBER 1988-R EV ISED APRIL 1988 • Single 5-V Power Supply • Pin Compatible with Existing 2K x 8 BIpolar/High-Speed CMOS EPROMs
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DG77HS
TMS27C291,
TMS27C292
384-BIT
TMS27PC291
1988-R
27C/PC291-3
27C292-3
27C/PC291
27c eeprom
27C291
74TTL
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Untitled
Abstract: No abstract text available
Text: TMS416160, TMS416160P 1 048 576-WORD BY 16-BIT HIGH-SPEED DYNAMIC RANDOM-ACCESS MEMORIES SMKS660-DECEMBER 1992 Organization. . . 1 048 576 x 16 RE P A C K A G E t DC P A C K AG E t TOP VIEW (TOP VIEW) Single 5-V Supply (10% Tolerance) '416160/P-60 '416160/P-70
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TMS416160,
TMS416160P
576-WORD
16-BIT
SMKS660-DECEMBER
416160/P-60
416160/P-70
416160/P-80
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