MCR 65-6 EQUIVALENT Search Results

VL16C450

Abstract: VL16C450PC VL82C50PC VL82C50 VL16C450-PC VL82C50-PC VL16C450QC VL82C50A VL82C50A-QC vl82c
Contextual Info: VLSI T e c h n o l o g y , in c . VL16C450 • VL82C50A • VL82C50 ASYNCHRONOUS COMMUNICATIONS ELEMENT FEATURES DESCRIPTIONS • Full double buffering The VL16C450 is an asynchronous communications element ACE that is functionally equivalent to the VL82C50A, but is an improved specifi­

VL82C50

Abstract: VL82C50-PC
Contextual Info: VLSI Technology, inc . VL16C450»VL82C50A»VL82C50 ASYNCHRONOUS COMMUNICATIONS ELEMENT FEATURES DESCRIPTIONS • Full double buffering The VL16C450 is an asynchronous communications element ACE that is functionally equivalent to the VL82C50A, but is an improved specifi­

VL16C450

Abstract: VL16C550 Delco 195 sorep s3607 MSR 200 VL16C550PC
Contextual Info: VLSI Tech no lo gy , in c . VL16C550 ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFOs FEATURES DESCRIPTION • Fully compatible with VL16C450 ACE The VL16C550 is an asynchronous communications element ACE that is functionally equivalent to the VL16C450, and additionally incorpo­

ST16C454

Abstract: ST16C554 ST16C654CQ64 ST16C654DCQ64 TL16C554AFN TL16C754BFN hpdv hk7 marking
Contextual Info:  ST16C654/654D 2.97V TO 5.5V QUAD UART WITH 64-BYTE FIFO OCTOBER 2003 REV. 5.0.0 FEATURES GENERAL DESCRIPTION The ST16C654/654D1 654 is an enhanced quad Universal Asynchronous Receiver and Transmitter (UART) each with 64 bytes of transmit and receive FIFOs, transmit and receive FIFO trigger levels,

m554

Abstract: XR16M554IV xr16m554 XR16M554IV64 MCR 65-6 16-BYTE 16C550 SC16C554B ST16C454 ST16C554
Contextual Info: XR16M554/554D 1.62V TO 3.63V QUAD UART WITH 16-BYTE FIFO MAY 2008 REV. 1.0.0 GENERAL DESCRIPTION FEATURES • Pin-to-pin compatible with ST16C454, ST16C554, The XR16M554 M554 is a quad Universal Asynchronous Receiver and Transmitter (UART) with 16 bytes of transmit and receive FIFOs, selectable

st16c454

Contextual Info: STARTECH ST16C454 An Printed June 19, 1996 Company QUAD ASYNCHRONOUS RECEIVER AND TRANSMITTER DESCRIPTION PLCC PLCC Rev. 2.0 RIA* RXA GND D7 D6 D5 D4 D3 D2 D1 D0 INTSEL VCC RXD RID* CDD* 6 5 4 3 2 1 68 67 66 65 64 63 62 61 DSRD* 59 CTSD* DTRA* 12 58 DTRD*

W86C452

Abstract: w86c45
Contextual Info: AUS 15 « 4 W86C452 IVinbond I/O CONTROL CHiP FOR IBM PC/AT GENERAL DESCRIPTION The W86C452 is an enhanced d u a l-ch an n el version of the popular W86C450 asynchronous com m unication element ACE fab ricated using WINBOND'S CMOS process. It is equivalent to

SC16C752B

Contextual Info: PRELIMINARY XR16M752/XR68M752 HIGH PERFORMANCE DUART WITH 64-BYTE FIFO JULY 2006 REV. P1.0.0 GENERAL DESCRIPTION The XR16M752/XR68M7521 M752 is a high performance dual universal asynchronous receiver and transmitter (UART) with 64 byte TX and RX FIFOs. The M752 operates from 1.62 to 3.63 volts. It

Contextual Info: ^ STARTECH ST16C454 Printed September 6, 1994 QUAD ASYNCHRONOUS RECEIVER AND TRANSMITTER DESCRIPTION PLCC Package The ST16C454 is a quad universal asynchronous receiver and transmitter. A programmable baud rate generator Is provided to select transmit and receive

KS82C452

Abstract: mini EMP generator ior scr
Contextual Info: KS82C452 DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENTS FEATURES IBM PC/AT-compatible Dual-channel version of KS82C450 Centronix printer Interface Independent control of transmit, receive, line status and data set interrupts on each channel Individual modem control signals for each channel

Contextual Info: XR16V554/554D PRELIMINARY 2.25V TO 3.6V QUAD UART WITH 16-BYTE FIFO SEPTEMBER 2006 REV. P1.0.2 GENERAL DESCRIPTION FEATURES • Pin-to-pin compatible with ST16C454, ST16C554, The XR16V554 V554 is a quad Universal Asynchronous Receiver and Transmitter (UART) with

m654

Abstract: General Instrument 312 diode universal AC Motor soft start ST16C454 ST16C554 TL16C754B QFP lead pitch 0.3mm CSA 70 marking M654 XR16M654IL48
Contextual Info: XR16M654/654D 1.62V TO 3.63V QUAD UART WITH 64-BYTE FIFO MAY 2008 REV. 1.0.0 GENERAL DESCRIPTION FEATURES • Pin-to-pin compatible with ST16C454, ST16C554, The XR16M6541 M654 is an enhanced quad Universal Asynchronous Receiver and Transmitter (UART) each with 64 bytes of transmit and receive

st16c454

Contextual Info: ^ STARTECH ST16C454 An 36* EXARCompany Printed August 3, 1995 QUAD ASYNCHRONOUS RECEIVER AND TRANSMITTER DESCRIPTION PLCC Package The ST16C454 is a quad universal asynchronous receiver and transmitter. A programmable baud rate generator is provided to select transmit and receive

KS82C452

Abstract: MSR-3 delta
Contextual Info: KS82C452 DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENTS FEATURES DESCRIPTION IBM PC/AT-compatible Dual-channel version of KS82C450 Centronix printer interface Independent controlof transmit, receive, line status and data set interrupts on each channel Individual modem control signals foreach channel

MS-018

Abstract: ST16C654 TL16C554 TL16C754B TL16C754BFN TL16C754BPN
Contextual Info: TL16C754B QUAD UART WITH 64ĆBYTE FIFO SLLS397A − NOVEMBER 1999 − REVISED JUNE 2004 D ST16C654 Pin Compatible With Additional D D D D D D D D D D D Enhancements Supports Up To 24-MHz Crystal Input Clock 1.5 Mbps Supports Up To 48-MHz Oscillator Input

16C450

Abstract: ST16C450 ST16C454 ST16C454CJ68 ST16C454IJ68 ST68C454 68C454
Contextual Info: ST16C454 ST68C454 QUAD UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER UART DESCRIPTION -CDA -RIA RXA GND D7 D6 D5 D4 D3 D2 D1 D0 INTSEL VCC RXD -RID -CDD 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 10 60 -DSRD -CTSA 11 59 -CTSD -DTRA 12 58 -DTRD VCC 13 57 GND -RTSA

Contextual Info: TL16C754B QUAD UART WITH 64ĆBYTE FIFO SLLS397A − NOVEMBER 1999 − REVISED JUNE 2004 D ST16C654 Pin Compatible With Additional D D D D D D D D D D D Enhancements Supports Up To 24-MHz Crystal Input Clock 1.5 Mbps Supports Up To 48-MHz Oscillator Input

Contextual Info: TL16C754B QUAD UART WITH 64ĆBYTE FIFO SLLS397A − NOVEMBER 1999 − REVISED JUNE 2004 D ST16C654 Pin Compatible With Additional D D D D D D D D D D D Enhancements Supports Up To 24-MHz Crystal Input Clock 1.5 Mbps Supports Up To 48-MHz Oscillator Input

Contextual Info: TL16C754B QUAD UART WITH 64ĆBYTE FIFO SLLS397A − NOVEMBER 1999 − REVISED JUNE 2004 D ST16C654 Pin Compatible With Additional D D D D D D D D D D D Enhancements Supports Up To 24-MHz Crystal Input Clock 1.5 Mbps Supports Up To 48-MHz Oscillator Input

ST16C454

Abstract: 16C450 ST16C450 ST16C454CJ68 ST16C454IJ68 ST68C454 pin configuration of 8654
Contextual Info: ST16C454 QUAD UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER UART DESCRIPTION -CDA -RIA RXA GND D7 D6 D5 D4 D3 D2 D1 D0 INTSEL VCC RXD -RID -CDD 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 -DSRA 10 60 -DSRD -CTSA 11 59 -CTSD -DTRA 12 58 -DTRD VCC 13 57 GND -RTSA

Contextual Info: ST16C454 QUAD UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER UART DESCRIPTION -CDA -RIA RXA GND D7 D6 D5 D4 D3 D2 D1 D0 INTSEL VCC RXD -RID -CDD 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 -DSRA 10 60 -DSRD -CTSA 11 59 -CTSD -DTRA 12 58 -DTRD VCC 13 57 GND -RTSA

Contextual Info: TL16C754B QUAD UART WITH 64ĆBYTE FIFO SLLS397A − NOVEMBER 1999 − REVISED JUNE 2004 D ST16C654 Pin Compatible With Additional D D D D D D D D D D D Enhancements Supports Up To 24-MHz Crystal Input Clock 1.5 Mbps Supports Up To 48-MHz Oscillator Input

MS-018

Abstract: ST16C654 TL16C554 TL16C754B TL16C754BFN TL16C754BPN Dll00 t27d
Contextual Info: TL16C754B QUAD UART WITH 64ĆBYTE FIFO SLLS397A − NOVEMBER 1999 − REVISED JUNE 2004 D ST16C654 Pin Compatible With Additional D D D D D D D D D D D Enhancements Supports Up To 24-MHz Crystal Input Clock 1.5 Mbps Supports Up To 48-MHz Oscillator Input

16C1050

Abstract: SB16C1054 SB16C554 IN16C1054 PLCC68 TL16C554 TQFP80 256 byte FIFO
Contextual Info: TECHNICAL DATA Quard Uart with 256-Byte FIFO IN16C1054 1. Functional Description IN16C1054 is a quad UART Universal Asynchronous Receiver/Transmitter with 256-byte FIFO supporting maximum communication speed of 5.3Mbps. It offers flow control function by hardware or software and signal lines which can open