8038
Abstract: MAX 8038 8039 8041 8042
Text: DC BLOCKS SMA, 10 MHz - 18 GHz, 200 Volts SPECIFICATIONS: Models: 8037, 8038, 8039, 8040, 8041, 8042, 8043, 8044, 8045 SMA Male Electrical: 10 MHz - 18 GHz 1.35:1 Max. 50 Ohms 0.5 dB Max. 200 Volts Max. -65°C to +125°C Frequency Range VSWR Impedance Insertion Loss
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-STD-348
8038
MAX 8038
8039
8041
8042
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PDF
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Untitled
Abstract: No abstract text available
Text: DC BLOCKS SMA, 10 MHz - 18 GHz, 200 Volts SPECIFICATIONS: Models: 8037, 8038, 8039, 8040, 8041, 8042, 8043, 8044, 8045 SMA Male Electrical: 10 MHz - 18 GHz 1.35:1 Max. 50 Ohms 0.5 dB Max. 200 Volts Max. -65°C to +125°C Frequency Range VSWR Impedance Insertion Loss
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Original
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-STD-348
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PDF
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Untitled
Abstract: No abstract text available
Text: DC BLOCKS SMA, 10 MHz - 18 GHz, 200 Volts SPECIFICATIONS: Models: 8037, 8038, 8039, 8040, 8041, 8042, 8043, 8044, 8045 SMA Male Electrical: 10 MHz - 18 GHz 1.35:1 Max. 50 Ohms 0.5 dB Max. 200 Volts Max. -65°C to +125°C Frequency Range VSWR Impedance Insertion Loss
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-STD-348
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PDF
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k4202
Abstract: mk4202q
Text: S G S -T H O M S O N MK4202 Q -20/22/25 2048 x 20 CMOS TAG RAM • 2048 x 20 CMOS SRAM WITH ONBOARD COMPARATOR ■ MATCH ACCESS TIME = 20ns (max) ■ READ ACCESS TIME = 25ns (max) ■ RESET C YC LE = 25ns (max) ■ Icc (outputs deselected) = 250m A (max)
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OCR Scan
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MK4202
PLCC68
k4202
mk4202q
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PDF
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k3570
Abstract: No abstract text available
Text: PRELIMINARY INFORMATION V62C31162048 128K x 16 STATIC RAM MOSEL VITELIC Features Description • High-speed: 35, 70 ns ■ Ultra low DC operating current of 4mA max. – TTL Standby: 1 mA (Max.) – CMOS Standby: 15 µA (Max.) ■ Fully static operation
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V62C31162048
44-pin
V62C31162048
152-bit
k3570
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PDF
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k3570
Abstract: V62C31161024
Text: PRELIMINARY INFORMATION V62C31161024 64K x 16 STATIC RAM MOSEL VITELIC Features Description • High-speed: 35, 70 ns ■ Ultra low DC operating current of 4mA max. – TTL Standby: 0.5 mA (Max.) – CMOS Standby: 10 µA (Max.) ■ Fully static operation
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V62C31161024
44-pin
V62C31161024
576-bit
k3570
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PDF
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V62C51864
Abstract: No abstract text available
Text: MOSEL VITELIC PRELIMINARY V62C51864 8K X 8 STATIC RAM Features Description • High-speed: 35, 70 ns ■ Ultra low DC operating current of 5mA max. ■ Low Power Dissipation: – TTL Standby: 2 mA (Max.) – CMOS Standby: 15 mA (Max.) ■ Fully static operation
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V62C51864
28-pin
V62C51864
536-bit
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PDF
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Untitled
Abstract: No abstract text available
Text: M OSEL V I T E L I C PRELIMINARY INFORMATION V62C31162048 128K x 16 STATIC RAM Features Description • High-speed: 35, 70 ns ■ Ultra low DC operating current of 4mA max. - TTL Standby: 1 mA (Max.) - CMOS Standby: 15 |o,A (Max.) ■ Fully static operation
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OCR Scan
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V62C31162048
44-pin
152-bit
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PDF
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Untitled
Abstract: No abstract text available
Text: MOSEL VITELIC PRELIMINARY INFORMATION V62C31161024 64K x 16 STA TIC RAM Features Description • High-speed: 35, 70 ns ■ Ultra low DC operating current of 4mA max. - TTL Standby: 0.5 mA (Max.) - CMOS Standby: 10 [xA (Max.) ■ Fully static operation ■ All inputs and outputs directly TTL compatible
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OCR Scan
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V62C31161024
44-pin
576-bit
433-0952Tlx:
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PDF
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z920
Abstract: No abstract text available
Text: MOSEL VI TEL IC P R ELIM IN A R Y V62C51864 8 K X 8 S TA TIC R A M Features Description • High-speed: 35, 70 ns ■ Ultra low DC operating current of 5mA max. ■ Low Power Dissipation: - TTL Standby: 2 mA (Max.) - CMOS Standby: 15 jjA (Max.) ■ Fully static operation
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OCR Scan
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V62C51864
28-pin
536-bit
z920
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PDF
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V53C16258SH
Abstract: V53C16258SHK50 V53C16258SHT50 RC2t
Text: PRELIMINARY V53C16258SH HIGH PERFORMANCE 256K X 16 EDO PAGE MODE CMOS DYNAMIC RAM SELF REFRESH MOSEL VITELIC HIGH PERFORMANCE 50 Max. RAS Access Time, tRAC 50 ns Max. Column Address Access Time, (tCAA) 24 ns Min. Extended Data Out Mode Cycle Time, (tPC)
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V53C16258SH
16-bit
-50ns)
40-pin
40/44L-pin
V53C16258SH
V53C16258SHK50
V53C16258SHT50
RC2t
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PDF
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32-PIN
Abstract: V62C1881024
Text: MOSEL VITELIC ADVANCED V62C1881024 1.8 VOLT 128K X 8 STATIC RAM Features Description • High-speed: 90, 120 ns ■ Ultra low DC operating current of 25 mA max. – CMOS Standby: 5 µA (Max.) ■ Fully static operation ■ All inputs and outputs directly compatible
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V62C1881024
32-pin
V62C1881024
576-bit
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PDF
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Untitled
Abstract: No abstract text available
Text: MOSEL VITELIC V53C16258SH HIGH PERFORMANCE 2 5 6 K X 16 EDO PAGE MODE CMOS DYNAMIC RAM SELF REFRESH PRELIMINARY HIGH PERFORMANCE 50 Max. RAS Access Time, tRAC 50 ns Max. Column Address Access Time, (tCAA) 24 ns Min. Extended Data Out Mode Cycle Time, (tPC)
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V53C16258SH
16-bit
-50ns)
40-pin
40/44L-pin
433-0952Tlx;
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PDF
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Untitled
Abstract: No abstract text available
Text: T7m Optimum Choice 300 RED SCHOOL LANE industries , INC. „L„ PART NUMBER 14LI2 PJ NO DC (pH) DCI MAX. DCR MAX. (£3) (A m ps) ”L" WITH DCI (p H ) PHILLIPSBURG, N.J. 08865 TEST LEVEL (908) 454-2600 FAX (908) 454-3742 DCI (Amps) FOR % DECREASE IN "L
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14LI2
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Untitled
Abstract: No abstract text available
Text: MOSEL VITELIC PRELIMINARY V62C3181024 3 VOLT 128K X 8 STATIC RAM Features • Packages - 32-pin TSOP Standard - 32-pin 440 mil SOP (525 mil pin-to-pin) ■ High-speed: 45, 70 ns ■ Ultra low DC operating current of 25 mA (max.) - TTL Standby: 1 mA(Max.)
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OCR Scan
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V62C3181024
32-pin
576-bit
433-0952Tlx:
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PDF
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V53C16256SH
Abstract: No abstract text available
Text: MOSEL VITELIC PRELIMINARY V53C16256SH 256K X 16 FAST PAGE MODE CMOS DYNAMIC RAM WITH SELF REFRESH HIGH PERFORMANCE 40 50 Max. RAS Access Time, tRAC 40 ns 50 ns Max. Column Address Access Time, (tCAA) 20 ns 24 ns Min. Fast Page Mode Cycle Time, (tPC) 23 ns
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V53C16256SH
16-bit
40-pin
40/44L-pin
V53C16256SH
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PDF
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v53c16258hk
Abstract: No abstract text available
Text: MOSEL VITELIC PRELIMINARY V53C16258H HIGH PERFORMANCE 256K X 16 EDO PAGE MODE CMOS DYNAMIC RAM OPTIONAL SELF REFRESH HIGH PERFORMANCE 25 28 30 35 40 Max. RAS Access Time, tRAC 25 ns 28 ns 30 ns 35 ns 40 ns Max. Column Address Access Time, (tCAA) 13 ns 15 ns
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V53C16258H
16-bit
V53C16258SH)
v53c16258hk
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V53C517400A
Abstract: WL10 WL12
Text: MOSEL VITELIC PRELIMINARY V53C517400A 4M x 4 FAST PAGE MODE CMOS DYNAMIC RAM V53C517400A 50 60 Max. RAS Access Time, tRAC 50 ns 60 ns Max. Column Address Access Time, (tCAA) 25 ns 30 ns Min. Page Mode Cycle Time, (tPC) 35 ns 40 ns Min. Read/Write Cycle Time, (tRC)
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V53C517400A
cycles/32
24/26-pin
V53C517400A
WL10
WL12
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PDF
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V53C808HT
Abstract: V53C808H CHR49
Text: MOSEL VITELIC PRELIMINARY V53C808H HIGH PERFORMANCE 1M x 8 BIT EDO PAGE MODE CMOS DYNAMIC RAM OPTIONAL SELF REFRESH HIGH PERFORMANCE 35 40 45 50 Max. RAS Access Time, tRAC 35 ns 40 ns 45 ns 50 ns Max. Column Address Access Time, (tCAA) 18 ns 20 ns 22 ns
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V53C808H
V53C808HT
V53C808H
CHR49
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V53C516400A
Abstract: WL10 WL12 WBG MARKING
Text: MOSEL VITELIC PRELIMINARY V53C516400A 4M x 4 FAST PAGE MODE CMOS DYNAMIC RAM V53C516400A 50 60 Max. RAS Access Time, tRAC 50 ns 60 ns Max. Column Address Access Time, (tCAA) 25 ns 30 ns Min. Page Mode Cycle Time, (tPC) 35 ns 40 ns Min. Read/Write Cycle Time, (tRC)
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V53C516400A
cycles/64
24/26-pin
V53nt
V53C516400A
WL10
WL12
WBG MARKING
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PDF
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Untitled
Abstract: No abstract text available
Text: MOSEL VITELIC PRELIMINARY V62C3182048 2.7 VOLT 256K X 8 STATIC RAM • Packages – 32-pin TSOP Standard – 32-pin 440 mil SOP (525 mil pin-to-pin) Features ■ High-speed: 35, 70 ns ■ Ultra low DC operating current of 2mA (max.) TTL Standby: 1 mA (Max.)
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V62C3182048
32-pin
V62C3182048
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PDF
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V53C518160A
Abstract: No abstract text available
Text: V53C518160A 1M x 16 FAST PAGE MODE CMOS DYNAMIC RAM MOSEL VITELIC HIGH PERFORMANCE 50 60 Max. RAS Access Time, tRAC 50 ns 60 ns Max. Column Address Access Time, (tCAA) 25 ns 30 ns Min. Fast Page Mode Cycle Time, (tPC) 35 ns 40 ns Min. Read/Write Cycle Time, (tRC)
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V53C518160A
16-bit
cycles/16
42-pin
44/50-pin
V53C518160A
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PDF
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V53C364405A
Abstract: WL10 WL12
Text: MOSEL VITELIC V53C364405A 3.3 VOLT 16M X 4 EDO PAGE MODE CMOS DYNAMIC RAM V53C364405A 40 50 60 Max. RAS Access Time, tRAC 40 ns 50 ns 60 ns Max. Column Address Access Time, (tCAA) 20 ns 25 ns 30 ns Min. Extended Data Out Page Mode Cycle Time, (tPC) 16 ns
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V53C364405A
cycles/128
32-pin
V53C364405A
WL10
WL12
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PDF
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V53C365165A
Abstract: No abstract text available
Text: V53C365165A 3.3 VOLT 4M X 16 EDO PAGE MODE CMOS DYNAMIC RAM MOSEL VITELIC V53C365165A 40 50 60 Max. RAS Access Time, tRAC 40 ns 50 ns 60 ns Max. Column Address Access Time, (tCAA) 20 ns 25 ns 30 ns Min. Extended Data Out Page Mode Cycle Time, (tPC) 16 ns
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V53C365165A
16-bit
cycles/64
50-pinnt
V53C365165A
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PDF
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