MATRA MHS Search Results

sparclet

Abstract: bicc V110 temic iobus ASR22 2290C TMV-8E
Contextual Info: 90C701 for Advanced Communication Systems Preview - November 1995 Semiconductor 90C701 MATRA MHS TEMIC / MATRA MHS FAX-IT We Want Your Comments FAX +33 1-30 60 71 57 e-mail : c701.preview@matramhs.fr TEMIC / MATRA MHS SPARClet TM Applications Engineering provides a Fax number and an e-mail

vhdl code 8 bit processor

Abstract: verilog code 16 bit CISC CPU verilog code for 32 bit risc processor vhdl code cisc processor vhdl code 32 bit risc code vhdl code for risc processor verilog code for 16 bit risc processor vhdl code 32 bit processor vhdl code for 32 bit risc processor vhdl code for 16 bit dsp processor
Contextual Info: TEMIC Semiconductors MATRA MHS SPARClet 32 bit RISC microcontroller family Richard Pedreau-SPARC technical marketing richard.pedreau@matramhs.fr October 1995 A Company of AEG Daimler-Benz Industrie TEMIC MATRA MHS Total WW High-End Embedded Processor Market

TM1019

Abstract: MG2RTP MATRA MHS, MG2
Contextual Info: Arrays: MG2RTP Radiation Tolerant 0.5 mm CMOS Sea of Gates 100k Rad High Dose Rate Description TEMIC/Matra MHS is the first European supplier for space applications requiring submicronic radiation tolerant CMOS ASICs. This is why TEMIC/Matra MHS keep offering a wide

oscillator 18,432mhz

Abstract: cmos vco ic U2760B U2783B U3770M U7001BG "Analog switches" MHS IC quadrature modulation dual front end
Contextual Info: U3770M MATRA MHS CT2 I/Q Modulator and Clock Circuitry Description U3770M is a quadrature modulator realized with MATRA MHS’ advanced 0.8 micron CMOS process. The IC is especially designed for CT2 application in con-junction with TELEFUNKEN’s RF/IF signal

U2760B

Abstract: U2783B U3770M U7001BG gaussian shaping filter
Contextual Info: U3770M MATRA MHS CT2 I/Q Modulator and Clock Circuitry Description U3770M is a quadrature modulator realized with MATRA MHS’ advanced 0.8 micron CMOS process. The IC is especially designed for CT2 application in conjunction with TELEFUNKEN’s RF/IF signal processor

Contextual Info: Tem ic U3770M MATRA MHS CT2 I/Q Modulator and Clock Circuitry Description U3770M is a quadrature modulator realized with MATRA MHS’ advanced 0.8 micron CMOS process. The IC is especially designed for CT2 application in con-junction with TELEFUNKEN’s RF/IF signal

MHS/SCC034

Contextual Info: ]> • SûbfiHSb D D G Ü ^ S a 73T « H U M S m \ \ n n y 7= ^ Novem ber 1990 MATRA M H S DATA SHEET WORKSTATION SUPPORT DESIGNING GATE ARRAYS AND COMPOSITE ARRAYS WITH MENTOR GRAPHICS TOOLS FEATURES . MATRA MHS/MENTOR GRAPHICS : A SUCCESSFUL PARTNERSHIP

Code DP

Contextual Info: Packages Flat Pack package outlines 24 pins Flat Pack 500 mils Code : D Date : 21–07–92 28 pins Flat Pack (400 mils) Code : DP MATRA MHS Date : 15–04–97 1 Packages 32 pins Flat Pack (400 mils) Code : DJ 2 Date : 04–09–96 MATRA MHS

code LX

Abstract: matra cqfp date diode date code MATRA MHS pins
Contextual Info: Packages Ceramic Quad Flat Pack package outlines 80 pins CQFPL Code : LO Date : 25–02–96 100 pins CQFPL Code : LT MATRA MHS Date : 17–04–97 1 Packages 132 pins CQFPL Code : LN Date : 17–11–95 160 pins CQFPL Code : LW 2 Date : 17–04–97 MATRA MHS

CQPJ

Abstract: MATRA MHS matra QM code
Contextual Info: Packages Ceramic Quad Pack J leaded package outlines 28 Leads CQPJ Code : QI Date : 17–04–97 44 Leads CQPJ Code : QL MATRA MHS Date : 04–10–95 1 Packages 52 Leads CQPJ Code : Q3 Date : 28–11–91 68 Leads CQPJ Code : QM 2 Date : 26–02–96 MATRA MHS

MG1140E

Abstract: 000GATES
Contextual Info: Tem ic Array MATRA MHS MG1RT : Radiation Tolerant 0.6|im CMOS Sea Of Gates Description TEMIC / MATRA MHS is the first European supplier for space application submicronic radiation tolerant CMOS ASICs. This is why TEMIC keeps offering a fluent way of moving up and down the quality and the space/radiation

CERAMIC PIN GRID ARRAY 120 pins

Abstract: MATRA MHS pga 180 gu -SH-112D 144 PGA 160-Pin PGA 8f diode CERAMIC PIN GRID ARRAY 144 pins code matra
Contextual Info: Packages Ceramic Pin Grid Array PGA package outlines 68 pins PGA Code : 8M Date : 15–12–95 84 pins PGA Code : 8R MATRA MHS Date : 21–12–95 1 Packages 100 pins PGA Code : GT Date : 15–12–95 120 pins PGA Code : GU 2 Date : 10–02–95 MATRA MHS

C51 Family

Abstract: 0X00 80C51 80C52 83C154 C154 MATRA MHS 80c51 MHS-C51
Contextual Info: MATRA MHS C51 Family C51 Family Programmer’s Guide and Instruction Set Content Memory Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Program Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Contextual Info: 90C701 for Advanced Communication Systems Preview - November 1995 T e m ic Semiconductor •I SflböMSb G 0 0 S 0 7 0 1 3 7 ■ T e m ic 90C701 MATRA MHS TEMIC / MATRA MHS FAX-IT We Want Your Comments FAX +33 1-30 60 71 57 e-m ail: c701.preview@matramhs.fr

HC 741

Abstract: HC3057 3053
Contextual Info: MATRA DESIGN SEMICOND 14 d Ë J Sat,fl4 S 5 O O G D T b l T 5868455 MATRA DESIGN “- 7 . S 94D 00761 SEMICOND W D 4 / - ' é > 9 _. HC 3052/HC 3053 HC 3054/HC 3057 MONOLITHIC CMOS Serial Interface COFIDEC FAMILY AUGUST 1987 Features Description COMPLETE CODEC/FILTER COFIDEC

m80c31

Abstract: M 80C31 51ti 80C31 80C51 80C51F MATRA MHS 80c51 MATRA MHS 80c31 intel MCS-51 MHS 80C31
Contextual Info: j- 5866455 MATRA DE S IG N SEMICOND MATRA D E S I G N SEMICOND T4 D l F | Sñbñ4S5 9 4D OODDbaS 00622 1 |~ D 1 - W - z 'h o Y ' 80C51/80C31 llM ll CMOS SINGLE - CHIP 8 BIT MICROCONTROLLER û OCTOBER 1987 • 80C51 • 80C31 Features CMOS SINGLE-CHIP 8 BIT MICROCONTROLLER with factory mask-programmable ROM.

80251

Abstract: CP41 MATRA MHS 80251A1 80C51 C251 PLCC44 TSC80251 TSC80251A1 44 CQPJ with window
Contextual Info: TSC 80251A1 TSC 80251A1 Extended 8–bit Microcontroller with Analog Interfaces Datasheet – 1996 MATRA MHS TSC 80251A1 Table of Contents General Introduction Extended 8–bit Microcontroller with Analog Interfaces . . . . . . . . . . . . . . . . . 1. Section I: Introduction to TSC80251A1

80251A1

Abstract: 80251 MATRA MHS 80c51 airbag temic CPU CP30 80C51 C251 PLCC44 TSC80251 TSC80251A1
Contextual Info: TSC 80251A1 TSC 80251A1 Extended 8–bit Microcontroller with Analog Interfaces Datasheet – 1996 MATRA MHS TSC 80251A1 Table of Contents General Introduction Extended 8–bit Microcontroller with Analog Interfaces . . . . . . . . . . . . . . . . . 1. Section I: Introduction to TSC80251A1

DTE X21

Abstract: PQFP44
Contextual Info: 29C921 MATRA MHS X21 Controller Description The X21 communication controller is a microprocessor peripheral device. It supports the low level tasks regarding supervision of the X21 interface, protocol handling and data integrity checking being ensured by the

digital clock using logic gates

Abstract: vhdl manchester UART using VHDL digital lock using logic gates MATRA MHS 29C463A
Contextual Info: 29C463A MATRA MHS Vehicle Area Network Data Link Controller With Mask Programmable Interfaces Description The 29C463A data link controller is a mask programmable device dedicated for the realisation of stand alone VAN peripherals fully compliant with the ISO

Convolutional

Abstract: BPSK DEMODULATORS satellite communication working Viterbi Decoder 1E10 inverter stand alone Reed Solomon Viterbi Decoder, QPSK
Contextual Info: FEC CODECS FEC CODECS: Reed Solomon and Viterbi Introduction TEMIC Matra MHS, with ESA support is currently working on a program which will result in the availability of specific encoders and decoders suitable for satellite wide band communications applications.

Contextual Info: Tem ic 29C921 MATRA MHS X21 Controller Description The X21 communication controller is a microprocessor peripheral device. It supports the low level tasks regarding supervision of the X21 interface, protocol handling and data integrity checking being ensured by the

CS61574

Abstract: HC49 29C300
Contextual Info: 29C300/301 MATRA MHS T1/E1 Integrated Short Haul Transceivers with Receive Jitter Attenuation Description The 29C300 and 29C301 are fully integrated transceivers for both North American 1.544 MHz T1 , and European 2.048 MHz (E1/CEPT) applications. Transmit pulse

Contextual Info: TSC80251G1D TSC80251G1D Extended 8–bit Microcontroller with Serial Communication Interfaces Design Guide – 25 Sept 1997 MATRA MHS Rev. A – 25 Sept 1997 TSC80251G1D Introduction to TSC80251G1D 1 Design Information 2 Electrical and Mechanical Information