MARKING TN5C Search Results

ADV9502

Abstract: ep320Ipc TNPLD610 N85C220 D5AC312 EP320IDC npld610 EP320IPI EPX780LC84 N5C180
Contextual Info: April 4, 1995 Dear Customer: Effective July 1, 1995, Altera will transition from a dual mark, to a single mark for all products acquired from Intel. In addition, Altera will be converting solely to Altera ordering codes for these products See Table 1 . This change is cosmetic in nature and does not effect

Contextual Info: TN2524 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This

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Abstract: TN2524 TN5C fet sot-89 marking code mos die TN2524N8-G TN2524ND
Contextual Info: TN2524 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This

Contextual Info: TN2524 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This

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Abstract: marking Tn5C TN5C SOT89 TN2524 TN2524N8 TN2524ND TN25
Contextual Info: TN2524 Low Threshold N-Channel Enhancement-Mode Vertical DMOS FETs Ordering Information Order Number / Package BVDSS / BVDGS RDS ON (max) VGS(th) (max) ID(ON) (min) TO-243AA* Die† 240V 6.0Ω 2.0V 1.0A TN2524N8 TN2524ND * Same as SOT-89. Product supplied on 2000 piece carrier tape reels.

Contextual Info: TN2524 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This

Contextual Info: TN2524 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling

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Abstract: tn5c FET SOT-89 FET SOT-89 N-Channel fet sot-89 marking code fet sot-89 product marking TN2524 TN2524N8-G TN2524ND MARKING CODE BV sot-89
Contextual Info: TN2524 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This

tn5cw

Contextual Info: TN2524 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This

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Abstract: TN2524 TN2524N8 TN2524ND marking Tn5C
Contextual Info: TN2524 Low Threshold N-Channel Enhancement-Mode Vertical DMOS FETs Ordering Information Order Number / Package BVDSS / BVDGS RDS ON (max) VGS(th) (max) ID(ON) (min) TO-243AA* Die† 240V 6.0Ω 2.0V 1.0A TN2524N8 TN2524ND * Same as SOT-89. Product supplied on 2000 piece carrier tape reels.

Contextual Info: Supertex inc. TN2524 N-Channel Enhancement-Mode Vertical DMOS FET Features ►► ►► ►► ►► ►► ►► ►► General Description Low threshold 2.0V max. High input impedance Low input capacitance (125pF max.) Fast switching speeds Low on-resistance