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    M74HC112C1R Search Results

    M74HC112C1R Datasheets (1)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    M74HC112C1R STMicroelectronics DUAL J-K FLIP FLOP WITH PRESET AND CLEAR Original PDF

    M74HC112C1R Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    IC 74HC112

    Abstract: JK flip flop IC diagram 74LS112 JK EDGE TRIGGERED FLIP FLOP 74ls112 pin diagram 74ls112 function table 74HC112 Toggle flip flop IC M54HC112 M54HC112F1R M74HC112
    Text: M54HC112 M74HC112 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR . . . . . . . . HIGH SPEED fMAX = 67 MHz TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 2 µA AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS


    Original     		M54HC112 M74HC112 54/74LS112 M54HC112F1R M74HC112M1R M74HC112B1R M74HC112C1R M54/74HC112 IC 74HC112 JK flip flop IC diagram 74LS112 JK EDGE TRIGGERED FLIP FLOP 74ls112 pin diagram 74ls112 function table 74HC112 Toggle flip flop IC M54HC112 M54HC112F1R M74HC112 PDF

    Untitled

    Abstract: No abstract text available
    Text: / = T ^ 7# M 5 4 H C 1 12 M 7 4 H C 1 12 S G S -T H O M S O N ü M tM U liO T O K S DUAL J-K FLIP FLOP WITH PRESET AND CLEAR • HIGH SPEED fMAX = 67 MHz TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION Ice = 2 |aA AT T a = 25 "C ■ HIGH NOISE IMMUNITY Vnih = Vnil = 28 % Vcc (MIN.)


    OCR Scan     		54/74LS112 M54HC112F1R M74HC112B1R M54/74H M54/M74HC112 PDF

    74HC112

    Abstract: 74LS112 JK EDGE TRIGGERED FLIP FLOP
    Text: f Z T SGS-THOMSON ^ 7 # « [fM L E O ïM K S M54HC112 M74HC112 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR . HIGHSPEED fMAX = 67 MHz TYP. AT Vcc = 5 V • LOW POWER DISSIPATION Ice = 2 |jA AT T a = 25 ’C ■ HIGH NOISE IMMUNITY V nih = V n il = 28 % V c c (MIN.)


    OCR Scan     		M54HC112 M74HC112 54/74LS112 M54/74HC112 74HC112 74LS112 JK EDGE TRIGGERED FLIP FLOP PDF