M74HC00DP Search Results

Contextual Info: M IT S U B IS H I HIGH SPEED CMOS M 7 4 H C P M 7 4 H C D P QUADRUPLE 2 -IN P U T P O S IT IV E NAND GATE DESCRIPTION PIN The M 74H C 00 is a sem iconductor inte grated c ircu it con­ CONFIGURATION TOP VIEW sisting of fou r 2-in put p o s itiv e -lo g ic NAND, usable as negativ e -lo g ic NOR gates.

M74HCOO

Abstract: M74HC00D
Contextual Info: M IT S U B IS H I HIGH SPEED CMOS M 74H C 00 P /F P /D P QU A D RU PLE 2 -IN P U T P O S IT IV E NAND GATE DESCRIPTION The M 7 4 H C 0 0 is a s e m ic o n d u c to r in te g r a te d c irc u it c o n ­ sis tin g of fo u r 2 -in p u t p o s itiv e -lo g ic N A N D g a te s , u s a b le as

pin diagram of ic 74ls00

Abstract: M74HC00 74LS00 transfer function 74LS00 gate diagram pin diagram of 74ls00 M74HC00P 74LS00 pin configuration 74ls00 circuit diagram M74HCOO IC PIN CONFIGURATION OF 74LS00
Contextual Info: M IT S U B IS H I HIGH S P E E D C M O S M 74HC00P M 74HC00DP Q U A D R U P L E 2 -IN P U T P O S IT IV E N A N D G A T E DESCRIPTION T he M 74H C 00 ts a sem iconductor integrated circuit con­ sisting of fou r 2-input p o sitive-lo gic NAND, usable as nega­